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JP2003198136A - Wiring board - Google Patents

Wiring board

Info

Publication number
JP2003198136A
JP2003198136A JP2001395090A JP2001395090A JP2003198136A JP 2003198136 A JP2003198136 A JP 2003198136A JP 2001395090 A JP2001395090 A JP 2001395090A JP 2001395090 A JP2001395090 A JP 2001395090A JP 2003198136 A JP2003198136 A JP 2003198136A
Authority
JP
Japan
Prior art keywords
hole
wiring
conductor
layer
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001395090A
Other languages
Japanese (ja)
Inventor
Naohiro Katori
直広 鹿取
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2001395090A priority Critical patent/JP2003198136A/en
Publication of JP2003198136A publication Critical patent/JP2003198136A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

(57)【要約】 【課題】 スルーホール導体の特性インピーダンスが整
合されて電気特性に優れており、かつスルーホール周り
に窪みできず、配線導体層の断線のない配線基板を提供
する。 【解決手段】 繊維基材に熱硬化性樹脂を含浸させて成
る絶縁層1と配線導体層2とを複数積層するとともに、
絶縁層1を貫通し、絶縁層1を挟んで上下に位置する配
線導体層2間を電気的に接続する格子状に配置された複
数のスルーホール導体4bを具備して成り、格子状のス
ルーホール導体4bで接続されている上下の配線導体層
2間に、スルーホール導体4bに対し非接続の配線導体
層2を配設するとともにこの非接続の配線導体層2と同
一平面でスルーホール導体4bの周囲に各スルーホール
導体4bを区画する格子状のダミー配線導体層5を設け
たことを特徴とする配線基板。
(57) [Problem] To provide a wiring substrate in which the characteristic impedance of a through-hole conductor is matched and excellent in electrical characteristics, and which cannot be depressed around the through-hole and has no break in a wiring conductor layer. SOLUTION: A plurality of insulating layers 1 and a wiring conductor layer 2 each formed by impregnating a fiber base material with a thermosetting resin are laminated,
A plurality of through-hole conductors 4b penetrating the insulating layer 1 and electrically connected between the wiring conductor layers 2 located vertically above and below the insulating layer 1 are arranged in a grid pattern. Between the upper and lower wiring conductor layers 2 connected by the hole conductor 4b, the wiring conductor layer 2 not connected to the through-hole conductor 4b is provided, and the through-hole conductor 2 is provided on the same plane as the non-connection wiring conductor layer 2. A wiring substrate, comprising a grid-like dummy wiring conductor layer 5 for partitioning each through-hole conductor 4b around the periphery of the wiring conductor 4b.

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明は、半導体素子等の電
子部品を収容するための配線基板に関する。 【0002】 【従来の技術】従来、半導体素子を搭載するための有機
材料系の配線基板として、例えば繊維基材に熱硬化性樹
脂を含浸させて成る絶縁層の両面または片面に銅箔から
成る配線導体層を被着させて成る複数の配線板を、同じ
く繊維基材に熱硬化性樹脂を含浸させて成る接着層を介
して積層して成る多層プリント配線基板が用いられてい
る。この配線基板においては、その上面から下面にかけ
て貫通する複数のスルーホールが設けられており、スル
ーホール内壁には各絶縁層を挟んで上下に位置する配線
導体層同士を電気的に接続するための銅めっき膜から成
るスルーホール導体が被着形成されており、それにより
立体的な高密度配線が可能となっている。なお、各絶縁
層表面の配線導体層が接続されていないスルーホール導
体の周辺には、配線基板の表面におけるスルーホール導
体の周辺部の凹凸を緩和するために、スルーホール導体
に接続された円形環状の導体層から成るダミーランドが
スルーホール導体を取り囲んで設けられている。 【0003】なお、このような配線基板は、厚みが0.1
〜0.5mm程度の繊維基材に熱硬化性樹脂を含浸させて
成る絶縁層の両面または片面に、厚みが10〜50μm程度
の銅箔から成る配線導体層が被着形成されて成る複数の
配線板を、厚みが0.1〜0.2mm程度の繊維基材に熱硬化
性樹脂前駆体を含浸させて成る接着層を介して積層・熱
プレスした後、その上面から下面にかけて直径が200〜5
00μm程度のスルーホールを600〜1500μm程度の間隔
でドリル加工により穿孔し、しかる後、スルーホール内
壁に厚みが15〜30μm程度の銅めっき膜から成るスルー
ホール導体を無電解めっき法および電解めっき法により
被着させ、さらに、銅めっき膜を被着したスルーホール
の内部に孔埋め樹脂を充填し硬化した後、スルーホール
から突出した余分な孔埋め樹脂を研磨してその上下面を
平坦にすることによって製作されている。 【0004】 【発明が解決しようとする課題】しかしながら近年、配
線基板は、これに搭載される半導体素子の動作スピード
の高速化に伴い、搭載する半導体素子に誤動作を生じさ
せないように電気特性の改善が必要となってきており、
その手段としてスルーホール導体に接続されたダミーラ
ンドを省略してスルーホール導体の特性インピーダンス
の整合を行うことによりノイズの発生を抑制することが
検討されている。しかしながら、ダミーランドを除去す
ると、配線板の積層後に、配線基板表面のダミーランド
を除去したスルーホール導体の周辺部に数十μmの窪み
が形成されてしまい、その結果、スルーホールの内部に
孔埋め樹脂を充填した後にスルーホールの内部から突出
した孔埋め樹脂を研磨する際に、配線基板表面の数十μ
mの窪みを完全に平坦化すると、配線基板の表面を過剰
に研磨してしまい、それにより配線基板表面の配線導体
層が断線してしまうという問題点を誘発した。 【0005】本発明は、かかる従来技術の問題点に鑑み
完成されたものであり、その目的は、スルーホール導体
の特性インピーダンスの整合がなされ、かつスルーホー
ル導体周辺の配線基板表面に窪みできず、配線導体層の
断線のない配線基板を提供するものである。 【0006】 【課題を解決するための手段】本発明の配線基板は、繊
維基材に熱硬化性樹脂を含浸させて成る絶縁層と配線導
体層とを複数積層するとともに、前記絶縁層を貫通し、
前記絶縁層を挟んで上下に位置する前記配線導体層間を
電気的に接続する格子状に配置された複数のスルーホー
ル導体を具備して成り、該格子状のスルーホール導体で
接続されている上下の前記配線導体層間に、前記スルー
ホール導体に対し非接続の配線導体層を配設するととも
に該非接続の配線導体層と同一平面で前記スルーホール
導体の周囲に各スルーホール導体を区画する格子状のダ
ミー配線導体層を設けたことを特徴とするものである。 【0007】本発明の配線基板によれば、格子状のスル
ーホール導体で接続されている上下の配線導体層間に、
スルーホール導体に対し非接続の配線導体層を配設する
とともにこの非接続の配線導体層と同一平面でスルーホ
ール導体の周囲に各スルーホール導体を区画する格子状
のダミー配線導体層を設けたことから、配線基板の上下
面のスルーホール周囲に窪みが発生することはなく、そ
の結果、スルーホールの内部に孔埋め樹脂を充填し硬化
した後、スルーホールの内部から突出した余分な孔埋め
樹脂を研磨してその上下面を平坦にしたとしても配線基
板の表面を過剰に研磨することはなく、配線基板表面の
配線導体層を断線させてしまうことはない。また、この
ダミー配線導体層は、スルーホール導体の周囲に各スル
ーホール導体を区画するように配置されており、スルー
ホール導体とは接続されていないことから、スルーホー
ル導体の特性インピーダンスの整合を阻害することがな
い。 【0008】 【発明の実施の形態】次に、本発明の配線基板について
添付の図面に基づいて詳細に説明する。図1は、本発明
の配線基板の実施の形態の一例を示す断面図であり、図
2は格子状のダミー配線導体層が形成された絶縁層の要
部平面図である。なお、本実施例においては、配線基板
の下面に放熱板を接合した、放熱板付き配線基板を例に
とって説明する。 【0009】これらの図において、1は絶縁層、2は配
線導体層、3は絶縁層1と配線導体層2とから成る配線
板、4aはスルーホール、4bはスルーホール導体、5
はダミー配線導体層、6は接着層であり、主にこれらで
本発明の配線基板が構成される。 【0010】絶縁層1は、その中央部に半導体素子(図
示せず)を収容する穴部Hを有しており、配線導体層2
の支持体として機能し、例えばガラスクロスやアラミド
不織布等の繊維基材にエポキシ樹脂やビスマレイミドト
リアジン樹脂・ポリフェニレンエーテル樹脂の熱硬化性
樹脂を含浸させた有機系絶縁材料から成る厚みが0.1〜
0.3mmの平板である。そして、その上下両面に厚みが
7〜12μmの銅箔から成る配線導体層2が被着されてお
り、それにより配線板3となるいわゆる両面銅張板が構
成されている。 【0011】また、このような中央部に穴部Hを有する
複数の配線板3がガラスクロスやアラミド不織布等の繊
維基材にエポキシ樹脂やビスマレイミドトリアジン樹脂
・ポリフェニレンエーテル樹脂の熱硬化性樹脂を含浸さ
せて成る接着層6を介して積層されており、それにより
積層基板が形成されている。なお、本例では、積層基板
が3層の配線板3から成る場合を示している。 【0012】また、この積層基板には、その上面から下
面にかけて貫通する直径が200〜500μmで、600〜1500
μmの間隔で複数のスルーホール4aが形成されてお
り、このスルーホール4aの内壁には絶縁層1を介して
上下に位置する配線導体層2同士を電気的に接続するた
めのスルーホール導体4bがめっき法により被着されて
いる。 【0013】積層基板は、その厚みが0.5〜2.0mmであ
り、0.5mm未満では,後述する積層基板の上下面を貫
通して複数のスルーホール4aを形成したりする際等に
熱や外力等の影響で配線基板に反りや変形が発生して配
線基板に要求される平坦度を確保できなくなってしまう
危険性が大きなものとなり、他方、2.0mmを超える
と、後述するようにスルーホール4aの内壁にスルーホ
ール導体4bを形成するとき、スルーホール4aの内部
にめっき液が浸入しにくくなり、スルーホール導体4b
を良好に形成することが困難となる。従って、積層基板
の厚みは0.5〜2.0mmの範囲が好ましい。 【0014】また、スルーホール導体4bは、スルーホ
ール4aの内壁に無電解銅めっきで1〜3μmの銅めっ
き層を被着し、さらに電解銅めっきで15〜30μmの電解
銅めっき層を被着することによって形成される。 【0015】さらに、スルーホール4aの内部には、感
光性樹脂と光開始剤と無機絶縁性フィラーとから成る孔
埋め樹脂7が充填されている。孔埋め樹脂7を充填する
方法としては、一般的にスクリーン印刷が採用されてい
る。そして、スルーホール4aの内壁にスルーホール導
体4bを被着形成後、スルーホール4aの内部に孔埋め
樹脂7を充填するとともに硬化し、さらに配線基板表面
から突出した孔埋め樹脂7を、例えばロールバフによっ
て研磨することにより配線基板の表面が平坦にされてい
る。なお、配線基板の表面が十分に平坦化されていない
と、配線基板を外部電気回路基板に実装する際に、配線
基板と外部電気回路基板との接続信頼性の劣化が懸念さ
れる。 【0016】そして、本発明の配線基板においては、図
2に要部平面図で示すように、格子状のスルーホール導
体4bで接続されている上下の配線導体層2間に、スル
ーホール導体4bに対し非接続の配線導体層2を配設す
るとともにこの非接続の配線導体層2と同一平面でスル
ーホール導体4bの周囲に各スルーホール導体4bを区
画する格子状のダミー配線導体層5を設けられている。
また、本発明の配線基板においては、このことが重要で
ある。 【0017】本発明の配線基板によれば、格子状のスル
ーホール導体4bで接続されている上下の配線導体層2
間に、スルーホール導体4bに対し非接続の配線導体層
2を配設するとともにこの非接続の配線導体層2と同一
平面でスルーホール導体4bの周囲に各スルーホール導
体4bを区画する格子状のダミー配線導体層5を設けた
ことから、このスルーホール導体4b間に格子状に配置
されたダミー配線導体層5により配線基板の上下面のス
ルーホール4a周囲に窪みが発生することはなく、その
結果、スルーホール4aの内部に孔埋め樹脂7を充填し
硬化した後、スルーホール4aから突出した余分な孔埋
め樹脂7を研磨してその上下面を平坦にしたとしても配
線基板の表面を過剰に研磨することはなく、配線基板表
面の配線導体2を断線させてしまうことはない。また、
このダミーの配線導体層5は、スルーホール導体4b間
に格子状に配置されており、スルーホール導体4bとは
接続されていないことから、スルーホール導体4bの特
性インピーダンスの整合を阻害することがない。 【0018】このような格子状のダミー配線導体層5
は、配線導体層2と同時に形成され、その幅が100〜800
μmであることが好ましい。ダミー配線導体層5の幅が
100μmより狭いと、配線板3の積層後に、配線基板表
面の、格子状に配置されたダミー配線導体層5に囲まれ
たスルーホール導体4bの周辺部の凹凸が良好に緩和さ
れない傾向にあり、800μmより広いとスルーホール導
体4bと接触してスルーホール導体4bの特性インピー
ダンスの整合を行うことが困難となる傾向がある。従っ
て、格子状のダミー配線導体層5は、その幅が100〜800
μmであることが好ましい。また、ダミー配線導体層5
の厚みは、配線基板表面の凹凸を緩和するという観点か
らは、配線導体層2の厚みと同等であることが好まし
い。 【0019】また、本発明の配線基板表面の配線導体層
2は、電源配線、グランド配線および信号配線を具備す
る配線パターンを形成しており、そして、例えば上面側
の配線基板表面の配線導体層2の露出する一部に外部電
気回路基板(図示しない)の電極が半田バンプ11を介し
て接続されるとともに、下面側には接着材12を介して放
熱板13が接合されている。放熱板13は、搭載する半導体
素子の発生する熱を外部に良好に放熱する作用をなし、
銅等の放熱性の良好な金属で形成されている。 【0020】さらに、配線基板表面の配線導体層2の表
面には、その酸化腐蝕を防止するとともに半田バンプ11
との接続を良好とするために、半田との濡れ性が良好で
耐腐蝕性に優れたニッケル−金等のめっき層が被着され
ている。また、配線基板表面には、配線導体層2の中央
部を露出させる開口を有する耐半田樹脂層14が被着され
ている。 【0021】このような配線基板は、以下に述べる方法
により製造される。まず、例えばガラスクロスやアラミ
ド不織布にエポキシ樹脂やビスマレイミドトリアジン樹
脂・ポリフェニレンエーテル樹脂等の樹脂を含浸・硬化
させた絶縁層1の両面に銅箔を被着し、配線板3を積層
後、配線基板の最外層となる面以外の銅箔を配線パター
ン状にエッチング加工して配線導体層2および格子状の
ダミー配線導体層5を形成した配線板3を製作するとと
もに、適当なパンチング法を採用して配線板3の中央部
に半導体素子を収納する穴部Hを形成する。 【0022】なお、格子状のダミー配線導体層5は、各
絶縁層1上で設計上、配線導体層2が接続されないスル
ーホール導体4bが格子状に存在する領域において、あ
らかじめ形成される。 【0023】次に、ガラスクロスやアラミド不織布等に
エポキシ樹脂やビスマレイミドトリアジン樹脂・ポリフ
ェニレンエーテル樹脂等の熱硬化性樹脂を含浸させて成
る接着層を介して中央部に穴部Hが形成された配線板3
を複数枚積層し、真空度が660〜8000Pa、温度が180〜
210℃、圧力が2〜5MPaの条件で数時間熱プレスす
ることにより積層基板を形成する。 【0024】さらに、ドリルを用いて、積層基板を貫通
する直径が200〜500μmで600〜1500μmの間隔でスル
ーホール4aを穿設する。なお、この際上述したよう
に、各絶縁層1上で設計上、配線導体層2が接続されな
いスルーホール導体4bが格子状に形成される領域にお
いては、スルーホール導体4bを取り囲む格子状のダミ
ー配線導体層5が形成されている。 【0025】次に、配線基板を過マンガン酸塩類水溶液
等の粗化液に浸漬しスルーホール4a内部の残査樹脂を
除去した後、無電解めっき用パラジウム触媒の水溶液中
に浸漬しスルーホール4aの内壁にパラジウム触媒を付
着させ、さらに、硫酸銅・ロッセル塩・ホルマリン・E
DTAナトリウム塩・安定剤等から成る無電解銅めっき
液に数分間浸漬して無電解銅めっき層をスルーホール4
aの内壁に析出させ、次に、硫酸・硫酸銅5水和物・塩
素・光沢剤等から成る電解銅めっき液に数A/dm2
電流を印加しながら数時間浸漬することにより無電解銅
めっき層上に電解銅めっき層を被着し、厚みが15〜30μ
mのスルーホール導体4bを形成する。また、これと同
時に、配線基板表面の厚みが12〜18μmの銅箔上に厚み
が15〜30μmの銅めっき層が被着される。その後、この
配線基板表面の銅めっき層を配線パターン状にエッチン
グし研磨することにより、配線基板の表面に厚みが15〜
30μmの配線導体層2を形成する。なお、配線基板の表
面に形成された配線導体層2の一部は、外部電気回路基
板と半田バンプ11を介して電気的に接続される実装用電
極15を形成している。 【0026】また、配線基板表面には、実装用電極15を
露出させる開口を有する耐半田樹脂層14が被着されてい
る。耐半田樹脂層14は、その厚みが20〜60μmであり、
例えばアクリル変性エポキシ樹脂等の感光性樹脂と光開
始剤等とから成る混合物に30〜70重量%のシリカやタル
ク等の無機粉末フィラーを含有させた絶縁材料から成
り、隣接する実装用電極15同士が半田バンプ11により電
気的に短絡することを防止するとともに、実装用電極15
と絶縁層1との接合強度を向上させる機能を有する。 【0027】このような耐半田樹脂層14は、感光性樹脂
と光開始剤と無機粉末フィラーとから成る未硬化樹脂フ
ィルムを最外層の絶縁層1表面に被着させる、あるい
は、熱硬化性樹脂と無機粉末フィラーとから成る未硬化
樹脂ワニスを最外層の絶縁層1表面に塗布するとともに
乾燥し、しかる後、露光・現像により開口部を形成し、
これを紫外線硬化および熱硬化させることにより形成さ
れる。 【0028】かくして、本発明の配線基板によれば、ス
ルーホール導体4bの特性インピーダンスの整合が良好
になされ、かつスルーホール導体4b周辺の配線基板表
面に窪みできず、配線導体層2の断線のない配線基板を
提供することができる。 【0029】なお、本発明は、上述の実施の形態の一例
に限定されるものではなく、本発明の要旨を逸脱しない
範囲であれば、種々の変更・改良を施すことは何ら差し
支えなく、たとえば、上述の実施例では本発明の配線基
板を放熱板付き配線基板に適用した例を示したが、中央
部に穴部を有しない配線基板に適用できることは当然の
ことである。 【0030】 【発明の効果】本発明の配線基板によれば、格子状のス
ルーホール導体で接続されている上下の配線導体層間
に、スルーホール導体に対し非接続の配線導体層を配設
するとともにこの非接続の配線導体層と同一平面でスル
ーホール導体の周囲に各スルーホール導体を区画する格
子状のダミー配線導体層を設けたことから、配線基板の
上下面のスルーホール周囲に窪みが発生することはな
く、その結果、スルーホール導体の内壁に孔埋め樹脂を
充填し硬化した後、スルーホール導体の内壁から突出し
た余分な孔埋め樹脂を研磨してその上下面を平坦にした
としても配線基板の表面を過剰に研磨することはなく、
配線基板表面の配線導体層を断線させてしまうことはな
い。また、このダミー配線導体層は、スルーホール導体
の周囲に各スルーホール導体を区画するように配置され
ており、スルーホール導体とは接続されていないことか
ら、スルーホール導体の特性インピーダンスの整合を阻
害することがない。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board for housing electronic components such as semiconductor elements. 2. Description of the Related Art Conventionally, as a wiring board of an organic material for mounting a semiconductor element, for example, a copper foil is formed on both sides or one side of an insulating layer obtained by impregnating a fiber base material with a thermosetting resin. 2. Description of the Related Art A multilayer printed wiring board is used in which a plurality of wiring boards each having a wiring conductor layer adhered thereto are laminated via an adhesive layer made of a fiber base material impregnated with a thermosetting resin. In this wiring board, a plurality of through holes penetrating from the upper surface to the lower surface thereof are provided, and the inner wall of the through hole is used for electrically connecting wiring conductor layers located vertically above and below each insulating layer. A through-hole conductor made of a copper plating film is adhered and formed, thereby enabling three-dimensional high-density wiring. In addition, around the through-hole conductor to which the wiring conductor layer is not connected on the surface of each insulating layer, a circular shape connected to the through-hole conductor is used in order to reduce unevenness of the periphery of the through-hole conductor on the surface of the wiring board. A dummy land composed of an annular conductor layer is provided so as to surround the through-hole conductor. Such a wiring board has a thickness of 0.1%.
A plurality of wirings each having a wiring conductor layer made of a copper foil having a thickness of about 10 to 50 μm formed on both sides or one side of an insulating layer formed by impregnating a thermosetting resin into a fiber base material having a thickness of about 0.5 mm. After laminating and hot-pressing the board via an adhesive layer formed by impregnating a thermosetting resin precursor into a fibrous base material having a thickness of about 0.1 to 0.2 mm, the diameter is 200 to 5 from its upper surface to its lower surface.
A through hole of about 00 μm is drilled at an interval of about 600 to 1500 μm by drilling, and then a through-hole conductor made of a copper plating film having a thickness of about 15 to 30 μm is formed on the inner wall of the through hole by electroless plating and electrolytic plating. After filling and curing the inside of the through-hole on which the copper plating film is applied, and then curing, the excess filling resin protruding from the through-hole is polished to flatten its upper and lower surfaces. It is produced by. However, in recent years, with the increase in the operating speed of the semiconductor element mounted on the wiring board, the electrical characteristics of the wiring board have been improved so that the mounted semiconductor element does not malfunction. Is becoming necessary,
As a means thereof, it has been studied to omit the dummy land connected to the through-hole conductor and to match the characteristic impedance of the through-hole conductor to suppress the generation of noise. However, when the dummy lands are removed, a recess of several tens of μm is formed around the through-hole conductor from which the dummy lands have been removed on the surface of the wiring board after lamination of the wiring board. As a result, holes are formed inside the through-holes. When polishing the filling resin protruding from the inside of the through hole after filling the filling resin, several tens of μm
When the depression m is completely flattened, the surface of the wiring substrate is excessively polished, thereby causing a problem that the wiring conductor layer on the surface of the wiring substrate is disconnected. SUMMARY OF THE INVENTION The present invention has been completed in view of the above-mentioned problems of the prior art. It is an object of the present invention to match the characteristic impedance of a through-hole conductor and prevent the through-hole conductor from being recessed on the surface of the wiring board around the through-hole conductor. Another object of the present invention is to provide a wiring board having no disconnection of a wiring conductor layer. According to the present invention, there is provided a wiring board in which a plurality of insulating layers each formed by impregnating a fiber base material with a thermosetting resin and a plurality of wiring conductor layers are laminated, and the insulating layer is penetrated. And
It comprises a plurality of through-hole conductors arranged in a grid for electrically connecting the wiring conductor layers located vertically above and below the insulating layer, and the upper and lower conductors connected by the grid-like through-hole conductors are provided. A wiring conductor layer that is not connected to the through-hole conductor between the wiring conductor layers and that defines each through-hole conductor around the through-hole conductor on the same plane as the non-connection wiring conductor layer Is provided. According to the wiring board of the present invention, between the upper and lower wiring conductor layers connected by the grid-like through-hole conductor,
A wiring conductor layer that is not connected to the through-hole conductor is provided, and a dummy wiring conductor layer in a grid shape that partitions each through-hole conductor is provided around the through-hole conductor on the same plane as the unconnected wiring conductor layer. As a result, no pits are formed around the through holes on the upper and lower surfaces of the wiring board. As a result, after filling the inside of the through holes with the filling resin and curing, the extra holes protruding from the inside of the through holes are filled. Even if the upper and lower surfaces are polished by polishing the resin, the surface of the wiring substrate is not excessively polished, and the wiring conductor layer on the surface of the wiring substrate is not broken. The dummy wiring conductor layer is arranged so as to partition each through-hole conductor around the through-hole conductor, and is not connected to the through-hole conductor, so that the characteristic impedance of the through-hole conductor is matched. Does not inhibit. Next, a wiring board according to the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view illustrating an example of an embodiment of a wiring board according to the present invention, and FIG. 2 is a plan view of a main part of an insulating layer on which a grid-like dummy wiring conductor layer is formed. In this embodiment, a wiring board with a heat sink, in which a heat sink is joined to the lower surface of the wiring board, will be described as an example. In these figures, 1 is an insulating layer, 2 is a wiring conductor layer, 3 is a wiring board composed of the insulating layer 1 and the wiring conductor layer 2, 4a is a through hole, 4b is a through hole conductor, 5
Is a dummy wiring conductor layer, and 6 is an adhesive layer, and these mainly constitute the wiring board of the present invention. The insulating layer 1 has a hole H for accommodating a semiconductor element (not shown) at the center thereof.
Function as a support, for example, the thickness of an organic insulating material impregnated with a thermosetting resin of epoxy resin or bismaleimide triazine resin / polyphenylene ether resin on a fiber base material such as glass cloth or aramid nonwoven fabric is 0.1 to 0.1
It is a 0.3 mm flat plate. A wiring conductor layer 2 made of a copper foil having a thickness of 7 to 12 μm is adhered on both upper and lower surfaces thereof, thereby forming a so-called double-sided copper-clad board serving as the wiring board 3. A plurality of wiring boards 3 having a hole H in the center are made of a thermosetting resin such as an epoxy resin, a bismaleimide triazine resin or a polyphenylene ether resin on a fiber base such as glass cloth or aramid nonwoven fabric. The layers are laminated via the impregnated adhesive layer 6, thereby forming a laminated substrate. Note that, in this example, a case is shown in which the laminated substrate includes the three-layered wiring board 3. The laminated substrate has a diameter of 200 to 500 μm penetrating from the upper surface to the lower surface, and is 600 to 1500 μm.
A plurality of through-holes 4a are formed at intervals of μm, and through-hole conductors 4b for electrically connecting the wiring conductor layers 2 located above and below via an insulating layer 1 are formed on the inner wall of the through-hole 4a. Are applied by a plating method. The laminated substrate has a thickness of 0.5 to 2.0 mm. If the thickness is less than 0.5 mm, heat and external force may be generated when a plurality of through holes 4a are formed through the upper and lower surfaces of the laminated substrate described later. There is a large risk that the wiring board will be warped or deformed due to the influence of the above, and the flatness required for the wiring board will not be secured. On the other hand, if it exceeds 2.0 mm, the through hole 4a will When the through-hole conductor 4b is formed on the inner wall, the plating solution does not easily enter the inside of the through-hole 4a, and the through-hole conductor 4b
Is difficult to form satisfactorily. Therefore, the thickness of the laminated substrate is preferably in the range of 0.5 to 2.0 mm. The through-hole conductor 4b has an inner wall of the through-hole 4a coated with a copper plating layer of 1 to 3 μm by electroless copper plating and further coated with an electrolytic copper plating layer of 15 to 30 μm by electrolytic copper plating. It is formed by doing. Further, the inside of the through hole 4a is filled with a filling resin 7 composed of a photosensitive resin, a photoinitiator and an inorganic insulating filler. As a method of filling the hole filling resin 7, screen printing is generally adopted. Then, after the through-hole conductor 4b is formed on the inner wall of the through-hole 4a, the inside of the through-hole 4a is filled with the hole-filling resin 7 and hardened. The surface of the wiring board is flattened by polishing. If the surface of the wiring board is not sufficiently flattened, there is a concern that the reliability of connection between the wiring board and the external electric circuit board may be deteriorated when the wiring board is mounted on the external electric circuit board. In the wiring board of the present invention, as shown in the plan view of the main part in FIG. 2, the through-hole conductor 4b is provided between the upper and lower wiring conductor layers 2 connected by the grid-like through-hole conductor 4b. And a grid-like dummy wiring conductor layer 5 for partitioning each through-hole conductor 4b around the through-hole conductor 4b on the same plane as the non-connection wiring conductor layer 2. Is provided.
This is important for the wiring board of the present invention. According to the wiring board of the present invention, the upper and lower wiring conductor layers 2 connected by the grid-like through-hole conductors 4b.
A wiring conductor layer 2 that is not connected to the through-hole conductor 4b is disposed therebetween, and a grid-like shape that partitions each through-hole conductor 4b around the through-hole conductor 4b on the same plane as the non-connection wiring conductor layer 2 Since the dummy wiring conductor layer 5 is provided, the dummy wiring conductor layers 5 arranged in a lattice pattern between the through-hole conductors 4b do not cause depressions around the through holes 4a on the upper and lower surfaces of the wiring board. As a result, after filling the inside of the through-hole 4a with the hole-filling resin 7 and hardening, the surface of the wiring board is flattened even if the upper and lower surfaces thereof are flattened by polishing the excess hole-filling resin 7 protruding from the through-hole 4a. There is no excessive polishing, and no breakage of the wiring conductor 2 on the surface of the wiring board. Also,
Since the dummy wiring conductor layers 5 are arranged in a lattice pattern between the through-hole conductors 4b and are not connected to the through-hole conductors 4b, the matching of the characteristic impedance of the through-hole conductors 4b is hindered. Absent. Such a grid-like dummy wiring conductor layer 5
Is formed simultaneously with the wiring conductor layer 2 and has a width of 100 to 800
It is preferably μm. The width of the dummy wiring conductor layer 5 is
If the thickness is smaller than 100 μm, after the wiring board 3 is laminated, irregularities in the periphery of the through-hole conductor 4b surrounded by the dummy wiring conductor layers 5 arranged in a grid on the surface of the wiring board tend not to be favorably reduced. If it is wider than 800 μm, it tends to be difficult to match the characteristic impedance of the through-hole conductor 4b by contact with the through-hole conductor 4b. Therefore, the grid-like dummy wiring conductor layer 5 has a width of 100 to 800
It is preferably μm. In addition, the dummy wiring conductor layer 5
Is preferably equal to the thickness of the wiring conductor layer 2 from the viewpoint of reducing unevenness on the surface of the wiring board. The wiring conductor layer 2 on the surface of the wiring board according to the present invention forms a wiring pattern including a power supply wiring, a ground wiring and a signal wiring. Electrodes of an external electric circuit board (not shown) are connected to exposed portions of 2 through solder bumps 11, and a radiator plate 13 is joined to the lower surface of the substrate 2 via an adhesive 12. The radiator plate 13 functions to radiate the heat generated by the mounted semiconductor element to the outside well,
It is formed of a metal having good heat dissipation such as copper. Further, the surface of the wiring conductor layer 2 on the surface of the wiring board is prevented from being oxidized and corroded, and the solder bumps 11 are formed.
In order to improve the connection with the solder, a plating layer of nickel-gold or the like having good wettability with solder and excellent corrosion resistance is applied. Further, on the surface of the wiring board, a solder-resistant resin layer 14 having an opening exposing a central portion of the wiring conductor layer 2 is attached. Such a wiring board is manufactured by the method described below. First, copper foil is applied to both surfaces of an insulating layer 1 in which a resin such as an epoxy resin, a bismaleimide triazine resin, a polyphenylene ether resin is impregnated and cured on a glass cloth or an aramid nonwoven fabric, and a wiring board 3 is laminated. The wiring board 3 having the wiring conductor layer 2 and the lattice-shaped dummy wiring conductor layer 5 formed thereon is manufactured by etching a copper foil other than the surface serving as the outermost layer of the substrate into a wiring pattern, and an appropriate punching method is employed. Then, a hole H for accommodating the semiconductor element is formed in the center of the wiring board 3. The lattice-shaped dummy wiring conductor layer 5 is formed in advance on each insulating layer 1 in a region where the through-hole conductors 4b to which the wiring conductor layer 2 is not connected are present in a lattice pattern. Next, a hole H was formed at the center through an adhesive layer formed by impregnating a thermosetting resin such as an epoxy resin, a bismaleimide triazine resin, or a polyphenylene ether resin into a glass cloth or an aramid nonwoven fabric. Wiring board 3
Are laminated, the degree of vacuum is 660 to 8000 Pa, and the temperature is 180 to
A laminated substrate is formed by hot pressing at 210 ° C. under a pressure of 2 to 5 MPa for several hours. Further, through holes 4a having a diameter of 200 to 500 μm and penetrating the laminated substrate at intervals of 600 to 1500 μm are formed by using a drill. At this time, as described above, in the region where the through-hole conductors 4b to which the wiring conductor layer 2 is not connected are formed in a lattice pattern on the insulating layers 1 by design, a grid-like dummy surrounding the through-hole conductor 4b is formed. The wiring conductor layer 5 is formed. Next, the wiring board is immersed in a roughening solution such as an aqueous solution of permanganate to remove the residual resin inside the through-hole 4a, and then immersed in an aqueous solution of a palladium catalyst for electroless plating to immerse the wiring board in the through-hole 4a. A palladium catalyst is attached to the inner wall of copper, and copper sulfate, Rossell salt, formalin, E
Immerse for several minutes in an electroless copper plating solution composed of DTA sodium salt, stabilizer, etc.
a) and then immersed in an electrolytic copper plating solution composed of sulfuric acid / copper sulfate pentahydrate / chlorine / brightener for several hours while applying a current of several A / dm 2 for several hours. An electrolytic copper plating layer is deposited on the copper plating layer, and the thickness is 15 ~ 30μ
m through-hole conductors 4b are formed. At the same time, a copper plating layer having a thickness of 15 to 30 μm is deposited on a copper foil having a wiring substrate surface having a thickness of 12 to 18 μm. Thereafter, by etching and polishing the copper plating layer on the surface of the wiring board into a wiring pattern, the thickness of the wiring board becomes 15 to
A wiring conductor layer 2 of 30 μm is formed. A part of the wiring conductor layer 2 formed on the surface of the wiring board forms a mounting electrode 15 that is electrically connected to an external electric circuit board via the solder bump 11. On the surface of the wiring board, a solder-resistant resin layer 14 having an opening for exposing the mounting electrode 15 is applied. The solder-resistant resin layer 14 has a thickness of 20 to 60 μm,
For example, it is made of an insulating material containing 30 to 70% by weight of an inorganic powder filler such as silica or talc in a mixture of a photosensitive resin such as an acrylic-modified epoxy resin and a photoinitiator. Is prevented from being electrically short-circuited by the solder bumps 11 and the mounting electrodes 15
Has a function of improving the bonding strength between the semiconductor device and the insulating layer 1. The solder-resistant resin layer 14 is formed by applying an uncured resin film composed of a photosensitive resin, a photoinitiator, and an inorganic powder filler to the surface of the outermost insulating layer 1 or by using a thermosetting resin. And an uncured resin varnish composed of an inorganic powder filler and an uncured resin varnish is applied to the surface of the outermost insulating layer 1 and dried. Thereafter, an opening is formed by exposure and development.
This is formed by curing with ultraviolet light and heat. Thus, according to the wiring board of the present invention, the characteristic impedance of the through-hole conductor 4b is well matched, and the surface of the wiring board around the through-hole conductor 4b cannot be depressed. No wiring board can be provided. It should be noted that the present invention is not limited to the above-described embodiment, and various changes and improvements can be made without departing from the scope of the present invention. In the above-described embodiment, an example is shown in which the wiring board of the present invention is applied to a wiring board with a heat sink. However, it goes without saying that the present invention can be applied to a wiring board having no central hole. According to the wiring board of the present invention, a wiring conductor layer not connected to the through-hole conductor is provided between the upper and lower wiring conductor layers connected by the grid-like through-hole conductor. In addition, a dummy wiring conductor layer in the form of a grid that divides each through-hole conductor is provided around the through-hole conductor on the same plane as the unconnected wiring conductor layer, so that depressions are formed around the through-holes on the upper and lower surfaces of the wiring board. As a result, after filling the inside wall of the through-hole conductor with the filling resin and hardening, as a result, the excess filling resin protruding from the inner wall of the through-hole conductor was polished and the upper and lower surfaces were flattened. Does not excessively polish the surface of the wiring board,
The wiring conductor layer on the surface of the wiring board is not disconnected. The dummy wiring conductor layer is arranged so as to partition each through-hole conductor around the through-hole conductor, and is not connected to the through-hole conductor, so that the characteristic impedance of the through-hole conductor is matched. Does not inhibit.

【図面の簡単な説明】 【図1】本発明の配線基板を放熱板付き配線基板に適用
した場合の実施の形態の一例の断面図である。 【図2】格子状のダミー配線導体層が形成された絶縁層
の要部平面図である。 【符号の説明】 1・・・・・・・絶縁層 2・・・・・・・配線導体層 4a・・・・・・スルーホール 4b・・・・・・スルーホール導体 5・・・・・・・格子状のダミー配線導体層
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view of an example of an embodiment when a wiring board of the present invention is applied to a wiring board with a heat sink. FIG. 2 is a plan view of a principal part of an insulating layer on which a grid-like dummy wiring conductor layer is formed. [Description of Signs] 1 ... Insulating layer 2 ... Wiring conductor layer 4a ... Through hole 4b ... Through hole conductor 5 ... ... Lattice dummy wiring conductor layers

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5E317 AA27 BB02 BB12 CC31 CD25 CD27 CD31 GG20 5E346 AA01 AA12 AA15 AA22 AA43 AA60 BB01 BB06 BB11 BB16 CC02 CC08 CC31 DD02 DD32 EE02 EE06 EE09 FF04 GG22 GG25 GG28 HH03 HH07 HH11 HH32    ────────────────────────────────────────────────── ─── Continuation of front page    F term (reference) 5E317 AA27 BB02 BB12 CC31 CD25                       CD27 CD31 GG20                 5E346 AA01 AA12 AA15 AA22 AA43                       AA60 BB01 BB06 BB11 BB16                       CC02 CC08 CC31 DD02 DD32                       EE02 EE06 EE09 FF04 GG22                       GG25 GG28 HH03 HH07 HH11                       HH32

Claims (1)

【特許請求の範囲】 【請求項1】 繊維基材に熱硬化性樹脂を含浸させて成
る絶縁層と配線導体層とを複数積層するとともに、前記
絶縁層を貫通し、前記絶縁層を挟んで上下に位置する前
記配線導体層間を電気的に接続する格子状に配置された
複数のスルーホール導体を具備して成り、該格子状のス
ルーホール導体で接続されている上下の前記配線導体層
間に、前記スルーホール導体に対し非接続の配線導体層
を配設するとともに該非接続の配線導体層と同一平面で
前記スルーホール導体の周囲に各スルーホール導体を区
画する格子状のダミー配線導体層を設けたことを特徴と
する配線基板。
Claims: 1. An insulating layer formed by impregnating a fibrous base material with a thermosetting resin, and a plurality of wiring conductor layers are laminated, and the insulating layer is penetrated by the insulating layer. It comprises a plurality of through-hole conductors arranged in a grid for electrically connecting the wiring conductor layers located above and below, between the upper and lower wiring conductor layers connected by the lattice-shaped through-hole conductors. A wiring conductor layer that is not connected to the through-hole conductor and a grid-like dummy wiring conductor layer that divides each through-hole conductor around the through-hole conductor on the same plane as the non-connected wiring conductor layer; A wiring board, characterized by being provided.
JP2001395090A 2001-12-26 2001-12-26 Wiring board Pending JP2003198136A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001395090A JP2003198136A (en) 2001-12-26 2001-12-26 Wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001395090A JP2003198136A (en) 2001-12-26 2001-12-26 Wiring board

Publications (1)

Publication Number Publication Date
JP2003198136A true JP2003198136A (en) 2003-07-11

Family

ID=27601613

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001395090A Pending JP2003198136A (en) 2001-12-26 2001-12-26 Wiring board

Country Status (1)

Country Link
JP (1) JP2003198136A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006351971A (en) * 2005-06-17 2006-12-28 Fujikura Ltd Base for multilayer wiring, and multilayer wiring board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006351971A (en) * 2005-06-17 2006-12-28 Fujikura Ltd Base for multilayer wiring, and multilayer wiring board

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Effective date: 20070309