JP2003191520A - Imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To shorten a time elapsing before the quantity of light reaches an appropriate level by raising light emission of an LD quickly. <P>SOLUTION: An APC circuit 100 for writing an image by performing main scanning on the surface of a photosensitive body with a laser beam being outputted from an LD1, outputting a sync detection signal defining a writing start position from a sync detection signal sensor by detecting the laser beam on the outside of main scanning region on the surface of the photosensitive body, and controlling the quantity of light of the LD1 based on the sync detection signal is provided with a hold capacitor circuit 9 subjected to charge/ discharge control based on the sync detection signal, and a feed forward circuit 5 arranged to output an addition current being fed to the LD1 at the time of sampling mode for controlling charge/discharge. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic light quantity for charging a photosensitive member with a laser beam output from a laser diode (hereinafter referred to as "LD") to form an image and keeping the light quantity at a constant value. Output control (Automatic Power
Control: hereinafter referred to as "APC"), and relates to an image forming apparatus such as a digital copying machine, a laser printer, or a facsimile machine.

[0002]

2. Description of the Related Art Conventionally, there has been known an image forming apparatus for writing an image by scanning the surface of a photosensitive member with a laser beam output from an LD. In such an image forming apparatus, the LD has temperature dependency, and the amount of light output varies even when driven by a constant current due to ambient temperature changes, self-heating, etc. Some include an APC circuit that performs APC so that the light amount becomes a constant value. For example, in Japanese Unexamined Patent Publication No. 8-88429, the amount of light output from an LD is detected by a monitor diode using a photodiode (hereinafter referred to as “PD”),
A for controlling the amount of light output from the LD according to the detection result
Techniques relating to PC circuits are disclosed. This APC circuit is configured to change the magnitude of the drive current by switching the charge and discharge of the hold capacitor, and control so that the optical output of the laser beam reaches the target value.

[0003]

However, when the charge / discharge of the capacitor is used to perform the APC as in the above-mentioned conventional technique, the potential of the capacitor is lowered by the discharge during the hold after the charge. By LD
However, there is a problem that the amount of light output by does not increase immediately at the start of the sampling mode and it takes time to reach an appropriate value.

The present invention has been made in order to solve the above problems, and utilizes charge / discharge of a capacitor to
In an image forming apparatus configured to perform PC, L
The purpose is to quickly raise the light emission of D and shorten the time until the amount of light reaches an appropriate value.

[0005]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides an optical scanning means for periodically deflecting a laser beam output from a semiconductor laser by means of a rotating polygon mirror to perform main scanning on the surface of a photosensitive member. And a synchronization detection signal generating means for detecting the laser beam outside the main scanning writing area on the surface of the photoconductor and generating and outputting a synchronization detection signal defining a writing start position by the laser beam in the main scanning direction. And an APC means for controlling the light quantity of the semiconductor laser on the basis of the synchronization detection signal output from the means, the APC means outputs the synchronization detection signal to the synchronization detection signal. A holding means for controlling charging / discharging on the basis of the holding means, and an addition for flowing to the semiconductor laser in a sampling mode in which charging / discharging of the holding means is controlled. It is characterized in the provision of the configured pre-controlling means to output the flow. This image forming apparatus is preferably configured so that the holding means can hold a control voltage for controlling the current flowing through the semiconductor laser. Further, the synchronization detection signal generation means has a comparator for outputting the synchronization detection signal,
It is preferable to provide a means for switching the resistance value of the variable resistor for varying the input voltage of the comparator according to the pixel density.

[0006]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 2 shows the optical scanning optical system (optical scanning means) of the image forming apparatus according to the present invention.
It is a perspective view which shows the structure of the mechanism part. This optical scanning optical system is configured by arranging a collimating lens 12, an aperture 13 and a cylindrical lens 14 in this order from the LD 1 and an LD control plate 1a for controlling the LD 1, and a polygon mirror (rotating polygonal mirror) 15 through A pair of Fθ lenses 16, a correction lens 17, and a reflection mirror 18 are arranged, and further, a synchronization mirror 20 is placed on the surface of the photosensitive drum 19 in a main scanning start point outside a main scanning writing area (outside a predetermined main scanning width). It is installed in the side laser optical path and has a synchronization detection sensor 2.

In this image forming apparatus, when a laser beam is emitted from the LD 1 controlled by the LD control plate 1a, the laser beam is narrowed by the collimator lens 12, the aperture 13 and the cylindrical lens 14 and has a cross section. The polygon mirror 15 which is shaped into a predetermined shape and rotates at a predetermined rotation speed is irradiated with the polygon mirror 15. When the polygon mirror 15 periodically deflects the irradiated laser beam, the reflected laser beam is reflected by the Fθ lens 16
Is converted to a uniform velocity motion by the correction lens 17, and the correction lens 17 corrects the trouble, the reflection mirror 18 changes the angle, and the surface of the photosensitive drum 19 is irradiated. In this way, an electrostatic latent image is formed on the surface of the photoconductor drum 19, and an image is written.

On the other hand, as shown in FIG. 3, after being deflected by the polygon mirror 15, the laser beam passes through the synchronization detecting sensor 2 immediately before scanning the surface of the photosensitive drum 19 in the main scanning direction. Then, the synchronization detection sensor 2
A laser beam passing through the photosensor (P
D) 2a is detected to generate a synchronization detection signal XDETP that defines the writing start position in the main scanning direction by the laser beam. FIG. 4 is a block diagram showing a circuit configuration inside the synchronization detection sensor 2. The synchronization detection sensor 2 includes a PD 2a that performs synchronization detection, a resistor 2b for converting the current output of the PD 2a into a detection voltage, a comparator 2c, and a reference voltage source 2d. The connection line between the PD 2a and the resistor 2b is connected to the input terminal of the comparator 2c, and the reference voltage source 2d is also connected to the input terminal.
Then, when the current I flows due to the light received by the PD 2a, a detection voltage V ₂ is generated by the resistor 2b, the comparator 2c compares the detection voltage V ₂ with the reference potential Vref of the reference voltage source 2d, and the comparison result In response to this (when the detection voltage V ₂ becomes higher than the reference potential Vref), the synchronization detection signal XDETP is pulsed from the output terminal. At this time, the synchronization detection signal XDETP has a width T as shown in FIG.
It is output in a cycle T2 of 1.

FIG. 1 shows an image forming apparatus according to the present invention.
FIG. 3 is a block diagram showing the configuration of an APC circuit 100 provided
is there. The APC circuit 100 is used to adjust the light amount of the LD1.
Corresponding to LD1 and the synchronization detection sensor 2 described above
A synchronous detection sensor circuit 3, a bias power supply circuit 4,
Feed forward circuit 5, control circuit 6,
Constant current circuit for charging 7, Constant current circuit for discharging 8, Hall
It has a capacitor circuit 9 and an error amplifier circuit 10.
Is made. The synchronization detection sensor circuit 3 includes a PD 2a,
The first switch 3a, the second switch 3b, and the
A variable resistor for setting the light amount corresponding to the light source 2c and the resistor 2b.
Anti-VR ₁, VR_TwoAnd two corresponding to the reference voltage source 2d
Reference potential Vref₁, Vref _TwoGenerating a reference voltage source
And 3d. And PD2a is
Variable resistor VR via switch 3a of No. 1₁, VR_TwoContact with
The connection line between the PD 2a and the first switch 3a
Connect to the input terminal of the comparator 2c, and
The pressure source 3d is connected to the input terminal via the second switch 3b.
Has been done. The output terminal of the comparator 2c is
Connected to the input terminal of the loop circuit 6.

The bias power supply circuit 4 is connected to the LD 1 and has a bias current source 4a and a resistor R ₂ . The feedforward circuit 5 is a preceding control circuit which is a feature of the image forming apparatus according to the present invention, and is connected to the error amplification circuit 10. Control circuit 6
Is connected to the output terminal of the comparator 2c, inputs the sampling / hold signal (S / H signal), and has its output terminals connected to the charging constant current circuit 7 and the discharging constant current circuit 8, respectively. . Hold capacitor circuit 9
Is a holding means whose charging / discharging is controlled based on the synchronization detection signal XDETP, and has a third switch 9a and hold capacitors C ₁ and C ₂ . The error amplification circuit 10 includes an error amplifier 10a, a transistor tr ₁ and
And a resistor R ₁ . Next, the operation of the APC circuit 100 configured as above will be described. When the LD1 emits light and the PD2a receives the emitted light, the corresponding monitor current Im is output. The monitor current Im is input to the first switch 3a, and the first switch 3a switches two switches according to the input signal IN _{1 and} inputs the monitor current Im to the variable resistor VR ₁ or VR ₂ . The detection voltage V ₂ input to the comparator 2c is the monitor current I
When m is input to VR ₁ , V ₂ = Im × VR ₁ , and when m is input to VR ₂ , V ₂ = Im × VR ₂ .

Further, the reference voltage V ₁ is applied to the comparator 2c.
As input, Vref ₁ or Vref _{2 from the} reference voltage source 3d is input via the second switch 3b. That Vre
Although f ₁ and Vref ₂ are switched by the input signal IN ₂ of the second switch 3b, the light amount of the LD ₁ can be switched by switching between Vref ₁ and Vref ₂ . The comparator 2c detects that the detection voltage V ₂ is the reference potential V ₁
When the output voltage V ₃ is smaller than the above, the output voltage V ₃ is output HIGH (high level), and conversely, the detection voltage V ₂ is the reference potential V ₁
When it is larger, the output voltage V ₃ is LOW (low level)
To output. The output voltage V ₃ is the control circuit 6
Entered in. The control circuit 6 is switched between a control voltage sampling mode and a hold mode by a sampling / holding signal (S / H signal). That is, when the S / H signal is LOW is a sampling mode, depending on level or HIGH or LOW of the output voltage _{V 3,} black either of the switches 7a or 8a - make's (closed). In addition, the sampling / hold signal (S /
E when H signal) is HIGH - Rudomo - a de, Oh both switches 7a and 8a - and (open) in Pung, e the potential of the control voltage V ₄ to be input to the error amplifier 10a to a constant value - I'll do it.

[0012] When the switch 7a is turned on (ON), the current from the charging constant current source 7b is supplied to the hold capacitor _{C 1} or _{C 2} potential of the control voltage _{V 4} and rises. On the contrary, when the switch 8a of the discharging constant current circuit 8 is turned on, the electric charge accumulated in the hold capacitor C ₁ or C ₂ is discharged from the discharging constant current source 8b, and the potential of the control voltage V ₄ drops. . In addition, hold capacitor C
_The current flowing through ₁ or C ₂ is switched by the third switch 9a. The error amplifier 10a is not input and the control voltage _{V 4} and the reference potential Vref ₃ is, by the potential of the control voltage _{V 4} is the reference potential Vref ₃ and the error amplifier, the collector current of the transistor Tr ₁ is increased or decreased. As a result, the current flowing through the LD1 increases or decreases, and the light amount of the LD1 is maintained at a constant set value. That is, if the light amount of LD1 is smaller than the set light amount, the LD current increases, and if the light amount of LD1 is larger than the set light amount, LD
The current decreases.

A bias current is supplied to the LD 1 from the bias current source 4a of the bias power supply circuit 4, and the value of the bias current can be changed by changing the value of the resistor R ₂ . By passing this bias current, the LD modulation speed of the LD1 can be increased. In addition, the XDAT input to the error amplifier 10a
A is video data. This XDATA is L (low)
For the error amplifier 10a becomes Akuteibu, the transistor Tr ₁ base - scan the current flows. On the other hand, XD
When ATA is H (high), the current of LD1 is only IB (base current), and only offset light emission occurs, and an image is not formed. In the present invention, charging / discharging of the hold capacitor circuit 9 is controlled based on the synchronization detection signal XDETP output from the comparator 2c, and APC sampling and hold are performed. The synchronization detection signal XDETP is LOW
In the case of, the sampling mode is set, and in the case of HIGH, the hold mode is set.

However, at the end of the hold mode, the hold
Cold capacitor C₁Or C_TwoControl charge is discharged.
Pressure V_FourSampling mode starts when the potential of
The light intensity of LD1 does not increase immediately when the
It will take time to reach. APC circuit 100
Then, in order to prevent such inconvenience,
And a feed forward circuit (advance control circuit) 5 is provided,
The feed forward circuit 5 allows the APC sump
A constant added current I when starting the ring mode ₁Constant
Time (hereinafter, this fixed time is referred to as "current addition time")
Output), and the addition current I₁Will flow to LD1
I am sorry. In this way, the sampling mode of APC
At the time of current, until the current addition time T3 elapses,
The current flowing through LD1 is the bias current and the added current I₁Over
And the current from the error amplifier 10a. However,
After the flow addition time has passed, the feed forward circuit 5
Current I of₁Output to LD1 stops, so it flows to LD1
The current is the bias current and the current from the error amplifier 10a.
Is the sum of

As described above, in the APC circuit 100, at the time of starting the APC sampling mode, the signal is fed.
By adding the addition current I ₁ of the deforwarding circuit 5, the shortage of the current flowing through the LD1 is compensated for and the light emission thereof is quickly started up, and the time until the light quantity of the LD1 reaches a constant value is shortened. ing. In this way, a predetermined amount of light can be promptly output from the LD 1, and a reduction in the amount of light of the LD can be prevented and a high-quality image can be formed. As described above, when the S / H signal input to the control circuit 6 is high (H), it is in the hold mode of the control voltage and both switches 7a and 8a are turned on.
To become Pung, E by the charging voltage of the charge potential of the control voltage V ₄ is stored in the hold capacitor C ₁ or C ₂ (the terminal voltage of the hold capacitor C ₁ or C ₂₎ -
Be killed. In this case, hold capacitor C ₁ or C
_If the capacitance value of ₂ is large, the potential of the control voltage V ₄ is held at a constant value for a long time, but if the capacitance value is small, the potential of the control voltage V ₄ is held at a constant value for a short time. However,
When the capacitance value is small, there is an advantage that the time required to charge to the set value of the potential of the control voltage V ₄ is shortened.

As described above, in the image forming apparatus according to the present invention, the control voltage is held by the hold capacitor circuit 9, and the APC by the APC circuit 100 can be realized with a simple structure without using a CPU or the like. . Further, since the APC by the APC circuit 100 is performed with high accuracy, it is possible to form an image with little density fluctuation. By the way, in the image forming apparatus according to the present invention, as a method of switching the pixel density, for example,
There is a system in which the linear velocity is halved and the light amount of LD1 is halved. In this case, switching the first switch 3a in accordance with the pixel density to be to switch the input signal IN _1, may switch between variable resistor VR ₁ and VR _2. For example, VR ₁
If the resistance value of is set to twice the resistance value of VR ₂ , the light quantity of LD1 when the pixel density is 1200 dpi is half that when the pixel density is 600 dpi, and when the pixel density is to be 1200 dpi, Input signal IN ₁
Is set to HIGH and the variable resistor VR ₂ may be selected. Then, the detection voltage V ₂ becomes half that when the VR ₁ is selected, so that the light amount of the LD 1 can be halved (1/2).

Further, the input signal IN ₂ is switched to Vref.
The light amount of the LD ₁ can also be switched by switching between ₁ and Vref ₂ . For example, if the value of Vref ₁ is set to half (1/2) of Vref ₂ and Vref ₁ is selected, the light amount of LD ₁ can be half (1/2) of that when Vref ₂ is selected. it can. As described above, since the image forming apparatus according to the present invention has the means for switching the light amount of the LD according to the pixel density, the light amount of the LD1 can be switched with a simple structure, and a high quality image can be obtained with a simple structure. it can.

[0018]

As described above, according to the image forming apparatus of the present invention, in order to compensate for the shortage of the current flowing through the LD by adding the addition current of the preceding control circuit, the light emission is quickly started. It is possible to shorten the time until the light amount reaches a constant value.

[Brief description of drawings]

FIG. 1 is a view of an A provided in an image forming apparatus according to the present invention
It is a block diagram which shows the structure of the APC circuit which performs PC.

FIG. 2 is a perspective view showing a configuration of a mechanical portion of the optical scanning optical system of the image forming apparatus according to the present invention.

FIG. 3 is also a plan view showing the main part of the mechanical portion.

FIG. 4 is a block diagram showing a circuit configuration inside a synchronization detection sensor.

FIG. 5 is a timing chart showing an example of a synchronization detection signal XDETP.

[Explanation of symbols]

1: LD 2: Synchronous detection sensor 3: Synchronous detection sensor circuit 4: Bias power supply circuit 5: Feed forward circuit 6: Control circuit 7: Constant current circuit for charging 8: Constant current circuit for discharging 9: Hold capacitor circuit 10: Error Amplifier circuit 2a: PD 2b: Resistor 2c: Comparator 2d: Reference voltage source 3a: First switch 3b: Second switch 4a: Bias current source 7a, 8a: Switch 9a: Third switch 10a: Error amplifier 100: APC circuit

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 2C362 AA03 AA55 AA56 BA04 BB29                       BB37                 2H045 AA01 CA88 CB42                 5C051 AA02 CA07 DB14 DB15 DB22                       DB30 DE30                 5C072 AA03 HA02 HA09 HA13 HB02                       HB13 XA05

Claims (3)

[Claims] 1. A light scanning device for periodically scanning a laser beam output from a semiconductor laser by a rotating polygon mirror to perform main scanning on a surface of a photoconductor, and the optical scanning means outside the main scanning writing area on the surface of the photoconductor. Synchronous detection signal generation means for detecting a laser beam and generating and outputting a synchronous detection signal for defining a writing start position in the main scanning direction by the laser beam, and the semiconductor based on the synchronous detection signal output from the means. An image forming apparatus having an APC unit for controlling a light amount of a laser, wherein the APC unit includes a holding unit for controlling charging / discharging based on a synchronization detection signal output from the synchronization detection signal generating unit, and the holding unit. In the sampling mode in which the charging / discharging of the means is controlled, the preceding control means configured to output the added current for flowing to the semiconductor laser is provided. An image forming apparatus comprising. 2. The image forming apparatus according to claim 1, wherein the holding unit can hold a control voltage for controlling a current flowing through the semiconductor laser. . 3. The image forming apparatus according to claim 1, wherein the synchronization detection signal generation unit has a comparator that outputs the synchronization detection signal, and a resistance value of a variable resistor that changes an input voltage of the comparator. An image forming apparatus, characterized in that a means for switching on and off according to the pixel density is provided.