JP2003178691A - Electron source and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve uniformity of electron discharge characteristics of an electron discharge element. <P>SOLUTION: By using a screen printing method, electrodes 2 and 3 arranged as a matrix and a line direction wiring 5 and a column direction wiring 6 connected to electrodes 2 and 3 of the electron discharge element consisting of a conductive film 4 are formed on a substrate 1. A pseudo-line direction wiring 5' is arranged at X0 position between the line direction wiring 5 of X1 position and an outer collar part of the substrate 1 and a pseudo-column direction wiring 6' is arranged at Y0 position between the column direction wiring 6 of Y1 position and the outer collar part of the substrate 1. Pseudo-electrodes 2' and 3' are electrically connected to the pseudo-line direction wiring 5' and the pseudo-column direction wiring 6'. The distance between the pseudo-line direction wiring 5' and the pseudo-column direction wiring 6', arranged nearest to the line direction wiring 5 and the column direction wiring 6, and the line direction wiring 5 and the column direction wiring 6 is the same or no more than two times of the interval between the adjacent two line direction wirings 5. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron source having a plurality of wirings and a plurality of electron-emitting devices, and a method of manufacturing the electron source.

[0002]

2. Description of the Related Art A large number of electron-emitting devices and wirings connected to them are arranged on a substrate to form a plane type electron source,
Among them, many devices are known as devices used for displaying an image by emitting an electron beam from a desired electron-emitting device. For example, US Pat. No. 5,942,849 (Neil
The Alexander Cade) publication discloses a device for controlling electron emission from a field emitter chip by two grid electrodes (wirings) formed so as to be orthogonal to each other. In this case, the electron-emitting device is formed at the intersection of the wiring. Further, there is also known a structure in which an electron-emitting device is arranged in a portion where there is no wiring on the surface of the substrate in the vicinity of the wiring intersection. The applicant also
We have already proposed a device having such a structure. For example, such a device is disclosed in US Pat. No. 5,654,607.

In particular, the electron-emitting devices are roughly classified into
It is divided into a thermionic emission device and a cold cathode emission device.
A field emission type (hereinafter, “FE type”) is used for the cold cathode electron-emitting device.
, Metal / insulating layer / metal type (hereinafter referred to as “MIM
"Type") and surface conduction electron-emitting devices.

As an example of the FE type, W. P. Dyke
& W. W. Dolan, “Field emmisi
on ”, Advance in Electron P
hysics, 8, 89 (1956) or C.I. A.
Spindt, "Physical Property"
es of thin-film field emi
session cats with with mollyb
denium cones ", J. Appl. Ph.
ys. , 47, 5284 (1976) and the like.

An example of the MIM type is C.I. A. M
ead, "Operation of Tunnel-
Emission Devices ", J. Apply.
Phys. , 32,646 (1961) and the like.

As an example of the surface conduction electron-emitting device,
M. I. Elinson, Recio Electr
on Phys. , 10, 1290 (1965) and the like.

The surface conduction electron-emitting device utilizes a phenomenon that electron emission occurs when a current is passed through a thin film having a small area formed on an insulating substrate in parallel with the film surface. As the surface conduction electron-emitting device, one using the SnO ₂ thin film by Erinson et al., One using the Au thin film [G. Dittmer; “Thin Solid
Films ", 9, 317 (1972)], In ₂
O ₃ / SnO ₂ thin film [M. Hartwell
and C. G. Fonstad; “IEEETran
s. ED Conf. 519 (1975)], a carbon thin film [Hisashi Araki et al .; Vacuum, Vol. 26, No. 1, page 22 (1983)] and the like.

As typical examples of these surface conduction electron-emitting devices, the above-mentioned M. The Hartwell device configuration is shown in FIG.
Is schematically shown in. A conductive film 404 made of a metal oxide thin film or the like formed by sputtering is formed in an H-shaped pattern on the substrate 401, and a portion indicated by hatching in FIG. Thus, the electron emitting portion 405 is formed. The element electrode spacing L in FIG. 19 is 0.5 to 1 mm, and W ′ is 0.1.
It is set in mm.

In these surface conduction electron-emitting devices, the conductive film 404 is previously subjected to an energization process called energization forming before the electron emission, and the electron-emitting portion 405 is formed.
Is generally formed. That is, the energization forming means that a voltage is applied to both ends of the conductive film 404, and
This is a process of locally destroying, deforming or degrading 04 to change the structure and form the electron emitting portion 405 in an electrically high resistance state. Note that a crack is generated in part of the conductive film 404 in the electron emission portion 405, and electrons are emitted from the vicinity of the crack.

Since the surface conduction electron-emitting device described above has a simple structure, there is an advantage that a large number of devices can be arrayed over a large area. Therefore, various applications that can make full use of this feature are being studied. For example, it can be used for an image forming apparatus such as a charged beam source and a display device.

Conventionally, as an example in which a large number of surface conduction electron-emitting devices are formed in an array, as will be described later, surface conduction electron-emitting devices are arranged in parallel, and both ends (both devices) of each surface conduction electron-emitting device are arranged. There is an electron source in which a large number of rows (ladder-like arrangement) in which the electrodes are respectively connected by wiring (common wiring) are arranged (for example, JP-A-64-031332, JP-A-1-283749, and Kaihei 2-257552
No.

In particular, in recent years, as a display device, a flat panel display device similar to a display device using liquid crystal can be used, and a self-luminous display device that does not require a backlight is used as a surface conduction type display device. A display device combining an electron source in which a large number of emitting elements are arranged and a phosphor that emits visible light when irradiated with an electron beam from the electron source is disclosed in US Pat.
It is disclosed in Japanese Patent No. 66883.

Further, the applicant of the present invention previously disclosed in Japanese Patent Laid-Open No. 6-34263.
Japanese Patent Publication No. 6 discloses an example of an image display device using an electron source having a wiring pattern whose schematic configuration is schematically shown in FIG. 20 and having a surface conduction electron-emitting device. In FIG. 20, a plurality of surface conduction electron-emitting devices are arranged in a matrix by upper wiring 73 and lower wiring 72.

FIG. 21 (a) is a plan view showing the structure of the surface conduction electron-emitting device, and FIG. 21 (b) is shown in FIG. 21 (a).
3 is a cross-sectional view showing the configuration of the surface conduction electron-emitting device shown in FIG. The surface conduction electron-emitting device includes a pair of electrodes 202 and 203 on an insulating substrate 201 having an insulating property.
It has a conductive thin film 204 made of fine particles, which is electrically connected to the electrodes 202 and 203, and an electron emitting portion 205 which is formed in a part of the conductive thin film 204 and emits electrons. In this surface conduction electron-emitting device, the distance between the pair of electrodes 202 and 203 is set to several thousand Å to several hundreds μm, and the device electrode length is determined in consideration of the resistance value of the device electrode and electron emission characteristics. It is set to several μm to several hundred μm. Also,
The film thickness of the device electrode is set in the range of several hundred Å to several μm in order to maintain the electrical connection with the conductive film 204. Electrode 20
2, 203 are formed by photolithography, for example. The film thickness of the conductive film 204 is appropriately set in consideration of the step coverage to the electrodes 2 and 3, the resistance value between the element electrodes, the forming conditions, etc., but is set in the range of several Å to several thousand Å. Is preferred, and further 10Å to 5
It is more preferable to set it in the range of 00Å. Further, the sheet resistance value of the conductive film is preferably set such that Rs is 10 ² to 10 ⁷ Ω / □. Note that Rs is represented by R = Rs (l / w), where R is a resistance measured in the length direction of a thin film having a thickness t, a width w, and a length l. Also, the thickness t
And the resistivity ρ is constant, it is represented by Rs = ρ / t.

FIG. 22 shows the above-mentioned JP-A-6-34263.
FIG. 6 is a schematic configuration diagram showing an example of an image display device using an electron source in which a plurality of surface conduction electron-emitting devices are wired in a matrix, which is disclosed in Japanese Patent Publication No. Rear plate 8
1, the outer frame 82, and the connection portions of the face plate 86 are sealed with an adhesive such as a low-melting glass frit (not shown), and an envelope (airtight container) 88 for maintaining a vacuum inside the image display device is provided. I am configuring. The substrate 71 is fixed to the rear plate 81. On the substrate 71, m × n surface conduction electron-emitting devices are formed in an array (m and n are positive integers of 2 or more, and are appropriately set according to the target number of display pixels). . In addition, the surface conduction electron-emitting device 7
As shown in FIG. 22, reference numeral 4 denotes m row-direction wirings 72 and n.
It is wired by a column direction wiring 73. The row wirings 72 and the column wirings 73 are formed by, for example, a photolithography technique. A substrate 71, a plurality of electron-emitting devices 74 such as surface conduction electron-emitting devices,
A portion composed of the row-directional wiring 72 and the column-directional wiring 73 is called a multi-electron beam source. Further, at least at the intersection of the row-directional wiring 72 and the column-directional wiring 73, an interlayer insulating layer (not shown) is formed between the two wirings to electrically connect the row-directional wiring 72 and the column-directional wiring 73. Insulation is maintained.

A phosphor film 84 made of a phosphor is formed on the lower surface of the face plate 86, and phosphors (not shown) of three primary colors of red (R), green (G) and blue (B) are applied. It is divided. A black body (not shown) is arranged between the phosphors of the respective colors forming the phosphor film 84. Further, a metal back 85 made of Al or the like is formed on the surface of the fluorescent film 84 on the rear plate 82 side.

Dx1 to Dxm and Dy1 to Dyn are terminals for electrical connection having an airtight structure provided for electrically connecting the image display device and an electric circuit (not shown). Dx1
Dxm are electrically connected to the column direction wiring of the multi-electron beam source. Similarly, Dy1 to Dyn are also electrically connected to the row-direction wiring of the multi electron beam source.

The inside of the envelope (airtight container) is 1.33
It is maintained at a vacuum of × 10 ^-4 Pa or less. for that reason,
The larger the display screen of the image display device, the more necessary means for preventing the rear plate 81 and the face plate 86 from being deformed or destroyed due to the pressure difference between the inside and the outside of the envelope (airtight container). Therefore, the face plate 86
Between the rear plate 81 and the rear plate 81, a supporting member (not shown) called a spacer or a rib for supporting atmospheric pressure resistance may be arranged.

In this way, the substrate 71 on which the electron-emitting devices are formed and the face plate 86 on which the fluorescent film is formed.
Is generally maintained at several hundred μm to several mm, and the inside of the envelope (airtight container) is maintained at high vacuum. The image display device described above has the external terminals Dx1 to Dxm, Dy of the container.
Electrons are emitted from each surface conduction electron-emitting device by applying a voltage to each surface conduction electron-emitting device through 1 to Dyn, the row-direction wiring 72, and the column-direction wiring 73.

At the same time, a high voltage of several hundred V to several kV is applied to the metal back 85 through the terminals outside the container to accelerate the electrons emitted from the surface conduction electron-emitting device, so that the inner surface of the face plate 86 can be accelerated. It collides with the formed phosphor of each color. As a result, the phosphor is excited and emits light, and an image is displayed.

In order to form the image display device, it is necessary to form a large number of the electron-emitting devices and the row-direction and column-direction wirings in an array.

As a method of forming a large number of rows of the electron-emitting devices and the wirings in the row and column directions, the above-mentioned photolithography technique, etching technique and the like can be mentioned.

However, for example, in the case of forming an image display device having a large screen of several tens of inches using surface conduction electron-emitting devices, if a photolithography technique and an etching technique are used, a large substrate having a diagonal of several tens of inches. Large-scale manufacturing equipment such as a vapor deposition apparatus and a spin coater corresponding to the above, an exposure apparatus, an etching apparatus, etc. are required, and there are problems such as difficulty in handling in the manufacturing process and cost increase.

Therefore, it is conceivable to form a large number of the electron-emitting devices and the row-direction and column-direction wirings in an array by using a printing technique which is relatively inexpensive and does not require a vacuum device or the like and can cope with a large area. Japanese Patent Application Laid-Open No. 9-2 by the applicant
It is disclosed in Japanese Patent No. 93469.

Further, the applicant of the present invention has previously filed Japanese Unexamined Patent Publication No. 8-341.
Japanese Unexamined Patent Publication (Kokai) No. 10 discloses that a large number of row-direction and column-direction wirings are formed in an array by using a screen printing technique.

The screen printing is suitable for increasing the thickness of the wiring in order to pass a certain amount of current through the wiring. For example, a printing paste containing metal particles is used to form a plate having openings of a desired pattern. As a mask, a printing paste is transferred from the opening onto a substrate that is a printing target, and then firing is performed to form a conductor wiring having a desired pattern.

Regarding screen printing, the screen mesh 42 and the substrate 100 used in the screen printing apparatus.
23 which is a perspective view of FIG.
And FIG. 24 which is a cross-sectional view of the substrate 100.

Note that FIG. 23 shows the plate frame 41 and a part of the screen mesh 42 in a cutaway manner in order to facilitate the explanation of the printing situation.

First, the outline of screen printing will be described.

As shown in FIG. 23, the screen mesh 42 is formed by extracting a plate pattern 46 for discharging the printing paste 47 from a resin film formed on a mesh made of a material such as stainless steel, which is set appropriately. The plate frame 41 is tensioned. On the screen mesh 42 on which the pattern 45 is formed, a printing paste 47 to be printed on the substrate 100 that is the printing target is spread, and the squeegee 43 sweeps while pressing the screen mesh 42 to print a pattern 46. Substrate 100
Printed on.

Next, the procedure of screen printing will be described.

First, the plate frame 41, that is, the surface of the screen mesh 42 and the substrate 100 are set in a predetermined gap 48. Next, the squeegee 43 is lowered until the screen mesh 42 contacts the substrate 100 at the pressing portion 44. Next, spread the printing paste 47 in front of the squeegee 43,
The squeegee 43 is swept in the direction of arrow E in FIG. 23 while the squeegee 43 is lowered so that the screen mesh 42 is always in contact with the substrate 100, and the printing paste 47 is scraped off. At this time, the printing paste 4 is pressed by the pressure from the squeegee 43.
The printing paste 47 is transferred onto the substrate 100 through the plate pattern 46. At the same time, the printing paste 47 is separated from the screen mesh 42 by the restoring force derived from the vertical component of the tension 44 of the pressing portion 44 of the screen, and the printing paste 47 is separated from the screen mesh 42. Print pattern 4
6 is formed.

[0033]

As described above, a group of wirings (hereinafter referred to as "row-direction wirings" and "column-direction wirings") each of which is orthogonal to each other and each of which is composed of a plurality of wirings, and a plurality of wirings connected to them. In the electron source composed of the electron-emitting device, the substrate surface is finely divided by row-direction wiring and column-direction wiring except near the edge of the substrate, but the row-direction wiring near the edge of the substrate, At least one of the column wirings is not arranged. For example, as shown in FIG. 25, three row-direction wirings and three column-direction wirings are formed on the substrate 402 in order to supply electric power to nine electron-emitting devices arranged in a 3 × 3 matrix. In the case of the charged electron source, a charged region having a large amount of electrostatic charge on the surface in which the exposed portion other than the wiring is relatively wide is likely to be formed in the portion shown in the figure. In particular, as shown in FIG. 25, in the case where the electron-emitting device is formed on the surface of the substrate 402 instead of at the wiring intersection, the outer device 401, which is one of the outermost device rows, is The outside, that is, the substrate 402
There is no wiring in the row direction between the outer edge of the outer element 401 and the outer element 401,
Therefore, there is a possibility of being strongly affected by the charged area on the surface of the substrate 402 in the vicinity of the element, where the charged amount is increased. There is a similar concern regarding the row direction of the outer elements 401.

The following points are of concern as problems caused by the increase in the amount of charge on the surface of the substrate near the element. (1) In the electron-emitting device belonging to the row of elements having no row-direction wiring on the outside and the column of elements having no column-direction wiring on the outside, the charge amount on the substrate surface in the vicinity of the elements is higher than that of other elements. The electric field distribution around the device becomes different. Therefore, the electron emission characteristics are different from the electron emission characteristics of other parts, and the uniformity of the electron emission characteristics is impaired. (2) Since the distribution of the electric field around the element is different as described above, the orbits of the emitted electrons are different from those of other portions. Therefore, the effective uniformity as an electron source is further impaired. (3) The amount of charge on the surface of the substrate also varies depending on the driving conditions (driving voltage, driving pulse width, etc.) of the element. For this reason, the electron-emitting device having no row-direction wiring or column-direction wiring on the outside has a larger influence than the others, and the characteristic changes due to the above (1) and (2) also largely change with time and the characteristic changes. Fluctuations are particularly large in this part. (4) Since the charge amount becomes large, discharge may occur between the charged portion of the substrate surface and the element, wiring, etc., which may damage the electron-emitting device and reduce the electron emission amount. Or the device may be destroyed.

Further, using the above-mentioned screen printing method,
When forming a plurality of parallel wirings, the following problems occur. As mentioned above, screen printing presses the mesh screen onto the substrate. When the mesh screen is separated from the substrate after the printing paste is transferred to the substrate through the pattern formed on the mesh screen,
As described above, a force for separating the mesh screen from the substrate and a force for adhering the mesh screen to the substrate due to the printing paste transferred to the substrate are exerted on the portion of the mesh screen. Focusing on the pattern of one wiring, print patterns are being formed on both sides of the pattern, and the process of separating the mesh screen from the substrate progresses while being affected by the adhesive force of each pattern. Therefore, among many parallel wiring patterns, the pattern in the vicinity of the center and the pattern in the end have different ways of receiving force. In particular, in the outermost wiring pattern, since the force of adhesion does not work outside that, the transfer of the printing paste is likely to be non-uniform, resulting in defective printing pattern shape and poor contact between wiring and element electrode. In some cases, the resistance distribution of the wiring, the increase in resistance in the outer peripheral portion, the disconnection, and the like occurred.

Therefore, an object of the present invention is to realize an electron source and a method of manufacturing the electron source, which have good characteristics. In the embodiments of the invention described below, which describe specific examples of the invention according to the present application, specific examples that can improve at least one of the problems specifically described above are described.

[0037]

One of the inventions of an electron source according to the present application is to provide a plurality of first wirings on a substrate, the plurality of first wirings having a longitudinal direction substantially along the first direction, and the first wiring. A plurality of electron-emitting devices connected to each of the plurality of first wirings and the second wiring, and at least one second wiring having a longitudinal direction that is substantially along a second direction intersecting the direction. An electron source having: a first outer electron-emitting device in which the first wiring does not exist between the outer edge of the substrate and the outer edge of the plurality of electron-emitting devices; And a potential applied to the first wiring, in the vicinity of the first outer electron-emitting device, the side on the first outer electron-emitting device side has a shape substantially along the first direction, At least one first electric conductor to which the same electric potential is applied,
Of the plurality of electron-emitting devices, between the second outer electron-emitting device in which the second wiring does not exist between the substrate and the outer edge portion of the substrate, and the outer edge portion, and the second outer portion. In the vicinity of the electron-emitting device, there is provided at least one second conductor whose side on the side of the second outer electron-emitting device has a shape that is substantially along the second direction. The distance between the conductor and the first wiring closest to the first conductor is not more than twice the distance between the first wirings adjacent to each other.

In the electron source of the present invention as described above, the distance between the first conductor and the first wiring closest to the first conductor is such that the first wirings are adjacent to each other. By setting the distance to twice or less, it is possible to effectively suppress charging.

Further, in the electron source of the present invention, the distance between the first conductor and the second wiring closest to the first conductor is set to the distance between the first wirings adjacent to each other. It should be approximately the same as. Here, that the intervals are substantially the same means that the difference between the intervals is within 20% of the interval. In addition, the interval mentioned here is a distance between the sides in the longitudinal direction of the wirings adjacent to each other, and when the distances are not uniform, the average value thereof is used.

Further, it is also effective that the plurality of first conductors are adjacent to each other at a distance narrower than the distance between the first wirings adjacent to each other.

The resistance value of the first conductor is preferably 10 times or less than the resistance value of each first wiring. It is desirable that the conductor and the wiring have substantially the same resistance value.

Further, in the electron source of the present invention, the distance between the second conductor and the second wiring closest to the second conductor is the distance between the second wirings adjacent to each other. Of 2
By setting the ratio to be equal to or less than twice, charging can be effectively suppressed.

The distance between the second conductor and the second wiring closest to the second conductor may be substantially the same as the distance between the adjacent second wirings. .

Further, it is also effective that the plurality of second conductors are adjacent to each other at an interval narrower than the interval between the second wirings adjacent to each other.

The resistance value of the second conductor is preferably 10 times or less than the resistance value of each second wiring. It is desirable that the conductor and the wiring have substantially the same resistance value.

The method of manufacturing an electron source according to the present application is the method of manufacturing an electron source having a plurality of wirings and a plurality of electron-emitting devices connected to the wirings, the method being a screen printing method.
The method is characterized by including a step of forming a wiring pattern and forming a conductor pattern similar to the wiring also outside a region where the wiring is formed.

[0047]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the invention will be described with reference to the drawings.

FIG. 1 is a schematic plan view showing the structure of an example of the electron source of the present invention. Here, for simplicity, 3 × 3
Although it is shown that it is composed of nine electron-emitting devices arranged in a matrix, the actual electron source has a larger number of electron-emitting devices.

On the substrate 1 of the electron source 9, in the X direction, X1
A row-direction wiring 5 which is a wiring for driving the electron-emitting device indicated by X3 and a pseudo row-direction wiring 5 ′ which is a non-driving wiring which is a feature of the present invention and which is indicated by X0 are formed. , Y direction, column-direction wiring 6 shown by Y1 to Y3, which is a wiring for driving electron-emitting devices, and pseudo column-direction wiring shown by Y0, which is a non-driving wiring which is a feature of the present invention. 6'is formed. In addition, the row-direction wiring 5 and the pseudo-row-direction wiring 5 '
Between the column-direction wiring 6 and the pseudo-column-direction wiring 6 ',
An interlayer insulating layer 7 that electrically insulates the row-direction wiring 5 and the pseudo-row-direction wiring 5 ′ from the column-direction wiring 6 and the pseudo-column-direction wiring 6 ′.
Are formed.

That is, the pseudo row-direction wiring 5'is an electron-emitting device in which the row-direction wiring 5 does not exist between the outer edge portion of the substrate 1 and the electron-emitting element, that is, the row-direction wiring 5 of X1.
Between the electron-emitting device connected to and the upper outer edge portion of the substrate 1 (range A in FIG. 1) and not connected to the upper outer edge portion but to the row-direction wiring 5 of X1. It is provided in a region close to the emitting element. In addition, a side B in the longitudinal direction of the pseudo row wiring 5 ′ on the side of the electron-emitting device connected to the row wiring 5 of X1 (not the side C of the pseudo row wiring 5 ′ on the upper outer edge side). ) Are formed parallel to the longitudinal direction of the row wiring 5. Furthermore, the conductive film 4 for functioning as an electron-emitting device is not connected to the pseudo row direction wiring 5'between the pseudo electrodes 2'and 3'as will be described later. In addition, the side C of the pseudo wire 5 '
May be formed in parallel with the longitudinal direction of the row wiring 5.

Similarly, regarding the pseudo column direction wiring 6 ', in FIG. 1, the pseudo column direction wiring 6'is such that the column direction wiring 6 does not exist between the outer edge portion of the substrate 1 and the electron-emitting device. The electron-emitting device, that is, between the electron-emitting device connected to the column-direction wiring 6 of Y1 and the left outer edge portion of the substrate 1 (range D in FIG. 1) and not in the vicinity of the left outer edge portion, Y1 Is provided in a region close to the electron-emitting device connected to the column-direction wiring 6. Also, the pseudo column direction wiring 6 '
The side E in the longitudinal direction on the electron-emitting device side connected to the column-directional wiring 6 of Y1 (not the side F of the pseudo column-directional wiring 6'on the left outer edge side) of the column-directional wiring 6 is It is formed parallel to the longitudinal direction. Further, the conductive film 4 for functioning as an electron-emitting device is not connected to the pseudo column direction wiring 6'between the pseudo electrode 2'and the pseudo electrode 3'as described later. The side F of the pseudo column direction wiring 6 ′ may also be formed in parallel with the longitudinal direction of the column direction wiring 6.

The pseudo-direction wiring 5'is the row-direction wiring 5 '.
It is preferable that the shape is the same as. This is to make the electric field around the electron-emitting device, which will be described later, similar to that of other devices. For the same reason, it is preferable that the pseudo column direction wiring 6 ′ also has the same shape as the pseudo column direction wiring 6 ′.

In the surface conduction electron-emitting device, a coating is formed on a deposit containing carbon as a main component, and a conductive film 4 in which a crack (not shown) for emitting electrons is formed, and the conductive film 4. It is composed of an electrode 2 connecting the row-direction wiring 5 and an electrode 3 connecting the conductive film 4 and the column-direction wiring 6. The electrodes 2 and 3 are the conductive film 4, the row-direction wirings 5 and the column-direction wirings 6.
It is provided in order to make good ohmic contact with. Usually, the conductive film 4 is a film that is extremely thin as compared with the conductor layer for wiring, and therefore is provided in order to avoid problems such as “wetting property” and “step difference maintaining property”. Further, each electron-emitting device is formed at a different position so as not to overlap the row-direction wiring 5 and the column-direction wiring 6.

Although the surface conduction electron-emitting device is shown as an example of the electron-emitting device, the device is not limited to this, and any kind of device may be used.

Further, in the pseudo row direction wiring 5'formed on the outer edge side of the substrate 1, a pseudo electrode 2'corresponding to the electrode 2 is formed, and similarly, on the pseudo row direction wiring 5'formed on the outer edge side of the substrate 1. 6 '
The pseudo electrodes 3'corresponding to the electrode 3 are electrically connected to each. The conductive film 4 is not connected to these pseudo electrodes 2'and 3 '. Also, the pseudo electrodes 2'and 3'are X
It is provided in order to bring the electric field around the electron-emitting device connected to the row wiring 5 of 1 and the column wiring 6 of Y1 closer to other devices, but it is not always necessary and these are not provided. Even in this case, the effect of the present invention can be obtained.

It should be noted that it is preferable to avoid forming an electron-emitting device in the portion where the pseudo electrodes 2'and 3'are formed in the same manner as the other portions. This is because when a potential is applied to the row-direction wiring 5 and the column-direction wiring 6 to drive the electron source 9, some of the row-direction wiring 5 or the column-direction wiring 6 and the pseudo-row-direction wiring 5 ′ or the pseudo-column Directional wiring 6 '
A potential difference is generated between them and some current flows. As a result, completely unnecessary power is consumed. Furthermore, if an electron-emitting device is connected to the pseudo row directional wiring 5'or the pseudo column directional wiring 6'when a discharge occurs at the outer edge of the substrate 1, the pseudo row directional wiring 5'or the pseudo column directional wiring 5 ' Charges may flow into the row-direction wirings 5 and the column-direction wirings 6 via the electron-emitting devices connected to the wirings 6 ′, in which case the electron-emitting devices normally used as the electron source 9 may be damaged. . However, if no electron-emitting device is formed in the pseudo row directional wiring 5'or the pseudo column directional wiring 6 ', this charge will flow out through the pseudo row directional wiring 5'or the pseudo column directional wiring 6'. Therefore, it is possible to prevent the electron source 9 from being damaged. In order to avoid such a problem, formation of an element connected to the pseudo wiring should be avoided. However, as is clear from this reason, the pseudo row-direction wiring 5 ′ or the pseudo column-direction wiring 6 ′ may be connected to any electron-emitting device that is not connected to the row-direction wiring 5 or the column-direction wiring 6. Good.

As described above, the pseudo row direction wirings 5'and the pseudo column direction wirings 6'which are not connected to the electron-emitting devices have wirings outside when the respective wiring patterns are formed by the screen printing method described later. In addition to fulfilling the role of suppressing the defective printed pattern due to the absence of the pattern, and, as will be described later, making the electric field around the electron-emitting device near the outer edge of the substrate 1 similar to that of other devices, the It also has an effect of preventing damage to the electron source 9 due to discharge or the like.

The electric resistances of the pseudo row directional wiring 5 ′ and the pseudo column directional wiring 6 ′ are as follows.
The electrical resistance of 10 times or less is preferable.

The pseudo row directional wiring 5 ′ may be connected to the row directional wiring 5, and the pseudo column directional wiring 6 ′ may be connected to the column directional wiring 6. In this case, the pseudo row directional wiring 5 ′ and the pseudo column directional wiring 6 ′ are the row directions other than the row directional wiring 5 and the column directional wiring 6 that are closest to the pseudo row directional wiring 5 ′ and the pseudo column directional wiring 6 ′. It is suitable to be connected to the wiring 5 and the column-direction wiring 6. Such connection between the pseudo wiring and the wiring is made, as will be described later, for selecting which wiring in a plurality of rows or which wiring in a plurality of columns a signal is applied to. It is preferable that the pseudo wiring is electrically connected to the wiring to which the selection voltage is applied. In the embodiment described later, the pseudo row-direction wiring 5 ′ is different from the row-direction wiring 5 to which the row selection voltage is applied.
However, although the pseudo wiring is electrically connected to a wiring other than the wiring closest to the pseudo wiring as described above, a column selection voltage is applied to the column direction wiring 6. Needless to say, when the structure is adopted, the above-mentioned electrical connection relationship may be established.

The pseudo row directional wiring 5'and the pseudo column directional wiring 6'are not limited to those formed one by one as shown in FIG. 1, but a plurality of them are provided. But good. In this case, of the plurality of pseudo row directional wirings 5 ′ and pseudo column directional wiring 6 ′, the pseudo row directional wiring 5 ′ and the pseudo column arranged closest to the row directional wiring 5 and the column directional wiring 6 The distances between the directional wirings 6 ′ and the row-directional wirings 5 and the column-directional wirings 6 are the row-directional wirings 5 respectively.
The distance may be the same as or less than twice the distance between the column-direction wirings 6 or may be the same as or less than twice the distance between the column-direction wirings 6. Further, a plurality of pseudo row directional wirings 5'and pseudo column directional wirings 6'may be arranged such that the spacing between the pseudo row directional wirings 5'is smaller than the spacing between the row directional wirings 5 or the pseudo column directional wirings 5 '. The spacing between the wirings 6 ′ may be smaller than the spacing between the column-direction wirings 6.

The pseudo row-direction wiring 5'is provided outside the electron-emitting device array located outside the outermost row-direction wiring 5 indicated by X1 (upper side in FIG. 1), but the opposite. It may be provided on the side end, that is, below X3. By doing so, the effect obtained by forming the above-described pseudo row wiring 5'is obtained on both sides of the substrate 1. The same applies to the pseudo column direction wiring 6 '.

Next, an example of a manufacturing process of the electron source which is an example of the present invention shown in FIG. 1 will be described with reference to FIGS. 2A to 2E. The substrate 1 is omitted.

The electron source 9 shown in FIGS. 2A to 2E is used.
The column-direction wirings, the pseudo-column-direction wirings, and the interlayer insulating layers formed in the manufacturing process of 1. are formed by the screen printing method, but the manufacturing method of the electron source is limited to this manufacturing method. Instead, it may be manufactured by a photolithography technique.

First, as shown in FIG. 2A, electrodes 2, 3 and pseudo electrodes 2 ', 3'are formed on a cleaned substrate 1.
In FIG. 2A, the electrodes formed in the area surrounded by the broken line are the pseudo electrodes 2 ′ and 3 ′, and the other electrodes are the electrodes 2 and 3 that function as normal electrodes.

As a method of forming the electrodes 2 and 3 and the pseudo electrodes 2'and 3 ', a vacuum vapor deposition method, a sputtering method, C
A method using a thin film deposition technique such as the VD method and a patterning technique by photolithography, or a pattern of a material that is a raw material of an electrode is formed by a printing method and then heat-treated to form an electrode or a pseudo electrode having a desired shape and material. A method using an electrode or the like can be used. As described above, although it is preferable that the pseudo electrodes 2 ′ and 3 ′ are present, it is not always necessary for the present invention, and only the electrodes 2 and 3 may be formed.

Next, as shown in FIG. 2B, the column-direction wiring 6
And the pseudo column direction wiring 6'is formed so as to be electrically connected to the electrode 3 and the pseudo electrode 3 '.

First, a column-directional wiring screen plate (not shown), in which a conductive paste containing Ag or the like is spread, is arranged to face the substrate 1 with a predetermined gap. A column direction wiring pattern and a pseudo column direction wiring pattern are formed on a column direction wiring screen plate (not shown) attached to a plate frame (not shown).

Next, the conductive paste on the column direction wiring screen plate is transferred to the substrate 1 by sweeping in a predetermined direction while pressing a squeegee (not shown) against the column direction wiring screen plate. The column-direction wirings 6 and the pseudo-column-direction wirings 6 ′ transferred to the substrate 1 are dried and then baked.

Next, as shown in FIG. 2C, the interlayer insulating layer 7
To form. The interlayer insulating layer 7 is made of an insulator such as SiO ₂ or PbO. As a forming method, in addition to the screen printing method similar to the above-described column direction wiring 6 and pseudo column direction wiring 6 ', a method of forming by a thin film deposition method such as a sputtering method, a glass paste is printed, and this is heat-treated. Method etc. are mentioned.

The interlayer insulating layer 7 is formed between the column directional wiring 6 and the pseudo column directional wiring 6'and the row directional wiring 5 and the quasi row directional wiring 5'which will be described later, so that the column directional wiring 6 and And the pseudo column direction wiring 6 ′ and the row direction wiring 5 and the pseudo row direction wiring 5 ′ so as not to be electrically connected to each other. Since the row-direction wiring 5 and the pseudo-row-direction wiring 5'are electrically connected to the electrode 2 and the pseudo-electrode 2'as will be described later, the notch 8 is formed in the portion corresponding to the electrode 2 and the pseudo-electrode 2 '. Has been formed. Although the interlayer insulating layer 7 is formed in a strip shape in the figure, the row wiring 5 and the pseudo row wiring 5 ′ as described above are electrically connected to the electrode 2 and the pseudo electrode 2 ′, In addition, the column direction wiring 6 and the pseudo column direction wiring 6'and the row direction wiring 5 and the pseudo row direction wiring 5 '
The interlayer insulating layer 7 may be formed discretely only at each intersecting portion so that each of the intersecting portions functions to be electrically insulated.

Subsequently, as shown in FIG. 2E, the row-direction wiring 5 and the pseudo-row-direction wiring 5'are formed. The row-direction wiring 5 and the pseudo-row-direction wiring 5 ′ are formed on the interlayer insulating layer 7, but as described above, the row-direction wiring 5 and the pseudo-row-direction wiring 5 ′ are provided.
Are electrically connected to the electrode 2 or the pseudo electrode 2 ′ at the cutout portion 8 of the interlayer insulating layer 7.

Subsequently, the electron source 9 of the present invention is completed through the formation of a conductive film, the forming step, the activation step, the stabilization step, and the like. These steps are performed by the surface conduction type electron shown in FIG. The process is peculiar to the emission element, and as a specific method thereof, for example, the method disclosed in US Pat. No. 5,591,061 or Japanese Patent No. 2836015 can be applied. In the present invention, other types of devices can be used as the electron-emitting device, but in that case, the process for forming the device is appropriately changed.

The method of manufacturing an electron source of the present invention for forming wirings, interlayer insulating layers and pseudo wirings by screen printing described in the above process is the same as the electron source 9 having the above-mentioned matrix wiring. Not only for the above, but also for the electron source 9 having the wiring in only one direction (for example, the row direction), it is natural that the same effect is obtained.

Next, the image forming apparatus of the present invention using the electron source manufactured as described above will be described.

FIG. 3 is a perspective view schematically showing an example of the image forming apparatus of the present invention. It should be noted that FIG. 3 is partially cut away to show the internal structure.

In the airtight container 18, the rear plate 11, the support frame 12, and the face plate 16 have their respective connecting portions sealed with an adhesive such as a low-melting glass frit (not shown).
The electron source 9 formed as described above is incorporated inside. A phosphor film 14 is formed on the lower surface of the face plate 16, and phosphors (not shown) of three primary colors of red (R), green (G), and blue (B) are separately coated. A black body (not shown) is arranged between the phosphors of the respective colors forming the phosphor film 14. Further, a metal back 15 made of aluminum or the like is formed on the surface of the fluorescent film 14 on the rear plate 11 side.

In the case of monochrome, the fluorescent film 14 can be composed of only the fluorescent material. In the case of the color fluorescent film as described above, it can be composed of a black conductive material called a black stripe or a black matrix depending on the arrangement of the fluorescent material and the fluorescent material. In the case of color display, the purpose of providing the black stripes and the black matrix is to make the color mixture between the phosphors of the three primary color phosphors, which is necessary, inconspicuous, and to prevent external light reflection on the phosphor film. This is to suppress a decrease in contrast due to. As the material of the black stripe, in addition to a commonly used material containing graphite as a main component, a material having conductivity and having little light transmission and reflection can be used.

As a method for applying the phosphor to the glass substrate, a precipitation method, a printing method or the like can be adopted regardless of monochrome or color.

The purpose of providing the metal back 15 is to improve the brightness by specularly reflecting the light to the inner surface side of the light emitted from the phosphor to the face plate 16 side, and to serve as an electrode for applying an electron beam accelerating voltage. The action is to protect the phosphor from damage due to the collision of negative ions generated in the hermetic container 18. The metal back 15 can be manufactured by performing a smoothing process (usually called “filming”) on the inner surface of the fluorescent film after manufacturing the fluorescent film, and then depositing aluminum using vacuum deposition or the like.

On the face plate 16, a transparent electrode (not shown) is provided on the outer surface side of the fluorescent film in order to enhance the conductivity of the fluorescent film.
May be provided.

The external terminals Tox1 to Toxm and the external terminals Toy1 to Toyn are connected to X1 to Xm of the row directional wiring 5 and Y1 to Yn of the column directional wiring 6 of the electron source 9, respectively. External terminal Tox0, external terminal Toy0
Is X0 of the pseudo row direction wiring 5'and Y0 of the pseudo column direction wiring 6 '.
Respectively connected to. The external terminal 17 is connected to the metal back 15.

External terminals Tox1 to Toxm, Toy1 to
An appropriate voltage is applied to Toyn to cause electron emission from a desired electron-emitting device. At this time, pseudo wire 5 '
By applying an appropriate electric potential (for example, a ground electric potential) to the pseudo column direction wiring 6 ′ through the external terminals X0 and Y0, it is possible to prevent a region having a large amount of charge from being generated in the vicinity of the outer edge of the substrate 1. . Then, around the electron-emitting devices connected to the row-directional wiring 5 at the position X1 and the column-directional wiring 6 at the position Y1, which does not have the row-directional wiring 5 and the column-directional wiring 6 on the outer edge side of the substrate 1. Since the difference between the electric field and the electric field around the other electron-emitting devices can be reduced, it is possible to improve the uniformity of the electron-emitting characteristics of all the electron-emitting devices arranged on the substrate 1.

The pseudo row directional wiring 5'is either one of the row directional wirings 5 or the pseudo column directional wiring 6'is a column directional wiring 6 '.
When electrically connected to either of the
x0 or Toy0 may be omitted.

A high voltage is applied to the metal back 15 through the external terminal 17 to accelerate the electrons emitted from the electron source 9 so that the electrons are made incident on the laminated structure composed of the metal back 15 and the fluorescent film to cause fluorescence. An image is formed by exciting the phosphor in the film to emit light.

The method for driving the above image forming apparatus is the same as the method described in the above-mentioned publication except that an appropriate potential is applied to the pseudo row direction wiring 5'and the pseudo column direction wiring 6 '. Since they are basically the same, they will not be explained again here.

The present invention will be further described below based on examples. Note that the symbols used in the following description will be described using the same symbols as those used in the above-described embodiments.

[0087]

EXAMPLES (First Example: Reference Example) In this example, each step of forming the electron source 9 by the photolithography technique will be described.

An electron source was produced in which the rows of the elements each including 120 electron-emitting devices were arranged in parallel.

FIG. 4 is a schematic plan view of a characteristic portion of the arrangement of the electron-emitting devices, row-direction wirings, column-direction wirings, pseudo-row-direction wirings, and pseudo-column-direction wirings of the electron source of this embodiment. .
Although the above-described interlayer insulating layer is formed in order to electrically insulate the wiring and the pseudo wiring from each other at the intersection, they are omitted in FIG. 4 for the sake of clarity. Further, FIG. 5 schematically shows the structure of a cross section taken along the broken line indicated by AA in FIG. Although the electron-emitting device has a fine structure such as a crack formed in the conductive film,
It is omitted in FIG. Further, FIGS. 6A to 6G are views showing respective manufacturing steps of the electron source of the present embodiment shown in FIGS. 4 and 5. 6A to 6G are similar to FIG.
FIG. 5 is a schematic view showing a cross-sectional structure of a portion indicated by AA in FIG. 4 for each step.

Step-A On the washed soda lime glass, a film of silicon oxide having a thickness of 0.5 μm is formed by the sputtering method, and this is used as the substrate 1.
Used as. 5n thick on the substrate 1 by vacuum deposition method
After sequentially depositing Cr of m and Au of 600 nm in thickness,
Photoresist (AZ1370 / Hoechst) is applied using a spinner, baked, exposed to a desired pattern using a photomask, and then developed to develop column-directional wiring 5 (lower wiring) and pseudo-column directional wiring. A resist pattern corresponding to the 5'shape was formed. Then Au /
A portion of the Cr laminated film which is not covered with the resist pattern is removed by wet etching, and the resist pattern is removed with a solvent to form the column-directional wiring 5 and the pseudo-column directional wiring 5 ′ shown in FIG. 6A. did.

Step-B Next, a silicon oxide film having a thickness of 1.0 μm is deposited by a high frequency sputtering method to form an interlayer insulating layer 7 shown in FIG. 6B.
To form. The interlayer insulating layer 7 is formed on almost the entire surface of the substrate except for a contact hole 21 which will be described later.

Step-C Next, in order to form the contact hole 21 shown in FIG. 6C, a resist pattern having an opening in the portion where the contact hole 21 is formed is formed, and using this as a mask, the interlayer insulating layer 7 is formed. The contact hole 21 was formed by etching.

The etching was carried out by the reactive ion etching (RIE) method, and CF ₄ and H ₂ were used as the etching gas.

Step-D Next, the electrodes 2 and 3 shown in FIG. 6D were formed. Electrodes 2, 3
A resist pattern having an opening corresponding to the above shape is formed by using a photoresist (RD-2000N-41 / manufactured by Hitachi Chemical Co., Ltd.), and T having a thickness of 5 nm is formed by a vacuum deposition method.
i and Ni having a thickness of 100 nm were sequentially deposited. Then, the resist pattern was removed using a solvent, and electrodes 2 and 3 having a desired pattern shape were obtained by a lift-off method. Here, the distance between the electrodes 2 and 3 was 20 μm.

Step-E Next, the row-direction wiring 6 (upper wiring) and the pseudo-row-direction wiring 6'shown in FIG. 6E were formed. Also in this step, similarly to the above-mentioned step-D, the pattern of the row-direction wiring 6 and the pseudo-row-direction wiring 6'is manufactured by the lift-off method.

First, a photoresist pattern was formed in the same manner as described above, and Ti having a thickness of 5 nm and then Au having a thickness of 500 nm were sequentially deposited thereon by a vacuum evaporation method, and then the resist pattern was removed by a solvent, The row-direction wirings 6 and the pseudo-row-direction wirings 6 ′ having a desired shape were formed by the lift-off method.

Step-F Next, the conductive film 4 shown in FIG. 6F was formed. Conductive film 4
Was patterned by lift-off using a Cr mask pattern. First, a 100 nm-thick Cr film is deposited by a vacuum evaporation method. Then, the Cr film in the portion corresponding to the pattern of the conductive film 4 is removed using a photoresist and an etchant, and then the photoresist is also removed to form a Cr mask.

Then, a solution of the organic Pd compound (c
cp4230: Okuno Seiyaku Co., Ltd. was applied using a spinner, dried, and then heat-treated at 300 ° C. for 10 minutes. As a result, a film containing PdO as a main component was formed. Then, the Cr mask was removed using an etchant, and an unnecessary portion of the PdO film was removed by a lift-off method to form the conductive film 4 having a predetermined pattern. When the conductive film 4 is observed in detail, it shows a complicated form in which fine particles are aggregated and connected in a mesh shape, and has a thickness of about 10 nm and a sheet resistance value of about 5 × 10 ⁴ Ω / □. It was

Step-G A resist pattern is formed so as to cover a portion other than the contact hole 21, and a T film having a thickness of 5 nm is formed by a vacuum evaporation method.
i, and then Au having a thickness of 500 nm is deposited, and the resist pattern is removed by a solvent.
The unnecessary portion of the / Ti film was removed, and the contact hole 21 was embedded as shown in FIG. 6G.

Step-H Then, a forming process for forming a crack in the conductive film 4 is performed. On the substrate 1, the column-direction wiring 5, the pseudo-column-direction wiring 5 ′, the row-direction wiring 6, the pseudo-row-direction wiring 6 ′, the interlayer insulating layer 7, the electrodes 2 and 3, and the conductive film 4 were formed. The uncompleted electron source 9 is installed in the vacuum chamber, and the chamber is evacuated. All the column-direction wirings 6 were connected to the ground. A pulse generator was connected to the row-direction wiring 5 via a switching device so that a desired voltage could be applied to each. The pulse voltage generated by the pulse generator has a pulse width of 1 msec. , Pulse interval 3 msec. The rectangular wave pulse was, and the pulse peak value was 11V. Each time one pulse is applied to one row-directional wiring 5, the pulse generator is switched to the next row-directional wiring 5 by the switching device, and the pulse generator is connected for 240 msec. Then, one pulse was applied to all of the 80 row-direction wirings. By repeating this, the pulse width 1 is applied to each row-direction wiring 5.
msec. , Pulse interval 240 msec. Pulse will be applied.

The electron source 9 should have a temperature of about 50 ° C.
The temperature was controlled. Simultaneously with the start of pulse application according to the above procedure, a mixed gas of H ₂ and N ₂ was introduced into the vacuum chamber. Immediately after this, the resistance value between each row-direction wiring 5 and the ground sharply increased, and the forming process was completed.

Step-I Then, activation treatment was performed. The interior of the vacuum chamber was thoroughly evacuated to reduce the pressure and then benzonitrile was introduced. The introduction amount was controlled so that the pressure in the chamber was 1.3 × 10 ⁻⁴ Pa.

Application of the pulse voltage to each row-direction wiring 5 is
The same procedure as in the above-mentioned step-H was carried out, but the processing was not performed on all the row-direction wirings 5 at the same time, but 10 row-direction wirings 5 were set as one block, and this block was used as a unit. Then, the voltage is applied in the same procedure as the above-mentioned step-H. After the activation process is completed for one block, the process of the next block is repeated to complete the activation for all electron-emitting devices.

The pulse voltage applied at this time has a pulse width of 1 msec. , Pulse interval 1
0 msec. , A rectangular wave having a peak value of 16V. By this treatment, a deposit containing carbon as a main component is formed on the conductive film 4 and the like, the current (If) flowing through the element is increased, and electrons can be emitted.

After that, the vacuum chamber and the electron source 9 are set to about 3
The inside of the vacuum chamber is evacuated while heating to 00 ° C. Simultaneously with the heating, the pressure in the chamber once rises and then gradually decreases, so that the pressure in the vacuum chamber becomes sufficiently low. After that, the heating is stopped and the vacuum chamber and the electron source are gradually cooled to room temperature.

An anode electrode is arranged so as to face the electron source 9 in the vacuum chamber, a potential of 1 kV is applied to the anode electrode, a row selection voltage is applied to the row directional wiring 5, and a signal voltage is applied to the column directional wiring 6. Then, electrons were emitted from the desired electron-emitting device, and the current flowing through the anode was measured to measure the current (Ie) accompanying the electron emission. (First Comparative Example) The first embodiment except that the pseudo row direction wiring 5'is not formed at the position X0 and the pseudo column direction wiring 6'is not formed at the position Y0 in the first embodiment. An electron source of the first comparative example was manufactured by the same procedure as above, and the same measurement as that of the first example was performed. The results of this measurement are shown in Table 1.

[0107]

Table 1 Ie (Y1) σy1 Ie (X1) σx1 First Example 1.8 μA 0.1 μA 1.8 μA 0.1 μA First Comparative Example 2.1 μA 0.4 μA 2.0 μA 0.5 μA First In the electron source 9 of the above embodiment, the average value of Ie is 1.8 for 80 elements connected to the column direction wiring 6 of Y1.
The average value of the emission current Ie is 1.8 μA and the standard deviation σx1 is 0.1 μA for 120 elements connected to the row wiring 5 of X1 with μA and standard deviation σy1 of 0.1 μA.
Met. On the other hand, in the first comparative example, Y1
The average Ie of the elements connected to the column direction wiring 6 is 2.1μ
A, the standard deviation σy1 was 0.4 μA, the average value of Ie of the elements connected to the row wiring 5 of X1 was 2.0 μA, and the standard deviation σx1 was 0.5 μA. Compared to the electron source of the first comparative example, the electron source 9 of the first example has good uniformity in the row wiring and the column wiring.

Regarding the elements of the row-direction wiring and the column-direction wiring other than this, there was no significant difference between them. (Second Embodiment) In the first embodiment, thin film deposition techniques such as a vacuum evaporation method and a sputtering method are used to deposit materials such as wiring and an interlayer insulating layer, whereas in the present embodiment, these are used. Was carried out by the screen printing method.

Below, referring to FIGS. 7A to 7E,
The manufacturing procedure of this embodiment will be described.

In FIGS. 7A to 7E, only 9 electron-emitting devices of 3 rows × 3 columns are drawn for simplification of the drawings. However, the electron source actually manufactured is 720 in the row direction and columns. 240 elements are arranged in the direction.

First, as shown in FIG. 7A, the electrodes 2, 3 and the rear electrodes 2 ', 3'are provided on the washed soda-lime glass substrate.
Was formed. The paste used for printing contains an organometallic compound that is thermally decomposed to generate a metal, which is “MOD (Met
This is referred to as “al Organic Deposition) paste”, and a paste pattern was formed on the substrate by the screen printing method using this. The metal component of the paste is Au. Using an electric furnace,
After holding at 70 ° C. for 10 minutes to dry, the temperature was raised to 550 ° C., holding for 8 minutes, and then gradually cooled. The size of the formed pattern is 350 μm × 200 μ for the electrode 3.
m, the other electrode 2 is 500 μm × 150 μm (the same applies to the pseudo electrode 2 ′). Film thickness is about 0.3 μm, electrodes 2, 3
The distance between them was about 20 μm. The pseudo electrode 3 ′ connected to the pseudo column direction wiring 6 ′ at the position Y0 later has a shape in which all are connected as shown in FIG. 7A. Further, the electrode 3 connected to the column-directional wiring 6 of Y3, which is located at the end opposite to the pseudo-column-directional wiring 6'at the position Y0, is also similarly connected. This is because, as described above, the outermost printed pattern may be defective in shape and may cause disconnection. In that case as well, by forming the electrode 3 in such a shape, the pseudo column direction wiring 6 ′ and This is because the column wiring 6 can retain its function to some extent.

Next, as shown in FIG. 7B, the column-direction wiring 6
And the pseudo column direction wiring 6'is formed. The paste used is a mixture of fine particles of a conductive material in a glass binder containing lead oxide as a main component.
Ag was used. After forming a pattern of the Ag paste by the screen printing method, it was kept at 110 ° C. for 20 minutes to be dried by using an electric furnace, then the temperature was raised to 550 ° C. and kept for 15 minutes, and then gradually cooled. The width of the formed column direction wiring 6 and pseudo column direction wiring 6 ′ is about 100 μm,
The thickness was about 12 μm.

Subsequently, as shown in FIG. 7C, an interlayer insulating layer 7 was formed. Similarly, by the screen printing method, PbO
After forming a paste pattern using a glass paste containing as a main component, and drying at 110 ° C. for 20 minutes,
It was kept at 0 ° C. for 15 minutes and then gradually cooled to obtain an interlayer insulating layer 7 having a width of about 500 μm and a thickness of about 30 μm.

Then, as shown in FIG. 7D, row-direction wirings 5 and pseudo-row-direction wirings 5'were formed on the interlayer insulating layer 7. The forming method is the same as that of the column direction wiring 6 and the pseudo column direction wiring 6 '.

Subsequently, as shown in FIG. 7E, electrodes 2, 3 are formed.
The conductive film 4 was formed so as to extend over the entire surface. The conductive film 4 is not formed on the pseudo electrodes 2'and 3'connected to the pseudo row direction wiring 5'and the pseudo column direction wiring 6 '.

The conductive film 4 was formed by the following method.

First, a solution of an organic Pd compound was applied by an inkjet device in the form of droplets so as to straddle the electrodes 2 and 3. 300 ° C after the droplets have dried
Was heat-treated for 10 minutes to form the conductive film 4 containing PdO as a main material. The microscopic morphology of the conductive film 4 shows a complicated morphology in which fine particles are aggregated and are connected in a mesh like the case of the first embodiment.

In this example, the electron source 9 was used to manufacture an image forming apparatus having the structure schematically shown in FIG. The rear plate 11, the face plate 16, and the support frame 12 are joined to each other by frit glass to form an airtight container 18. In this embodiment, the distance between the electron source 9 and the face plate 16 is 5 mm. Further, although not shown, an exhaust pipe is attached during the manufacture of the image forming apparatus to exhaust the inside of the airtight container 18, and the exhaust pipe is closed at the end of the manufacturing process. Although not shown, a getter is disposed in the peripheral portion of the airtight container 18, and the getter process is performed by high frequency heating later.

As shown in FIG. 3, the face plate 16 is formed by forming the fluorescent film 14 and the metal back 15 on the inner surface of the glass substrate 13. The fluorescent film 14 is provided on the glass substrate 13 with phosphors corresponding to the three primary colors of red (R), green (G), and blue (B), and the black member 5 so as to separate them.
1 is arranged. In this example, the pattern schematically shown in FIG. 8 was adopted. Stripes of phosphors 52 corresponding to R, G, and B are alternately arranged, and the black member 51 is arranged between them. In such a pattern, the black member 51 is called a "black stripe". The black member 51 is mainly composed of graphite.

Incidentally, FIG. 9 shows an example of another pattern of the fluorescent film 14. The dots of the phosphors 52 are arranged in a three-screen grid pattern, and the black members 51 fill the spaces between them. In this case, the black member 51 is called "black matrix".

In this embodiment, the forming process and the activation process described in the first embodiment are performed in the airtight container 18
After the formation of. This method does not require a vacuum chamber for processing.

After the airtight container 18 containing the electron source 9 is formed, the airtight container 18 is evacuated by the exhaust device through the above-described exhaust pipe, and the pressure inside the airtight container 18 is set to 1.33 ×.
After the pressure was set to about 10 −4 Pa, a pulse voltage was applied and a forming process was performed. The applied pulse voltage has a pulse width of 1 msec. , Pulse interval 10 msec. With a triangular wave pulse having a peak value of 10 V and a pulse application time of 60 seconds.

Then, after the activation process is performed in the same manner as in the first embodiment, the airtight container 1 is evacuated while the airtight container 18 is evacuated.
The whole 8 was heated to reduce the organic substances, water, etc. remaining in the airtight container 18, and then the exhaust pipe was heated to melt and close it.

Finally, the getter was heated by high frequency heating to perform getter processing. The getter is mainly composed of Ba, and is heated to evaporate to form a vapor deposition film on the inner wall of the airtight container 18, and the adsorption action of the vapor deposition film keeps the pressure inside the vacuum container 18 low. It is something to maintain. (Third Embodiment: Reference Example) As shown in FIG. 10, in addition to the position of X0, the pseudo-direction wiring 5 ′ is added to the position of X0 ′, and to the position of Y0 ′, the pseudo wire 5 ′ is added to the pseudo wire. An electron source 9 provided with two pseudo wirings each provided with a column-direction wiring 6 ′ was produced. The pseudo electrodes are not provided to connect to the pseudo row direction wiring 5 ′ at the position X0 ′ and the pseudo column direction wiring 6 ′ at the position Y0 ′. In addition, the pseudo electrode 3'of the second embodiment
As described above, the structure in which the pseudo electrodes are connected to each other from the beginning is not taken. About other than this, it produced like the 2nd Example. (Second Comparative Example) Pseudo Row Direction Wiring 5 ′, Pseudo Column Direction Wiring 6 ′
And the second, except that the pseudo electrodes 2 ', 3'are not provided.
And it produced like the 3rd Example.

External terminal 17 connected to metal back 15
8kV potential is applied to the metal back 15 via
Electrons were emitted from the electron source 9 to display an image. The pseudo row direction wiring 5 ′ and the pseudo column direction wiring 6 ′ are connected to the external terminal 17
To ground.

A current Ie associated with electron emission of an electron-emitting device connected to the row wiring 5 of X1 and the column wiring 6 of Y1.
Is the face plate 16 under the same conditions as in the first embodiment.
Is measured by applying an accelerating voltage of 1 kV to the bright spots and the brightness of the phosphor obtained by irradiating electrons from these electron-emitting devices, pulse width: 25 μsec, green (G) electrons at a driving frequency of 60 Hz. Focusing on the brightness of only the irradiation part,
The average value and standard deviation were calculated. The measurement results are shown in Tables 2 and 3. The brightness as an actual image display device is about ⅕ because the phosphor region not irradiated with electrons and the above-mentioned black stripe region are not illuminated.

[0127]

[Table 2]               Ie (Y1) σy1 Ie (X1) σx1 Second Example 1.7 μA 0.1 μA 1.7 μA 0.1 μA Third Example 1.6 μA 0.1 μA 1.6 μA 0.1 μA Second Comparative Example 1.9 μA 0.35 μA 2.0 μA 0.4 μA

[0128]

Luminance (Y1) σy1 Luminance (X1) σx1 Second Example 4000 cd / m ² 150 cd / m ² 4100 cd / m ² 160 cd / m ² Third Example 3900 cd / m ² 130 cd / m ² 3900 cd / m ² 145 cd / m ² Second Comparative Example 3700 cd / m ² 500 cd / m ² 3800 cd / m ² 540 cd / m ^{2 As shown in} Table 2 and Table 3, Compared with the case of the comparative example of No. 2, the uniformity is improved in the second and third examples. In addition, in the second comparative example, the average point of the luminance is lowered. This is because the distribution of the electric field in the vicinity of the electron-emitting device is disturbed so that the electron beam deviates from the original orbit and This is probably because the electron beam incident on the location of the phosphor is a part of the electron density that is slightly lower than the center of the beam.

In the third embodiment, the pseudo electrode 3'is
The reason why we didn't connect the columns from the beginning is
There is another pseudo column direction wiring 6'at the position of X0 'which is outside the position of X0, and the pseudo row direction wiring 6'inside is unlikely to be disconnected due to a printing defect, and no countermeasure is required. Because. Further, in the third embodiment, with respect to the column direction wiring 6 at the end opposite to the side having the pseudo column direction wiring 6 ', the electrode 3 has a continuous pattern from the beginning similarly to the second embodiment. Similarly, if the pseudo column direction wiring 6'is formed on the opposite side, it is not necessary to make the electrodes continuous.

Regarding the uniformity of the electric field distribution, it seems that this is more preferable. This also seems to be preferable for the pseudo column direction wiring 6 '. (Fourth Embodiment, Fifth Embodiment: Reference Example)
The pseudo wiring is electrically connected to another wiring, and it is not necessary to apply a potential to the pseudo wiring through an external terminal.

In the fourth embodiment, as schematically shown in FIG. 11, a connecting line 10 for connecting the pseudo row directional wiring 5'at the position X0 and the row directional wiring 5 at the position X2 is provided. Connection line 1
The row-direction wirings 5 at the positions of 0 and X1 are electrically insulated by providing the interlayer insulating layer 7 at the intersection. Although not shown, the pseudo column direction wiring 6 ′ at the position of Y0 is connected to the column direction wiring 6 of Y1.

In the fifth embodiment, the pseudo row direction wiring X0 is connected to the row direction wiring 5 of the adjacent X1.

Other parts were manufactured in the same manner as in the second embodiment. When the same evaluation as above was performed, the following results were obtained.

[0134]

[Table 4]               Ie (Y1) σy1 Ie (X1) σx1 Fourth Example 1.7 μA 0.1 μA 1.7 μA 0.1 μA Fifth Example 1.7 μA 0.1 μA 1.8 μA 0.11 μA

[0135]

Luminance (Y1) σy1 Luminance (X1) σx1 Fourth Example 4000 cd / m ² 150 cd / m ² 4100 cd / m ² 160 cd / m ² Fifth Example 4100 cd / m ² 160 cd / m ² 4300 cd / m ² 200 cd / m ² The electron emission amount Ie of the element row connected to the row-direction wiring 5 of X1 of the fifth embodiment and the brightness are slightly increased, and the element row is connected in the other row direction. A brightness difference with the element row occurred. This is because in the driving of this embodiment, the row-direction wiring 5 is driven so that the row selection voltage is applied and the column-direction wiring 6 is applied with the signal voltage, so that the row-direction wiring 5 at the position X2 is driven. When electrons are emitted from the electrically connected electron-emitting devices, the pseudo-row wiring 5'has the same potential. On the other hand, in the case of another row, when electrons are emitted from the electron-emitting devices in that row, the row-direction wirings 5 on both sides of the row are at the ground potential and are electrically connected to the row-direction wiring 5 of X1. It seems that the situation is different only in the row of electron-emitting devices.

In the above embodiment, the effect due to the difference in the row-direction wiring 5 to which the pseudo-row-direction wiring 5'is connected was confirmed. Regarding the method of connecting the pseudo-column-direction wiring 6'and the column-direction wiring 6 It is expected that a similar phenomenon will occur. (Sixth Embodiment) This embodiment is an example in which a large number of pseudo row direction wirings 5'and pseudo column direction wirings 6'are provided.

The manufacturing process of this embodiment will be described with reference to FIGS. 12 to 14 which are partial schematic plan views of the electron source in each manufacturing process and FIG. 15 which is a flowchart showing each manufacturing process of the electron source. .

First, a Pt film is formed on a soda-lime glass substrate by a sputtering method, an unnecessary Pt film is removed by a photolithography method and a dry etching method, and electrodes 2 and 3 made of Pt are formed. To form. In the figure, the number of elements is omitted and electrodes corresponding to nine elements are shown for the sake of clarity, but in reality, it is 480 × 192.
The electron-emitting devices are arranged in a matrix of 0s.

The distance between the electrodes 2 and 3 is 20 μm, and the arrangement pitch is 0.9 mm in the column direction and 0.3 m in the row direction.
m. Next, by the screen printing method, the column direction wiring 6
Also, the pseudo column direction wiring 6'is formed. In FIG. 12, one pseudo column direction wiring 6 ′ is shown on each side of the column direction wiring 6;

The paste used for printing was a paste containing Ag, and the screen shown in FIG. 16 as a schematic view, in which the pseudo column-direction wiring pattern 61 and the column-direction wiring pattern 62 were formed, and which was made of SUS400 mesh combination screen plate was used. Using, a pattern of Ag paste was formed on the substrate. After that, this is kept at 100 ° C. and dried, and then the temperature is raised to 530 ° C. to perform a heat treatment.
As shown in FIG. 2, the column wiring 6 and the pseudo column wiring 6 ′ made of Ag were formed.

Next, the interlayer insulating layer 7 is formed. A glass paste was used, and a SUS300 mesh combination plate was used as the screen. The screen plate having the inter-layer insulation layer pattern 63 and the comb-shaped inter-layer insulation layer pattern 64 for forming the inter-layer insulation layer 7 having a cutout 8 described later has a pattern as shown in FIG. Is. As shown in FIG. 13, the pattern of the interlayer insulating layer 7 is such that a notch portion 8 is provided in a portion where an electrode is provided so that the electrode is not covered. After forming the pattern, it is dried at 100 ° C. and further heat-treated at 530 ° C. By repeating this three times, it was possible to obtain the interlayer insulating layer 7 having a sufficient thickness and having no insulation failure due to pinholes or the like.

Then, using a screen plate shown in FIG. 18 as a schematic diagram, in which a pseudo row direction wiring pattern 65 and a row direction wiring pattern 66 made of Ag paste and SUS300 mesh combination screen were formed,
The row-direction wirings 5 and the pseudo-row-direction wirings 5'as shown in FIG. 14 were formed on the interlayer insulating layer 7 by screen printing. Actually, 10 pseudo row wirings 5 ′ were formed on each side of the row wiring 5.

As described above, when the row-direction wirings 5 and the column-direction wirings 6 that are actually used as wirings are formed, electron emission is performed on both sides of the row-direction wirings 5 and the column-direction wirings 6 closest to the outer edge of the substrate 1. By simultaneously forming the pseudo row directional wiring 5'and the pseudo column directional wiring 6'which are not actually used to drive the element, pattern defects were suppressed.

Since the subsequent steps are the same as those in the second embodiment, detailed description will be omitted.

[0145]

As described above, according to the present invention, the substrate is provided with the first conductor and the second conductor, and further, the first conductor and the first conductor are most suitable. By setting the distance between the first wirings adjacent to each other to be equal to or less than twice the distance between the first wirings adjacent to each other, it is effective to form a charged area having a large amount of charge near the outer edge of the substrate. It is possible to improve the uniformity of the electron emission characteristics of the electron-emitting device. Further, when the first wiring and the second wiring are formed by the screen printing method, by simultaneously forming the first conductor and the second conductor, respectively, all the first wiring and the second wiring on the substrate can be formed. It can be manufactured uniformly, which can improve the uniformity of the electron emission characteristics of the electron-emitting device.

[Brief description of drawings]

FIG. 1 is a schematic plan view showing an example of an electron source of the present invention.

FIG. 2 is a schematic diagram for explaining each manufacturing step of the electron source shown in FIG.

FIG. 3 is a perspective view schematically showing the configuration of an example of an image forming apparatus using the electron source of the present invention.

FIG. 4 is a schematic plan view for explaining the configuration of the electron source according to the first embodiment of the present invention.

5 is a schematic diagram showing a structure of a cross section taken along line AA of FIG.

FIG. 6 is a schematic diagram for explaining each manufacturing step of the electron source of the first embodiment of the present invention.

FIG. 7 is a schematic diagram for explaining each manufacturing step of the electron source of the second embodiment of the present invention.

FIG. 8 is a schematic diagram showing a pattern of a fluorescent film.

FIG. 9 is a schematic view showing another pattern of the fluorescent film.

FIG. 10 is a schematic plan view for explaining a configuration of an electron source according to a third embodiment of the present invention.

FIG. 11 is a schematic plan view for explaining a configuration of an electron source according to fourth and fifth embodiments of the present invention.

FIG. 12 is a schematic diagram for explaining a configuration of column-direction wirings and pseudo-column-direction wirings of an electron source according to a sixth embodiment of the present invention.

FIG. 13 is a schematic diagram for explaining the structure of the interlayer insulating film of the electron source of the sixth embodiment of the present invention.

FIG. 14 is a schematic diagram for explaining the configurations of row-direction wiring and pseudo-row wiring of the electron source according to the sixth embodiment of the present invention.

FIG. 15 is a flow chart for explaining each manufacturing process of the electron source of the sixth embodiment of the present invention.

FIG. 16 is a schematic plan view of a screen plate for column direction wiring and pseudo column direction wiring.

FIG. 17 is a schematic plan view of a screen plate for an interlayer insulating film.

FIG. 18 is a schematic plan view of a screen plate for row-direction wiring and pseudo-row-direction wiring.

FIG. 19 is a schematic view of an example of a conventional surface conduction electron-emitting device.

FIG. 20 is a diagram schematically showing an example of a wiring pattern of a conventional electron source.

FIG. 21 is a schematic view of an example of another conventional surface conduction electron-emitting device.

FIG. 22 is a perspective view schematically showing the configuration of an example of a conventional image forming apparatus.

FIG. 23 is a perspective view in which a conventional screen mesh and a substrate are partially broken.

FIG. 24 is a side cross section of a conventional screen mesh and a substrate.

FIG. 25 is a diagram schematically showing a charging area formed on a conventional substrate.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Substrate 2, 3 Element electrodes 2 ', 3'Pseudo electrode 4 Conductive film 5 Row direction wiring 5'Pseudo row direction wiring 6 Column direction wiring 6'Pseudo column direction wiring 7 Interlayer insulating layer 8 Notch 9 Electron source 10 Connection line 11 Rear plate 12 Support frame 13 Glass substrate 14 Fluorescent film 15 Metal back 16 Face plate 17 External terminal 18 Airtight container 21 Contact hole 41 Plate frame 42 Screen mesh 43 Squeegee 44 Pressing part 45 Pattern formed on screen mesh 46 Printing Pattern 47 Printing paste 48 Gap 49 Screen plate tension 51 Black member (black stripe, black matrix) 52 Phosphor 61 Pseudo column direction wiring pattern 62 Column direction wiring pattern 63 Interlayer insulating layer pattern 64 Comb type interlayer insulating layer pattern 65 Pseudo row direction Wiring pattern 66 Row direction wiring pattern

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 5C031 DD17 DD19                 5C127 CC11 CC51 DD19 EE03 EE04                       EE12 EE20

Claims (9)

[Claims] 1. A plurality of first wirings each having a longitudinal direction substantially along a first direction on a substrate, and a longitudinal direction substantially along a second direction intersecting the first direction. An electron source having at least one second wiring, and a plurality of electron-emitting devices connected to each of the plurality of first wirings and the second wiring. Of the first outer electron-emitting device in which the first wiring does not exist between the outer edge of the substrate and the outer edge, and in the vicinity of the first outer electron-emitting device, At least one first conductor to which a side on the side of the first outer electron-emitting device has a shape substantially along the first direction and to which the same potential as the potential applied to the first wiring is applied; Of the plurality of electron-emitting devices, the first portion between the outer edge portion of the substrate. Between the second outer electron-emitting device having no wiring and the outer edge portion, and in the vicinity of the second outer electron-emitting device, the side on the side of the second outer electron-emitting device is the second side. At least one second conductor having a shape substantially in the direction of, and the first conductor and the first wiring closest to the first conductor. Is less than or equal to twice the distance between the first wirings adjacent to each other. 2. The distance between the first conductor and the first wiring closest to the first conductor is substantially the same as the distance between the first wirings adjacent to each other. The electron source according to claim 1. 3. The electron source according to claim 1, wherein the plurality of first conductors are adjacent to each other at an interval narrower than an interval between the first wirings adjacent to each other. 4. The resistance value of the first conductor is 10 times or less than the resistance value of each of the first wirings.
The electron source according to any one of 1. 5. The distance between the second conductor and the second wiring closest to the second conductor is not more than twice the distance between the second wirings adjacent to each other. An electron source according to any one of claims 1 to 4. 6. The distance between the second conductor and the second wiring closest to the second conductor is substantially the same as the distance between the second wirings adjacent to each other. The electron source according to any one of claims 1 to 5. 7. The electron according to claim 1, wherein the plurality of second conductors are adjacent to each other with a spacing narrower than a spacing between the respective second wirings adjacent to each other. source. 8. The resistance value of the second conductor is 10 times or less than the resistance value of each of the second wirings.
The electron source according to any one of 1. 9. A method of manufacturing an electron source having a plurality of wirings and a plurality of electron-emitting devices connected to the wirings, wherein a wiring pattern is formed and a wiring is formed by a screen printing method. A method of manufacturing an electron source, further comprising the step of forming a conductor pattern similar to the wiring outside the region.