JP2003172947A - Liquid crystal display device and driving method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To apply a common voltage to memory type liquid crystals of laminated liquid crystal cells employing a single power supply circuit. <P>SOLUTION: Liquid crystal cells 11<SB>a</SB>to 11<SB>c</SB>having respectively different cell gaps are formed. Then, let d be the cell gap of each liquid crystal cell, λbe the selected reflection wavelength of the memory type liquid crystals of each layer, n be an average reflactive index, A be a maximum value of nd/λ of each liquid crystal cell and B be a minimum value of nd/λ of each liquid crystal cell. Then, it is set to satisfy the inequality of (A-B)/((A+B)/2)≤0.15. Electrodes of the laminated liquid crystal cells 11<SB>a</SB>to 11<SB>c</SB>are connected to drivers 12<SB>a</SB>to 12<SB>c</SB>respectively and the drivers 12<SB>a</SB>to 12<SB>c</SB>are connected to a common power supply circuit 13. Note that a light absorbing body 14 is provided on a back surface. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for driving a liquid crystal display device, and more particularly to a liquid crystal display device in which a plurality of liquid crystal cells are stacked and a method for driving the same.

[0002]

2. Description of the Related Art At present, liquid crystal display devices having TN, STN and TFT liquid crystals are widely used. These liquid crystal display devices always perform predetermined driving to display. On the other hand, a memory liquid crystal such as a cholesteric or chiral nematic liquid crystal having a memory operation mode has been attracting attention, and practical application of a liquid crystal display device including the same has been studied.

The liquid crystal having a memory property sandwiched between a pair of parallel substrates has a "twist structure" in which the liquid crystal director is twisted at a constant cycle. There is an array in which the central axis of the twist (hereinafter referred to as the helical axis) is in the direction perpendicular to the substrate on average.

A state in which the average directions of the helical axes of a plurality of liquid crystal domains are substantially perpendicular to the substrate surface is called a planar state. In the planar state, of the incident light, circularly polarized light corresponding to the twist direction of the liquid crystal layer is selectively reflected.
The selective reflection wavelength λ is approximately equal to the product of the average refractive index n of the liquid crystal composition and the pitch p of the liquid crystal composition (λ = n · p). Therefore, the pitch p is p = λ / n.

The pitch p is the addition amount c of an optically active substance such as a chiral agent and the constant HTP (Helica) of the optically active substance.
l Twisting Power), p = 1 /
(C · HTP). Therefore, the selective reflection wavelength can be adjusted by the kind and addition amount of the optically active substance. If the pitch is set so that the selective reflection wavelength of the memory-type liquid crystal is out of the visible range, it becomes transparent at the time of selective reflection and exhibits an operation mode of transmission and scattering.

For a planar state exhibiting selective reflection,
It is also possible to take a focal conic state in which the helical axes of a plurality of liquid crystal domains are arranged randomly or non-perpendicularly to the substrate surface. Generally, the liquid crystal layer in the focal conic state exhibits a weak scattering state as a whole. It does not reflect light of a specific wavelength as in selective reflection. Further, the focal conic state and the planar state are stable even when there is no electric field. FIG. 17A is a schematic diagram of a planar state and FIG. 17B is a schematic diagram of a focal conic state, showing an arrangement state of liquid crystal domains shown as a drum shape.

In the focal conic state shown in FIG. 17 (b), the color of the absorption layer can be displayed by providing the absorption layer on the back surface side of the liquid crystal cell. Therefore, it is possible to realize a memory-type display operation using the two states of the planar state which is a bright state and the focal conic state which is a dark state (when the absorbing layer is black).

Regarding the basic configuration of a liquid crystal display device including such a chiral nematic liquid crystal or a cholesteric liquid crystal, George H. Heilmeier, Joel E. Goldmacher et.
al, Appl. Phys. Lett., 13 (1968), 132 and US3936.
815. In addition, US4097127
It shows that there is a stable intermediate state in which the planar state and the focal conic state are mixed and can be used for display.

Next, a method of driving the liquid crystal display device will be described. In US3936815, the planar state is changed to the focal conic state and the focal conic state is changed to the planar state depending on the magnitude of the amplitude of the drive voltage. In the case of the latter phase transition, the highest voltage is required because the liquid crystal molecules go through a homeotropic state in which they are almost parallel to the voltage application direction.

In a memory type liquid crystal, the effective value of a series of applied voltage waveforms does not directly determine the state after voltage erase, but
The display after voltage erase depends on the application time and the amplitude value of the voltage pulse applied immediately before.

When driving a liquid crystal display device provided with a liquid crystal having a memory property, the potentials of the electrodes located on both sides of the liquid crystal layer are set to a predetermined value, and a voltage for shifting to a focal conic state or a voltage for shifting to a planar state. Is applied to the liquid crystal having a memory effect. The voltage for shifting to the planar state via the homeotropic state is V _th .

In a liquid crystal display device having a single-layer liquid crystal cell, two colors can be displayed by the two states (planar state and focal conic state) of the liquid crystal having a memory effect. Then, by stacking a plurality of liquid crystal cells having different selective reflection wavelengths, it is possible to increase the kinds of colors to be displayed. Conventionally, a plurality of liquid crystal cells having the same cell gap are stacked so that many types of colors can be displayed.

FIG. 18 shows an IAPT (Improved Alto Pleshko Techni) as a driving method of a plurality of laminated liquid crystal cells.
An example of the drive waveform when que) is adopted is shown. Here, a case where two liquid crystal cells are stacked will be described as an example. 18A and 18B are examples of drive waveforms of the row electrode and the column electrode of one liquid crystal cell, respectively. FIG.
(C) and (d) are examples of drive waveforms of the row electrode and the column electrode of the other liquid crystal cell, respectively. In addition, each voltage V ₀ ~
V ₅ is V ₅ −V ₄ = V ₁ −V ₀ = V ₄ −V ₃ = V ₂ −
It is determined to be V ₁ . Further, V ₅ -V ₀ is a voltage for bringing the liquid crystal having a memory property into a planar state (on display), and V ₅ -V ₂ and V ₃ -V ₀ are for a focal conic state (off display). Is the voltage of. The voltages V ₀ ′ to V ₅ ′ applied to the other liquid crystal cell are similarly determined.

In one liquid crystal cell, the potentials of the selected row electrodes are alternately set to two types of potentials V ₅ and V ₀ . Also,
The potentials of the row electrodes not selected are also two types of potentials V ₁ and V _4.
Alternately (see FIG. 18A). Similarly, in other liquid crystal cells, the potentials of the selected row electrodes are alternately set to two types of potentials V ₅ ′ and V ₀ ′, and the potentials of the unselected row electrodes are also of two types of potential V _1. ', _{V 4'} is set to alternately (see FIG. 18 (c)). Then, when the potential of the selected row electrode in one liquid crystal cell is set to the higher potential V ₅ , the potential of the row electrode selected in the other liquid crystal cell is also set to the higher potential V ₅ ′. In one liquid crystal cell, when the potential of the selected row electrode is set to the lower potential V ₀ , in the other liquid crystal cell, the lower potential V ₀ 'is also set.
Set to. Similarly, with respect to the unselected rows, when the lower potential V ₁ is set on the one hand, the lower potential V ₁ ′ is set on the other side, and when the higher potential V ₄ is set on the other hand, On the other hand, the higher potential V ₄ 'is set.

When writing a display, first, the row electrodes and the column electrodes are driven so that all the pixels are in the planar state (ON display). This period is referred to as a reset period. After the reset period, the row electrodes and the column electrodes are driven so as to apply the voltage corresponding to the display data. This period is referred to as a display writing period.

During the reset period, each column voltage of one liquid crystal cell is
As shown in FIG. 18 (b), the voltage V₀, V₅Exchange
Apply to each other. Each column electrode of the other liquid crystal cell has a structure shown in FIG.
As shown in (d), the voltage V₀’, V₅’Is applied alternately
It During the reset period, one of the liquid crystal cells has a voltage on each column electrode.
Lower potential V₀When setting to
The potential of the column electrode in the cell is also the lower potential V₀Set to ’
To do. In one liquid crystal cell, set the potential of each column electrode to the higher voltage.
Rank V₅When set to, the column electrodes of other liquid crystal cells are
One potential V₅’ During the reset period, each liquid
The voltage V is applied to the pixels in the selected row of the crystal cells, respectively.₅-V₀, Electric
Pressure V₅’-V₀Is applied to sequentially plan the memory liquid crystal.
, And turn it on. Select during reset period
The voltage of V₅−
V_Four, V₁-V₀Or voltage V ₅’-V_Four’, V₁’
-V₀'Is applied but the display state does not change.

During the display writing period, each column electrode of one of the liquid crystal cells is supplied with data corresponding to the display data of the selected row.
The potential of any one of V ₀ , V ₅ , V ₂ , and V ₃ is set.
Similarly, for the column electrodes of the other liquid crystal cell, V ₀ ′, V ₅ ′,
_{V 2} ', V _3' to set any of the potential of. As a result, the desired display is written.

An electrode in which individual electrodes are sequentially selected, like a row electrode, is called a scanning electrode or a common electrode. An electrode, such as a column electrode, which is paired with an electrode that is sequentially selected and whose potential is set according to display data in a selected row or the like is called a signal electrode or a segment electrode.

[0019]

Since p = λ / n, the pitch of each layer is different if the selective reflection wavelength or the average refractive index in each liquid crystal cell is different. Then, if the pitch is different, the voltage _Vth for shifting the liquid crystal with memory effect to the planar state also changes. Therefore, when the liquid crystal cells are stacked, each liquid crystal cell is provided with a power supply circuit. FIG. 19 is a schematic diagram showing a configuration of a conventional liquid crystal display device. Stacked liquid crystal cells ₁₀₁ a to 101 _c
In it is connected a driver ₁₀₂ a to 102 _c, respectively. Then, the power supply circuits ₁₀₃ a 10 @ 2 to 10 @ 3 _c supplies a voltage required for each driver ₁₀₂ a to 102 _c. Note that the liquid crystal cell 103 _c of the rear side, the light absorber 104 is provided.

In each layer of the plurality of liquid crystal cells, different power supply circuits are used, and the voltage V for shifting to the planar state is used.
Different voltages were applied as _th . However, it is desirable that one power supply circuit can supply a voltage to the driver of each layer instead of providing a plurality of power supply circuits.

Further, the two liquid crystal cells are laminated, in one liquid crystal cell and the best contrast is obtained if caused to migrate memory-type liquid crystal in the planar state at the voltage V _a. Similarly, in the other liquid crystal cell, the best contrast can be obtained by shifting to the planar state with the voltage _Vb . If the voltage V _a is within the operation allowable voltage range of V _b , both liquid crystal cells can be driven by one voltage V _a . Here, the operation allowable voltage will be described. Be applied to slightly offset voltage from V _b to shift to the planar state can be maintained display of good contrast ratio. Around the voltage V _b, that allowable operating voltage of width voltage V _b of the voltage capable of maintaining a display of good contrast ratio.

As described above, if one voltage is within the range of the operation allowable voltage centered on the other voltage, the power supply circuit can be shared and the display with a good contrast ratio can be maintained.
However, when the reciprocal of the selective reflection wavelength of a liquid crystal cell is 0.9 times or less or 1.1 times or more the reciprocal of the selective reflection wavelength of another liquid crystal cell, the display of the best contrast ratio in each layer is performed. The voltage used to obtain the voltage was so different that the power supply circuit could not be shared.

Further, it is desirable that one power supply circuit can supply a voltage to the drivers in each layer, but when the power supply circuits are commonly used, it is desirable that the power supply circuits are loaded as little as possible. Note that the power supply circuit includes only one set of a combination of a resistance portion for dividing the supplied voltage and a plurality of operational amplifiers (hereinafter referred to as operational amplifiers) to which the divided voltage is input, as one. .

It is an object of the present invention to provide a liquid crystal display device capable of writing a display by applying a common voltage to a memory liquid crystal of each laminated liquid crystal cell with a single power supply circuit. Another object of the present invention is to provide a driving method of a liquid crystal display device, which prevents a large load from being applied to the power supply circuit when a voltage is supplied to the driver of each layer by one power supply circuit.

[0025]

A first aspect of the present invention is a liquid crystal in which a plurality of liquid crystal cells including at least a chiral nematic liquid crystal exhibiting a planar state are stacked between a plurality of scan electrodes and a plurality of signal electrodes. The display device is provided such that the reciprocal of the selective reflection wavelength of a liquid crystal cell is 0.9 times or less or 1.1 times or more of the reciprocal of the selective reflection wavelength of another liquid crystal cell. Provided is a liquid crystal display device characterized in that a cell gap and a selective reflection wavelength have a predetermined relationship.

In the second aspect of the present invention, the cell gap of each liquid crystal cell is d, the selective reflection wavelength of each liquid crystal cell is λ, the average refractive index of the memory liquid crystal of each liquid crystal cell is n, and n of each liquid crystal cell is
When the maximum value of d / λ is A and the minimum value of nd / λ of each liquid crystal cell is B, (A−B) / ((A + B) / 2) ≦
A liquid crystal display device satisfying 0.15 is provided.

Aspect 3 of the present invention is (AB) / ((A +
A liquid crystal display device satisfying B) / 2) ≦ 0.1 is provided.

According to a fourth aspect of the present invention, in one liquid crystal cell, when a voltage for performing on-display or off-display is applied to the memory liquid crystal, the potential relationship between the signal electrode potential and the selected scan electrode potential is high or low. The voltage is applied while reversing the voltage, and the potential of the selected scanning electrode of one liquid crystal cell is set higher than the potential of the signal electrode of the one liquid crystal cell in at least one of the other liquid crystal cells. Sometimes, the potential of the signal electrode is set higher than that of the selected scan electrode, and when the potential of the signal electrode of one liquid crystal cell is set to be higher than the potential of the selected scan electrode of one liquid crystal cell, it is selected. Provided is a liquid crystal display device in which the potential of a scanning electrode is set higher than the potential of a signal electrode. According to such a configuration, in one liquid crystal cell and at least one other liquid crystal cell, a high potential is not simultaneously set to the scanning electrodes and a high potential is not simultaneously set to the signal electrodes. as a result,
It is possible to reduce the current that simultaneously flows through the scan electrodes of each layer and the current that simultaneously flows through the signal electrodes of each layer.

Aspect 5 of the present invention provides a liquid crystal display device in which the liquid crystal cells have the same average refractive index of the memory liquid crystals.

Aspect 6 of the present invention provides a liquid crystal display device in which the driver of each liquid crystal cell is supplied with power from a common power supply circuit.

A seventh aspect of the present invention is for driving a liquid crystal display device in which a plurality of liquid crystal cells, each of which has at least two memory-state liquid crystals exhibiting a stable state, are stacked between a plurality of scanning electrodes and a plurality of signal electrodes. A memory provided in each liquid crystal cell using a single power supply circuit that includes only one set of a combination of a resistance unit that divides a voltage that is supplied and a plurality of operational amplifiers that input the divided voltage. A first step of applying a voltage for performing on-display or off-display to the liquid crystalline liquid crystal, and a second step of applying a voltage corresponding to display data to the memory liquid crystal included in each liquid crystal cell, In the stage of 1, the voltage of one liquid crystal cell is applied to the memory liquid crystal while reversing the level relation between the potential of the signal electrode and the potential of the selected scan electrode, and at least one of the other liquid crystal cells is , Ichino When the potential of the selected scanning electrode of the liquid crystal cell having one crystal cell is set higher than that of the signal electrode of the one liquid crystal cell, the potential of the signal electrode is set to be higher than the potential of the selected scanning electrode to obtain the memory liquid crystal. When a voltage is applied and the potential of the signal electrode of one liquid crystal cell is set higher than the selected scanning electrode of the one liquid crystal cell,
Provided is a method for driving a liquid crystal display device, characterized in that the potential of a selected scanning electrode is set higher than the potential of a signal electrode and a voltage is applied to a liquid crystal having a memory effect.

According to an eighth aspect of the present invention, in the first stage and the second stage, one liquid crystal cell sets the first potential or the second potential to the selected scanning electrode and performs scanning not selected. A third electric potential or a fourth electric potential is set to the electrode, and at least one liquid crystal cell of the other liquid crystal cells is set to the first electric potential at the scanning electrode selected by the one liquid crystal cell. Then, the second potential is set to the selected scan electrode, and when one liquid crystal cell is set to the second potential to the selected scan electrode of the one liquid crystal cell, the first potential is set to the selected scan electrode. When one liquid crystal cell is set and the third potential is set to the unselected scanning electrodes of the one liquid crystal cell,
When the fourth potential is set to the unselected scan electrodes and the one liquid crystal cell is set to the fourth potential to the unselected scan electrodes of the one liquid crystal cell, the third potential is set to the unselected scan electrodes. Provided is a method for driving a liquid crystal display device, which sets the potential of the.

[0033]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will now be described with reference to the drawings.
Will be described with reference to. FIG. 1 shows a liquid crystal display device of the present invention.
The schematic cross-sectional view of the liquid crystal cell laminated | stacked in FIG. Figure 1
The liquid crystal cell shown in FIG._A1_B, Electrode 2_A,
Two_B, Thin film 3 _AThree_B, Liquid crystal composition (memory type liquid crystal) 4
Are placed in the focal conic state and the planar state.
It is a liquid crystal cell that displays stably. Electrode 2_ATwo_BOne side
Is a row electrode (scan electrode), and the other is a column electrode (signal electrode).
Pole). In the following description, the electrode 2_AIs the column electrode
Electrode 2_BIs a row electrode.

_A polymer such as polyimide is used for the thin films 3 _A and 3 _B , but an inorganic thin film such as silica may be formed. However, if the surface of the thin film in contact with the liquid crystal with memory properties is rubbed, the stability of the focal conic state of the liquid crystal with memory properties may be lost depending on the type of thin film. Therefore, provide a thin film without rubbing,
Alternatively, the electrode and the liquid crystal composition are provided so as to be in direct contact with each other.

The electrodes 2 _A and 2 _B are respectively connected to drivers (column driver and row driver), and the potential is set by the drivers. As a result, a voltage is applied to the memory liquid crystal 4, and the memory liquid crystal 4 shifts to the planar state or the focal conic state according to the applied voltage. Hereinafter, the display of the planar state is turned on and the display of the focal conic state is turned off.

The display mode may be non-full dot matrix display such as segment display or dot matrix display. The substrate may be a glass substrate or a resin substrate, or a combination of a glass substrate and a resin substrate.

FIG. 2 is a schematic sectional view of the liquid crystal display device of the present invention. The liquid crystal display device includes a stacked liquid crystal cell 11
_{a to} 11 _c, and a black light absorber 14 is provided on the back surface of the liquid crystal cell 11 _{c on} the back surface side. Light absorber 14 may be provided on the inner surface of the liquid crystal cell 11 _c, or may be used those having a light absorption function as a back side of the substrate of the liquid crystal cell 11 _c. Although FIG. 2 shows the case where three liquid crystal cells are stacked, the number of liquid crystal cells is not limited to three.
For example, two liquid crystal cells may be laminated.

[0038] The electrodes ₂ A, _{2 B} are arranged in the liquid crystal cells ₁₁ a to 11 _c are connected to the driver ₁₂ a to 12 _c, respectively, each liquid crystal cell ₁₁ a to 11 _c is driven by the driver It In addition, the liquid crystal display device includes one power supply circuit 13, and the power supply circuit 13 includes each driver 11 _a.
Supply the required voltage to ~ 11 _c .

Each liquid crystal cell 11_a~ 11_cPlaced in each
The selective reflection wavelengths of the memory-type liquid crystal 4 are different from each other. liquid
Crystal cell 11_a~ 11_cMemory located in one of the
The reciprocal of the selective reflection wavelength of the organic liquid crystal 4 is the reciprocal of the selective reflection wavelength.
0.9 times or less of the reciprocal of the selective reflection wavelength of the liquid crystal
It is 1.1 times or more. For example, each layer can be selected
By reflection, it shall show red, green, and blue, respectively.
In addition, each liquid crystal cell 11 _a~ 11_cEach memory located in
Liquid crystals 4 have the same average refractive index but different
Good.

Further, the cell gap of the liquid crystal cells 11 _a to 11 _c is a cell gap of the liquid crystal cell d, the selective reflection wavelength of the liquid crystal cell lambda, the memory of the average refractive index of the liquid crystal of each liquid crystal cell n And the maximum value of nd / λ of each liquid crystal cell is A,
When the minimum value of nd / λ of each liquid crystal cell is B, (A
−B) / ((A + B) / 2) ≦ 0.15 is set. In particular, (A−B) / ((A + B) / 2) ≦
It is preferable to set it so as to satisfy 0.1.

[0041] For example, the liquid crystal cells ₁₁ a to 11 selective reflection wavelength of the memory-type liquid crystal disposed in _c respectively lambda _a, lambda
_b , λ _c , and the average refractive indices are n _a , n _b , and n, respectively.
_{Let c} . Further, a cell gap of each liquid crystal cell ₁₁ a to 11 _c, respectively, and _{d a, d b, d c} . At this time, n _a d _a / λ _a , n _b d _b / λ _b , n _c d _c / λ
Depending on the maximum value A and the minimum value B in _c , (AB) /
The cell gaps d _a , d _b and d _c are determined so that ((A + B) / 2) ≦ 0.15 is satisfied.

If the cell gaps of the respective layers are determined so as to satisfy this condition, the memory-type liquid crystals of the respective layers of the plurality of liquid crystal cells can be shifted to the planar state by a common voltage. It becomes unnecessary to provide.

The cell gap d of one of the liquid crystal cell, between the pitch p of the arranged memory-type liquid crystal in the liquid crystal cell, and the voltage V _{t h} for shifting the memory-type liquid crystal in the planar state, d / The relationship of p∝V _th is established. Also, as already mentioned, since p = λ / n,
The relationship of nd / λ∝V _th is established. Therefore,
If the difference in nd / λ in each layer is set to be small, the difference in voltage V _th for setting the memory liquid crystal in each layer in the planar state is also small, and the memory liquid crystal in each layer is set in the planar state at a common voltage. It will be possible to transfer.

In the above example, n _a d _a / λ _a , n
magnitude of _{b d b / λ b, n} c d c / λ c is a is as shown in FIG. That is, n _a d _a / λ _a
Is the maximum value A, and n _c d _c / λ _c is the minimum value B. Under the condition of (A−B) / ((A + B) / 2) ≦ 0.15, “A−B” is the difference between the maximum value and the minimum value. And "(A + B) / 2" is the maximum value A
And the average value of the minimum value B. Therefore, (AB) /
The condition of ((A + B) / 2) ≦ 0.15 indicates that the difference between the maximum value and the minimum value of nd / λ in each layer is within 15% of the average value of the maximum value and the minimum value. .
To this extent, if the difference in nd / λ in each layer is reduced, the memory liquid crystal 4 in each layer can be shifted to the planar state with a common voltage.

(A-B) / ((A + B) / 2) ≤0.1
By satisfying the condition, nd / in each layer
The difference between the maximum value and the minimum value of λ is within 10% of the average value of the maximum value and the minimum value, which is more preferable in order to make the voltage common.

FIG. 4 is an explanatory diagram of the operation allowable voltage. It is assumed that the best contrast can be obtained when the voltage V _th is applied to the liquid crystal having a memory effect to shift to the planar state. The operation allowable voltage at this time is V as shown in FIG.
It is a voltage width centered on _th and capable of maintaining a good contrast. This width is approximately 20% of V _th . For example, it is assumed that the voltage to be applied to the liquid crystal that is brought into the planar state is 20V in order to obtain the best contrast. In this case, good contrast can be maintained even if the liquid crystal is moved to the planar state in the voltage range of about 18V to about 22V.

In addition, V _th of 10 with V _th at the center
If the voltage shifts to the planar state with the voltage falling within the range of%, it is possible to maintain the display with a better contrast ratio.

(A−B) / ((A + B) / 2) ≦ 0.1
If the cell gap of each layer is determined so as to satisfy the condition of 5, the difference in the voltage to be applied to obtain the best contrast in each layer also becomes small. As a result, even if the memory-type liquid crystal of each layer is moved to the planar state with a common voltage, the common voltage falls within the operation allowable voltage range of each layer, and a good contrast ratio display can be maintained in each layer. Also, (A−B) / ((A +
If the cell gap of each layer is determined so as to satisfy the condition of B) / 2) ≦ 0.1, a better contrast can be maintained.

The two liquid crystal cells are laminated, if in one of the liquid crystal cell caused to migrate memory-type liquid crystal at a voltage V _a in planar state best contrast is obtained, the planar state at the voltage V _b at the other liquid crystal cell It is assumed that the best contrast can be obtained by shifting. As described above, the operation allowable voltage is a voltage having a width of about 20% centered on the voltage at which the best contrast is obtained. Therefore, the voltage V _a
And 20% of the width of the V _a centered and if 20% of the width of the V _b around the voltage V _b is long overlap fully, by using a voltage in the range that overlaps the common voltage Good contrast is obtained in both liquid crystal cells.

FIG. 5 is an explanatory diagram showing the overlap between the operation allowance voltage centered on the voltage V _a and the operation allowance voltage centered on the voltage V _b . The width 50 shown in FIG. 5 indicates a width of 1/2 of the operation allowable voltage centered on the voltage V _a . The voltage in the range of the width 50 is 0.1 · V _a . Similarly, the width 51 indicates a half of the operation allowable voltage centered on the voltage V _b . The voltage in the range of the width 51 is 0.1 · V _b . Also, width 5
2 is a range in which the width 50 and the width 51 overlap. The voltage in the range of the width 52 is obtained by subtracting the difference between the voltages V _a and V _b from the sum of the widths 50 and 51. Therefore, the voltage in the range of the width 52 is (0.1 · V _a + 0.1 · V _b ).
- represented as _(V a -V _b). That is, 0.1 · (V
_a + _V b) - represented as _(V a -V _b).

0.1 · (V _a + V _b ) − (V _a −V _b ).
If ≧ 0, the operation allowable voltages will overlap. However, if the width 52 is narrow, good contrast cannot be obtained between the two liquid crystal cells. Good contrast is obtained when the ratio of the width 52 to the average value of the voltages V _a and V _b is 5.
% Or more. This condition is expressed in the following formula.

(0.1 · (V _a + V _b ) − (V _a −
V _b )) / ((V _a + V _b ) / 2) ≧ 0.05

When this equation is organized, it becomes the following equation.

[0054] _{(V a -V b) / (} (V a + V b) / 2)
≤0.15

Since the relationship of nd / λ∝V _th is established, the above expression is A corresponding to V _a (maximum value of nd / λ)
And B (minimum value of nd / λ) corresponding to V _b ,
The condition of (A−B) / ((A + B) / 2) ≦ 0.15 is obtained.

When the average refractive index in each layer is the same, the maximum value of d / λ of each liquid crystal cell is A, and the minimum value of d / λ of each liquid crystal cell is B so that the above conditions are satisfied. Alternatively, the cell gap may be set.

Next, it describes a method of driving the liquid crystal cells ₁₁ a to 11 _c. Type of potentials of the driver ₁₁ a to 11 layers, which is set by the _c row electrodes _{2 B} and the column electrodes _{2 A} is predetermined. It is assumed that the row electrode 2 _B and the column electrode 2 _A of each layer are set to a potential of 0 V, V _on , or V _off . Here, V _on is a voltage for turning on the liquid crystal with a memory effect (a voltage for shifting to a planar state), and V _off is a voltage for turning off the liquid crystal with a memory effect (focal conic state). Voltage for shifting to). _A potential other than 0 V, V _on , and V _off may be set to the row electrode 2 _B and the column electrode 2 _A.

When the liquid crystal with memory effect 4 is turned on, the potential of the selected row electrode 2 _B is 0 V and the potential of the column electrode 2 _A is V.
_The setting to _{turn on} and the setting to set the potential of the selected row electrode 2 _B to V _on and the potential of the column electrode 2 _A to 0 V are alternately repeated. Similarly, when the liquid crystal with a memory effect is turned off, the potential of the selected row electrode 2 _B is 0 V and the potential of the column electrode 2 _A is V.
_{of f} and the potential of the selected row electrode 2 _B is set to V
_The setting of turning _off and setting the potential of the column electrode 2 _A to 0 V is alternately repeated. Each of the drivers 12 _{a to} 12 _c reverses the level relation between the potential of the row electrode 2 _{B and} the potential of the column electrode 2 _A as described above, and the voltage V _on for turning on the display and the voltage for turning off the display. _Apply V _off .

The timing of reversing the level relationship between the potential of the row electrode 2 _{B and} the potential of the column electrode 2 _A is, for example, when all the row electrodes 2 _B are selected and one scan is completed. Or, within the selection time of each row, the potential of the row electrode 2 _B and the column electrode 2
_A voltage may be applied to the memory-type liquid crystal 4 while reversing the relationship of the potential of _A.

[0060] One (Here, the driver 12 _a.) Of the driver ₁₂ a to 12 _c are the row electrodes _{2 B}
When the potential of the column electrode 2 _A is set higher than the potential of the column electrode 2 _A , at least one of the other drivers (here, the driver 12 _b ) sets the potential of the column electrode 2 _{A to} the row electrode 2 _{A. It} is set higher than the potential of _A. Driver _12a
But when they are set higher than the potential of the column electrodes 2 _A potential row electrodes 2 _B of the driver 12 is set higher than the potential of the row electrode 2 _B potential column electrodes 2 _A.

FIG. 6 shows a liquid crystal cell _11a and a liquid crystal cell 1.
An example of potentials set in the column electrode 2 _A and the row electrode 2 _B of 1 _b is shown. For example, in the liquid crystal cell 11 _a , it is assumed that the potential of the selected row electrode 2 _B is set to 0 V and the potential of the column electrode 2 _A is set to V _on . That is, it is assumed that the potential of the column electrode is higher. At this time, in the liquid crystal cell 11 _b , the potential of the selected row electrode 2 _B is set to be higher than that of the column electrode 2 _A. For example, to turn on the display, the row electrode 2 _B
Is set to V _on, and the potential of the column electrode 2 _A is set to 0V. In the liquid crystal cell 11 _a , the row electrode 2 _B and the column electrode 2 _A
When the level relationship of the potential of 1 is reversed (for example, the row electrode is V _on and the column electrode is 0 V), the potential relationship of the liquid crystal cell 11 _b is also reversed. Here, the liquid crystal cell 1
The case of applying the voltage V _on to the memory liquid crystal 4 of 1 _a has been described, but the same applies to the case of applying the voltage V _off to the memory liquid crystal 4 of the liquid crystal cell 11 _a as shown in FIG. 6.

[0062] In the liquid crystal cell 11 _a, the row electrodes 2
_When the potential of the column electrode 2 _A is higher than that of _B , the liquid crystal cell 11 _c
The electric potential of the row electrode 2 _B in the line may be higher or lower than that of the column electrode. However, when reversing the high and low relationship of the potential in the liquid crystal cell 11 _a, a relationship among the potentials in the liquid crystal cell 11 _c also be reversed.

In this way, one liquid crystal cell 11 _a and the other liquid crystal cell 11 _b are arranged so that the potential relationship between the row electrode 2 and the column electrode 2 _A is reversed. With this configuration,
One or set simultaneously higher potential to the row electrodes 2 _B in the liquid crystal cell 11 _a and the other liquid crystal cell 11 _b of the column electrodes 2 _A
At the same time, a high potential is not set. That is, high potentials such as V _on are not simultaneously set to the row electrodes of both the liquid crystal cell 11 _a and the liquid crystal cell 11 _b . As a result,
It is possible to prevent a large amount of current from flowing through the row electrodes of the two layers at the same time. Similarly, it is possible to prevent a large amount of current from flowing through the column electrodes of the two layers at the same time.

[0064]

EXAMPLE [Example 1] Two liquid crystal cells having 240 row electrodes were prepared. The cell gap d of one liquid crystal cell was set to 3.6 μm, and the cell gap d of the other liquid crystal cell was set.
Was 4.6 μm. Then, the liquid crystal cell with d = 3.6 μm was injected with the memory type liquid crystal having the selective reflection wavelength λ = 490 nm. This memory-type liquid crystal exhibits blue in the planar state. For a liquid crystal cell with d = 4.6 μm, λ = 6
A 20 nm memory liquid crystal was injected. This memory-type liquid crystal exhibits orange in the planar state. The average refractive index of the memory liquid crystal injected into the two liquid crystal cells is the same.

The two liquid crystal cells thus prepared were laminated. Then, the drivers (row driver and column driver) corresponding to each layer were connected to the electrodes of each layer, and one power supply circuit was connected to each driver. In addition, V _r + V _c = 18 V, V _r / R
V _r and V _c satisfying _c = 7 were defined. Then, the liquid crystal display device was driven with the voltage for turning on the display as V _r + V _c and the voltage for turning off the display as V _r −V _c .

Scanning was performed twice while applying a voltage of 18 V in order to turn on the display of the memory type liquid crystal located in the selected row. As a result, the entire screen was turned on.
Next, scanning for writing a display was performed twice. As a result, each pixel in each layer is turned on or off and the desired display is written. The selection time of each row electrode was 20 ms, and the voltage was applied while reversing the level relationship between the potential of the row electrode and the potential of the column electrode in each layer every 5 ms.

Comparative Example 1 Two liquid crystal cells having 240 row electrodes were prepared. The cell gap of both liquid crystal cells was 4 μm. One liquid crystal cell has a selective reflection wavelength λ
= 490 nm was injected into the liquid crystal, and the other liquid crystal cell was injected with λ = 620 nm into the liquid crystal. The average refractive index of each memory liquid crystal is the same. The two liquid crystal cells thus prepared were stacked, and the driver corresponding to each layer was connected to the electrode of each layer. Moreover, different power supply circuits were connected to the respective drivers.

A liquid crystal having a memory property of λ = 490 nm was injected.
In the liquid crystal cell, V_r+ V_c= 20V, V_r/ R_c= 7
Satisfied V_r, V_cVoltage to determine the on-state
To V _r+ V_c, The voltage for off display is V_r-V_c
And Similarly, a liquid crystal with a memory property of λ = 620 nm is injected.
In the liquid crystal cell_r+ V_c= 16V, V_r/ V_c=
V satisfying 7_r, V_cDepending on the display
And the voltage for off display.

As in Example 1, the scanning for turning on the entire screen and the scanning for writing the display were performed twice each. As a result, a desired display could be written as in Example 1.

FIG. 7 shows the values of d / λ in Example 1 and Comparative Example 1. D / λ shown in FIG. 7 is a value calculated after converting the cell gap and the selective reflection wavelength into units of meters. In Example 1, the maximum value A of d / λ is 7.42 and the minimum value B is 7.34. Therefore, in Example 1, (AB) / ((A + B) / 2) = 0.01 and the condition of (AB) / ((A + B) / 2) ≦ 0.1 is satisfied. . In this example 1, the voltage for turning on the display and the voltage for turning off the display were common to each layer, and a desired display could be written using one power supply circuit.

On the other hand, in Comparative Example 1, the maximum value A of d / λ is 8.16 and the minimum value B is 6.45. In this case, (A−B) / ((A + B) / 2) = 0.23, and the condition of (A−B) / ((A + B) / 2) ≦ 0.1 is also (A−B) / The condition of ((A + B) / 2) ≦ 0.15 is also not satisfied. In Comparative Example 1, the voltage for turning on the display and the voltage for turning off were different in each layer, and the desired display could be written by using two power supply circuits.

From the above, it is understood that the applied voltage can be made common by individually defining the cell gap of each liquid crystal cell.

In Example 1, another liquid crystal cell may be further stacked and driven by a common voltage.
For example, a liquid crystal cell having a cell gap d = 4.2 μm and a memory liquid crystal having a selective reflection wavelength λ of 530 nm may be added to the liquid crystal cell shown in Example 1. Even in this case, (A−B) / ((A + B) / 2) ≦ 0.1
That is, the three liquid crystal cells can be driven with a common voltage. The selective reflection wavelength λ = 530n
The memory-type liquid crystal of m exhibits green in the planar state.

[Example 2] The cell gap d is 4.2 μm,
Liquid crystal cells each having a size of 4.6 μm were prepared. Then, in the liquid crystal cell with d = 4.2 μm, the selective reflection wavelength λ =
A liquid crystal with a memory property of 532 nm was injected, and a liquid crystal with a memory property of λ = 635 nm was injected into the other liquid crystal cell. When two liquid crystal cells were laminated and driven by the same power supply circuit, a display with a good contrast ratio was obtained.

Comparative Example 2 Two liquid crystal cells having a cell gap d of 4 μm were prepared, and the same memory-type liquid crystal as in Example 2 was injected into each liquid crystal cell. When two liquid crystal cells were laminated and driven by the same power supply circuit, display with a good contrast ratio could not be obtained.

FIG. 8A shows the value of (AB) / ((A + B) / 2) in Example 2 and Comparative Example 2. In Example 2, this value was 0.1 or less, and a good contrast ratio display was obtained, but in Comparative Example 2, it was larger than 0.15, and a good contrast ratio display was not obtained.

[Example 3] The cell gap d is 3.8 μm,
Liquid crystal cells each having a size of 4.6 μm were prepared. In the liquid crystal cell with d = 3.8 μm, the selective reflection wavelength λ =
A liquid crystal having a memory property of 505 nm was injected, and a liquid crystal having a memory property of λ = 650 nm was injected into the other liquid crystal cell. When two liquid crystal cells were laminated and driven by the same power supply circuit, a display with a good contrast ratio was obtained.

Example 4 Instead of the liquid crystal cell of d = 3.8 μm prepared in Example 3, a liquid crystal cell of d = 3.6 μm was prepared. Other conditions were the same as in Example 3. In this case, Example 3
An even better display of contrast ratio was obtained.

[Comparative Example 3] Two liquid crystal cells each having a cell gap d of 4 µm were prepared, and the same liquid crystal as in Example 3 was injected into each liquid crystal cell. When two liquid crystal cells were laminated and driven by the same power supply circuit, display with a good contrast ratio could not be obtained.

FIG. 8B shows the values of (AB) / ((A + B) / 2) in Examples 3 and 4 and Comparative Example 3. In Example 3, this value was 0.1 or less, and a good contrast ratio display was obtained. In Example 4, this value was 0, and an even better contrast ratio display was obtained. In Comparative Example 3, the value was larger than 0.15, and a display with a good contrast ratio could not be obtained.

[Example 5] The cell gap d is 4.2 μm,
Liquid crystal cells of 5.0 μm and 3.6 μm were prepared. Then, a liquid crystal cell with d = 4.2 μm was injected with a memory-type liquid crystal with a selective reflection wavelength λ = 532 nm, and d =
A liquid crystal cell of λ = 650 nm was injected into the 5.0 μm liquid crystal cell. Further, the liquid crystal with a memory property of λ = 480 nm was injected into the liquid crystal with a memory property of d = 3.6 μm. When three liquid crystal cells were laminated and driven by the same power supply circuit, a display with a good contrast ratio was obtained.

[Comparative Example 4] Three liquid crystal cells having a cell gap d of 4 µm were prepared, and the same memory-type liquid crystal as in Example 5 was injected into each liquid crystal cell. When three liquid crystal cells were laminated and driven by the same power supply circuit, display with a good contrast ratio could not be obtained.

FIG. 8A shows the value of (AB) / ((A + B) / 2) in Example 5 and Comparative Example 4. In Example 5, this value was 0.1 or less, and a good contrast ratio display was obtained, but in Comparative Example 4, it was larger than 0.15, and a good contrast ratio display was not obtained.

Next, a driving method for preventing a large load from being applied to the power supply circuit when driving the stacked liquid crystal cells with one power supply circuit will be described. FIG. 9 is a block diagram showing an example of a liquid crystal display device in which stacked liquid crystal cells are driven by one power supply circuit. In this example, two liquid crystal cells (first liquid crystal cell 61 and second liquid crystal cell 71)
An example will be described in which the layers are stacked. First liquid crystal cell 61
The second liquid crystal cell 71 includes a memory liquid crystal such as a chiral nematic liquid crystal between a plurality of row electrodes and a plurality of column electrodes. First liquid crystal cell 61 and second liquid crystal cell 71
Are driven by a common drive voltage output from one power supply circuit 77.

The row driver and column driver (first row driver 62, first column driver 63, second row driver 72, and second column driver 73) of each layer each have a plurality of voltage output terminals. . Each row electrode of the first liquid crystal cell 61 is connected to each voltage output terminal of the first row driver 62 in a one-to-one relationship. The individual column electrodes of the first liquid crystal cell 61 are connected to the individual voltage output terminals of the first column driver 63 in a one-to-one relationship. Similarly, the second liquid crystal cell 7
One row electrode and one column electrode are also connected to the second row driver 72 and the second column driver 73, respectively.

The first row driver 62 selects the row electrodes and scans all the row electrodes so as to scan all the row electrodes.
Drive 1 The first column driver 63 drives the first liquid crystal cell 61 by applying a voltage corresponding to display data to the column electrode of the first liquid crystal cell 61. First liquid crystal cell 61
Is a first row driver 62 and a first column driver 63.
Driven to set the potentials of the row electrodes and column electrodes. The second row driver 72 and the second column driver 73, like the first row driver 62 and the first column driver 63,
The second liquid crystal cell 71 is driven. Second liquid crystal cell 71
Is a second row driver 72 and a second column driver 73.
Driven to set the potentials of the row electrodes and column electrodes.

The memory 75 holds the display data of each layer. The controller 76 reads display data from the memory 75. Then, Data which is the display data of the first layer
₁ is output to the first column driver 63, and Data ₂ which is the display data of the second layer is output to the second column driver 73.

The controller 76 uses the first column driver 6
3 and the second column driver 73, CP (data transfer clock) that defines the timing for sequentially acquiring the data of each column from the display data for one row, and LP (latch that indicates the switching of the row electrode to be selected). Pulse) and are output.
Further, the controller 76 outputs LP and FLM (first line marker) indicating the start of one frame to the first row driver 62 and the second row driver 72.

Further, the controller 76 causes the first row driver 62, the first column driver 63, the second row driver 72, and the second column driver 73 to switch the potential at the time of switching the potential. FR (potential switching signal for alternating current) that specifies Depending on FR
How to switch the potential will be described later. Hereinafter, the FR output from the controller 76 to the first row driver 62 and the first column driver 63 will be referred to as FR _1, and the second row driver 72 and the second column driver 73 will be described.
The FR output to is shown as FR ₂ . The controller 76
While switching the FR _1, FR ₂ of the level setting (or settings and or low level to high level), FR ₂ becomes a low level when FR ₁ is at a high level, FR ₂ when FR ₁ is at a low level FR to be at a high level
₁ and FR ₂ are output.

FIG. 10A is an explanatory diagram showing the timing of signals input to the row driver during driving. The first row driver 62 and the second row driver 72 are
Is input, the row electrodes to be selected are sequentially switched according to the LP input subsequently. The period from the input of LP to the input of the next LP is the selection period of one row electrode. FIG. 10B is an explanatory diagram showing the timing of signals input to the column driver during driving.
The first column driver 63 and the second column driver 73 are
When each CP is input, at that timing, the data in each column is sequentially acquired from the display data for one row to be selected. Then, when LP is input, the potential of each column electrode is set based on the acquired data.

The power supply circuit 77 shown in FIG. 9 includes a first row driver 62, a first column driver 63, and a second row driver 7.
2 and the drive voltage is output to the second column driver 73. The power supply circuit 77 outputs voltages V _{0 to} V ₅ as drive voltages. FIG. 11 is a block diagram showing an example of the power supply circuit 77. The power supply circuit 77 is one power supply circuit,
A resistance part (resistors 83 to 87) that divides the supplied voltage
And a plurality of operational amplifiers 91 to which the divided voltage is input.
Only one combination with 95 is provided.

The constant voltage V _cc is input to the power supply circuit 77. The operational amplifier 96 has a voltage V ₅ in according to the resistance 82 connected between the inverting input terminal and the ground potential and the resistance 81 connected between the output terminal and the inverting input terminal.
Is output. This voltage _{V 5i n} is the resistance portion (resistor 83 to
87). Voltage between the voltage _{V 5in} the voltage _{V 0} (corresponding to the ground potential) is divided by resistors 83 to 87 min, the voltage _V 4in _{~V 1 in} occurs. Here, in general, the voltage V ₀ is the same as the ground potential.

Since the voltage dividing circuit of the resistors 83 to 87 has a small current capacity for driving the liquid crystal cell, the driving capacity is increased by the operational amplifiers 91 to 95 connected to the voltage follower. That is, the voltage _V 5in _{~V 1in} is input to the non-inverting input terminal of the operational amplifier 91 to 95 which is voltage-follower connected. Then, the output voltages of the operational amplifiers 91 to 95 are output as V _{5 to} V ₁ to each row driver and each column driver. Voltage _V 5in _{~V 1in} is the same as the voltage _V 5 ~V ₁ respectively.

The memory liquid crystal of each layer is transferred to the planar.
Voltage V₅As specified. In addition, resistors 83 to 87
Is set to satisfy the following conditions. V₅-V_Four
= V ₁-V₀= V_Four-V_Three= V_Two-V₁So that
Specified in. Also, V₅-V_TwoAnd V_Three-V₀Is memory
Becomes a voltage that shifts the liquid crystal to focal conic,
V₅-V_Four, V₁-V₀, V_Four-V_Three, V_Two-V₁The
The voltage is set so as not to change the liquid crystal.

The voltage V ₅ is a voltage applied to the selected row electrode during positive polarity driving and to the column electrode that is turned on during negative polarity driving. The voltage V ₄ is a voltage applied to a row electrode that is not selected during negative driving. The voltage V ₃ is a voltage applied to the column electrode that is turned off during negative driving. The voltage V ₂ is a voltage applied to the column electrode that is turned off during positive polarity driving. The voltage V ₁ is a voltage applied to a row electrode that is not selected during positive polarity driving. The voltage V ₀ is a voltage applied to the selected row electrode during negative polarity driving, and to the column electrode that is turned on during positive polarity driving. Here, positive polarity driving means driving so that the potential of the selected row electrode is higher than the potential of the column electrode, and negative driving is
Driving is performed so that the potential of the selected row electrode becomes lower than the potential of the column electrode.

The first row driver 62 and the first column driver 63 are driven by positive polarity drive when FR ₁ is low level, and are driven by negative polarity drive when FR ₁ is high level. Similarly, the second row driver 72 and the second column driver 73 are driven by positive polarity drive when FR ₂ is low level, and are driven by negative polarity drive when FR ₂ is high level.

The controller 76 controls the FR ₁ and FR ₂
FR ₁ and FR ₂ are output so that the levels are opposite to each other while switching the setting of. Therefore, in each liquid crystal cell, a voltage is applied to the memory liquid crystal while reversing the level relationship between the potentials of the column electrode and the selected row electrode. Further, in the first liquid crystal cell 61, when the potential of the selected row electrode is made higher than the potential of the column electrode to apply the voltage to the memory liquid crystal,
In the second liquid crystal cell 71, the potential of the column electrode is set higher than the potential of the selected row electrode, and a voltage is applied to the liquid crystal having a memory effect. In the first liquid crystal cell 61, when the potential of the column electrode is made higher than the potential of the selected row electrode and a voltage is applied to the liquid crystal having the memory property, in the second liquid crystal cell 71, the potential of the selected row electrode is changed to the column. The voltage is applied to the liquid crystal with memory by setting it higher than the potential of the electrode.

FIG. 12 is an explanatory diagram showing the relationship between the signal output from the controller 76 and the drive waveform. FIG. 12 shows a drive waveform when the pixels in each row of each liquid crystal cell are turned on during the reset period. The controller 76
The first row driver 62, the first column driver 63, the second row driver 72, and the second column driver 73 have FL
Output M and LP. The controller 76 outputs the same FLM and LP to the row driver and the column driver of each layer. The first row driver 62 and the second row driver 72 switch the row electrode to be selected each time LP is input after FLM is input. First row driver 6
When LP is input, the third and second column drivers 73 set the potential of each column electrode of the liquid crystal cell based on the display data of the selected row.

Further, the controller 76 uses the first line driver.
FR to the Ibar 62 and the first column driver 63₁Output
The second row driver 72 and the second column driver 73.
To FR _TwoIs output. The first row driver 62 is FR₁
Is low level, the potential of the selected row electrode is V₅(No.
1 potential), FR₁Is high level, select
The potential of the row electrode₀(Second potential). Well
Also, the first row driver 62 is FR₁Is low level
The potential of the unselected row electrodes is V₁(Third potential)
Set to FR₁Is high level, it is not selected
The potential of the row electrode is V _FourSet to (fourth potential). As well
In addition, the second row driver 72 is also FR_TwoChoose according to
The potential of the row electrode is V₅Or V₀Set to and select
No row electrode potential is V₁Or V_FourSet to.

[0100] The controller 76, the level of FR ₁ and FR ₂ outputs the _FR 1, FR ₂ so as to be opposite to each other. Therefore, when the first row driver 62 in the first liquid crystal cell 61 sets the potential of the selected row electrode to V ₅ (first potential), the second row driver 72 causes the second liquid crystal cell The potential of the row electrode selected in 71 is set to V ₀ (second potential). Conversely, in the first liquid crystal cell 61, when the potential of the selected row electrode is set to V ₀ (second potential), the potential of the row electrode selected in the second liquid crystal cell 71 is set to V ₅ (first potential). Potential).

Similarly, the first row driver 62 sets the potential of the row electrode not selected in the first liquid crystal cell 61 to V.
When setting to ₁ (third potential), the second row driver 72 sets the potential of the row electrode not selected in the second liquid crystal cell 71 to V ₄ (fourth potential). On the contrary, in the first liquid crystal cell 61, the potential of the unselected row electrode is set to V
When setting to ₄ (fourth potential), the potential of the row electrode not selected in the second liquid crystal cell 71 is set to V ₁ (third potential).

Further, during the reset period, the first column driver 63 and the second column driver 73 are set to F
When R ₁ and FR ₂ are low level, the potential of each column electrode is set to V ₀ , and when R ₁ and FR ₂ are high level, the potential of each column electrode is V _0.
Set to ₅ . Since the levels of FR ₁ and FR ₂ are opposite to each other, during the reset period, if the potential of the column electrode of one liquid crystal cell is V ₀ , the potential of the other column electrode is V ₅ .

In the reset period, by selecting each row and turning on all the pixels of each liquid crystal cell, the display contents that have been displayed up to that point can be erased. New data is written in the subsequent display writing period. In the display writing period, the first row driver 62 and the second row driver 72
Sets the potential of the row electrode of each liquid crystal cell as in the reset period. The first column driver 63 and the second column driver 73 set the potential of the column electrode to be turned on to V ₅ or V ₀ according to the display data of the selected row. Also,
Setting the potential of the column electrodes to be off display to V ₃ or V _2.

The reset period corresponds to the first step of applying the voltage for the on-display or the off-display to the memory liquid crystal provided in each liquid crystal cell. The display writing period corresponds to the second stage in which a voltage corresponding to display data is applied to the memory liquid crystal included in each liquid crystal cell.

According to such a driving method, the first row driver 62 and the second row driver 72 do not set the potentials of the row electrodes to the same value at the same time. As a result, the load on the power supply circuit 77 is reduced. Figure 13
It is explanatory drawing which shows the example of the load which the power supply circuit 77 produces by the voltage output to a row driver. 13 (a), 13 (b)
Respectively, the power supply circuit 77 has a first row driver 62,
The fluctuation of the voltage output to the second row driver 72 is shown. As shown in FIGS. 13A and 13B, the potential of the row electrode is set to V ₁
From V to V ₄ , a spike-shaped fluctuation 301 occurs in the output voltage of the power supply circuit 77. Similarly, when the potential of the row electrode is switched from V ₄ to V ₁ , a spike-shaped fluctuation 302 occurs. The first row driver 62 and the second row driver 72 do not change the row electrode potentials from V ₁ to V ₄ at the same time, and when one switches to V ₄ , the other switches to V ₁ . Therefore, the fluctuations of the voltages V ₄ and V ₁ output from the power supply circuit 77 are as shown in FIG. 13C, and the fluctuation 301 when the potential is switched from V ₁ to V ₄
Can be dispersed so that they do not occur simultaneously. The fluctuation 302 can be similarly dispersed.

By dispersing the spike-like fluctuation (load of the power supply circuit), the capacity of the capacitor (not shown) provided at the voltage output terminal of the power supply circuit can be reduced. Also, it becomes easy to select the power supply circuit.

Incidentally, FIG. 13D shows the fluctuation of the output voltage when the polarities of the respective layers are driven in the same manner as the conventional driving waveform shown in FIG. In this case, since the potentials of the row electrodes of each layer are simultaneously switched from V ₀ to V ₄ , the fluctuation 301
Occur at the same time, and the fluctuation amount becomes large. The driving method according to the present invention avoids the fluctuation of the output voltage shown in FIG.

In FIG. 13, the fluctuation of the voltage output from the power supply circuit 77 to each row driver has been described. According to the driving method of the present invention, fluctuations in the voltage output from the power supply circuit 77 to each column driver can be dispersed. This effect is exerted especially in the reset period. FIG. 14 is an explanatory diagram showing an example of a load applied to the power supply circuit 77 by the voltage output to the column driver. As shown in FIGS. 14A and 14B, when the potential of the column electrode is switched from V ₀ to V ₅ , a fluctuation 311 occurs in the output voltage of the power supply circuit 77. Similarly, when the potential of the column electrode is switched from V ₅ to V ₀ , the fluctuation 312
Occurs.

In the first liquid crystal cell 61, the voltage of the column electrodes is
Rank V₀To V₅When switching to the second liquid crystal cell
At 72, the potential of the column electrode is V₅To V₀Switch to
For example, the voltage V output from the power supply circuit 77₅, V₀The fluctuation of
This is as shown in FIG. That is, the potential is V₀
To V₅Fluctuation 311 when switching to
Can be distributed as you like. Potential is V₅To V₀Switch to
The fluctuation 312 at time can be similarly dispersed. Reset
In the liquid crystal cell, the potential of the column electrode is V ₅Cut off
When replacing the column electrode of the other liquid crystal cell with V₀Switch to
Therefore, as shown in FIG. 14C, the fluctuation of the output voltage
Can be dispersed.

Although FIG. 9 shows a case where two liquid crystal cells are laminated, the above-described driving method can be applied even when three or more liquid crystal cells are laminated. In this case, one liquid crystal cell is driven similarly to the above-mentioned first liquid crystal cell 61,
At least one of the other liquid crystal cells may be driven in the same manner as the above-mentioned second liquid crystal cell 71.

In the above example, the case where all the pixels of each liquid crystal cell are turned on in the reset period and the display contents up to that point are erased has been described. When erasing the previous display content, all the pixels of each liquid crystal cell may be turned off after being turned on during the reset period. In order to turn off all the pixels of each liquid crystal cell in the reset period, the potential set to the signal electrode (column electrode) may be changed. In the driving waveform of the signal electrodes as shown in FIG. 12, it sets the _{V 2} instead of _{V 0, V 3} in place of _{V 5}
By setting, all the pixels in the selected row can be turned off. At this time, the drive waveform of the scan electrodes (row electrodes) may be the same as the drive waveform shown in FIG.

FIG. 12 shows the drive waveform when the IAPT is adopted, but the load of the power supply circuit can be reduced also when the APT (Alto Pleshko Technique) is adopted. APT
Is a driving method for keeping the potential of the row electrode not selected constant. In this case, during the reset period, if the potential of each column electrode is set higher than that of the selected row electrode in the first liquid crystal cell 61, the potential of each column electrode is selected in the second liquid crystal cell 71. Set lower than the row electrode. Similarly,
During the reset period, in the first liquid crystal cell 61, if the potential of each column electrode is set lower than that of the selected row electrode, in the second liquid crystal cell 71, the potential of each column electrode is set to the selected row electrode. Set higher than. Then, in each layer, driving is performed while reversing the level relationship between the potential of the selected row electrode and the potential of the column electrode. By driving in this way, the load on the power supply circuit can be reduced.

FIG. 15 is an explanatory diagram showing the load of the power supply circuit when the APT is adopted. FIG. 15A shows
The fluctuation of the output voltage of the power supply circuit due to the driving of the first liquid crystal cell 61 is shown. When the potential of the column electrode is switched from V ₁₁ to V ₁₃ during the reset period, a fluctuation 351 occurs in the output voltage accompanying the driving of the column electrode. At this time, a spike-like fluctuation 361 occurs in the output voltage accompanying the driving of the row electrode.
When the potential of the column electrode is switched from V ₁₃ to V ₁₁ , a change 352 occurs in the output voltage accompanying the driving of the column electrode. At this time, a spike-like fluctuation 362 occurs in the output voltage accompanying the driving of the row electrodes. As shown in FIG. 15B, the output voltage of the power supply circuit accompanying the driving of the second liquid crystal cell 72 also changes.

The level of the potential of the column electrode with respect to the potential of the selected row electrode is driven so as to be opposite in the two liquid crystal cells. Therefore, the spike-like fluctuation 36 shown in FIG.
1 and 362 are the fluctuations 36 shown in FIG.
2,361 cancel each other out. As a result, as shown in FIG. 15C, the voltage V ₁₂ output from the power supply circuit 77 does not change. In addition, the voltage V output from the power supply circuit 77
₁₃ and V ₁₁ change as shown in FIG. 15C, and change 3 when the potential is switched from V ₁₁ to V ₁₃
51 can be dispersed so that they do not occur simultaneously. Similarly, the variation 352 can be dispersed.

FIG. 16 shows the load of the power supply circuit when the two liquid crystal cells are driven so that the relationship between the potential of the selected row electrode and the potential of the column electrode is the same. In this case, fluctuation 3 caused by driving two liquid crystal cells
61 and 362 do not cancel each other, and the power supply circuit 77
The fluctuation of the voltage V ₁₂ output by the motor becomes large. Further, the fluctuation 351 when switching the potential from V ₁₁ to V ₁₃ is not dispersed, and the fluctuation of the voltage V ₁₃ output from the power supply circuit 77 becomes large. The voltage V output by the power supply circuit 77
The fluctuation of ₁₁ also becomes large similarly. The driving method according to the present invention avoids the fluctuation of the output voltage shown in FIG.

[0116]

According to the present invention, it is possible to write a display by applying a common voltage to the memory liquid crystal of each of the stacked liquid crystal cells. Then, a voltage can be applied to the memory liquid crystal of each liquid crystal cell with one power supply circuit.

Further, it is possible to prevent a large load from being applied to the power supply circuit when the voltage is supplied to the driver of each layer by one power supply circuit.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of liquid crystal cells stacked in a liquid crystal display device.

FIG. 2 is a schematic cross-sectional view of a liquid crystal display device of the present invention.

FIG. 3 is an explanatory diagram showing an example of nd / λ of each layer.

FIG. 4 is an explanatory diagram of an operation allowable voltage.

FIG. 5 is an explanatory diagram showing the overlap of operation allowable voltages.

FIG. 6 is an explanatory diagram showing a relationship between potentials of column electrodes and row electrodes in two layers.

FIG. 7 is a cell gap d, a selective reflection wavelength λ, and d
Explanatory drawing which shows the specific example of / (lambda).

FIG. 8 is a diagram showing an example of a value of (AB) / ((A + B) / 2).

FIG. 9 is a block diagram showing an example of a liquid crystal display device.

FIG. 10 is an explanatory diagram showing timings of signals input to a row driver and a column driver.

FIG. 11 is a block diagram illustrating an example of a power supply circuit.

FIG. 12 is an explanatory diagram showing a relationship between a signal output from a controller and a drive waveform.

FIG. 13 is an explanatory diagram showing an example of a load applied to a power supply circuit by voltage output to a row driver.

FIG. 14 is an explanatory diagram showing an example of a load applied to a power supply circuit by a voltage output to a column driver.

FIG. 15 is an explanatory diagram showing an example of a load applied to a power supply circuit when the APT is adopted.

FIG. 16 is an explanatory diagram showing an example of a load applied to the power supply circuit when the APT is adopted.

FIG. 17 is an explanatory diagram showing an example of an alignment state of memory liquid crystal.

FIG. 18 is an explanatory diagram showing an example of a drive waveform in IAPT.

FIG. 19 is a schematic diagram showing a configuration of a conventional liquid crystal display device.

[Explanation of symbols]

1 _A , 1 _B Glass substrate 2 _A , 2 _B Electrode 3 _A , 3 _B Thin film 4 Liquid crystal composition 11 _{a to} 11 _c Liquid crystal cell 12 _{a to} 12 _c Driver 13 Power supply circuit 14 Light absorber

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09G 3/36 G09G 3/36 (72) Inventor Shin Nagai 1150 Hazawa-machi, Kanagawa-ku, Yokohama, Kanagawa Prefecture Asahi Glass Co., Ltd. In-house (72) Inventor Noriko Suehiro 1150 Hazawa-machi, Kanagawa-ku, Yokohama, Kanagawa Asahi Glass Co., Ltd. F-term (reference) 2H089 HA21 HA32 RA18 SA01 SA02 TA07 TA08 2H093 NA11 NA25 NC03 ND50 5C006 AC24 BA11 BB08 BB12 BF42 FA41 FA45 GA02 GA03 5C080 AA10 BB05 DD22 FF10 JJ02 JJ04 JJ05 JJ06

Claims (8)

[Claims] 1. A liquid crystal display device in which a plurality of liquid crystal cells each including at least a chiral nematic liquid crystal exhibiting a planar state are stacked between a plurality of scanning electrodes and a plurality of signal electrodes, and a certain liquid crystal cell is selected. The reciprocal of the reflected wavelength is
It is provided so as to be 0.9 times or less or 1.1 times or more the reciprocal of the selective reflection wavelength of other liquid crystal cells, and the cell gap of each liquid crystal cell and the selective reflection wavelength have a predetermined relationship. Liquid crystal display device characterized by. 2. A cell gap of each liquid crystal cell is d, a selective reflection wavelength of each liquid crystal cell is λ, an average refractive index of a memory liquid crystal of each liquid crystal cell is n, and a maximum value of nd / λ of each liquid crystal cell is The liquid crystal display device according to claim 1, wherein (A−B) / ((A + B) / 2) ≦ 0.15 is satisfied, where A is the minimum value of nd / λ of each liquid crystal cell. 3. (A-B) / ((A + B) / 2) ≤0.1
The liquid crystal display device according to claim 2, which satisfies the above condition. 4. A liquid crystal cell according to claim 1, wherein when a voltage for turning on or off is applied to the liquid crystal having a memory property, the voltage is reversed while reversing the level relation between the potential of the signal electrode and the potential of the selected scanning electrode. When at least one liquid crystal cell of the other liquid crystal cells is set to have a potential of the selected scanning electrode of the one liquid crystal cell higher than that of the signal electrode of the one liquid crystal cell, When the potential is set higher than the potential of the selected scan electrode and the potential of the signal electrode of the one liquid crystal cell is set to be higher than the potential of the selected scan electrode of the one liquid crystal cell, the potential of the selected scan electrode is set. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is set higher than the potential of the signal electrode. 5. The liquid crystal display device according to claim 1, wherein the liquid crystal cells have the same average refractive index of the memory liquid crystals. 6. A driver for each liquid crystal cell is supplied with power from a common power supply circuit.
The liquid crystal display device according to item 1. 7. A method of driving a liquid crystal display device, wherein a plurality of liquid crystal cells, each of which has at least two memory-state liquid crystals exhibiting a stable state, are stacked between a plurality of scanning electrodes and a plurality of signal electrodes. On-display on the memory liquid crystal of each liquid crystal cell by using one power supply circuit that has only one combination of a resistance unit that divides the supplied voltage and a plurality of operational amplifiers that input the divided voltage Alternatively, it includes a first step of applying a voltage for turning off display and a second step of applying a voltage corresponding to display data to the memory liquid crystal included in each liquid crystal cell. Liquid crystal cell applies a voltage to the memory liquid crystal while reversing the relationship between the potential of the signal electrode and the potential of the selected scanning electrode, and at least one of the other liquid crystal cells is one liquid crystal cell. Is the best When the potential of the selected scanning electrode of the crystal cell is set higher than the signal electrode of the one liquid crystal cell, the potential of the signal electrode is set higher than the potential of the selected scanning electrode, and a voltage is applied to the liquid crystal with memory effect, When one liquid crystal cell sets the potential of the signal electrode of the one liquid crystal cell higher than that of the selected scan electrode of the one liquid crystal cell, the potential of the selected scan electrode is set higher than the potential of the signal electrode and memory performance is improved. A method for driving a liquid crystal display device, which comprises applying a voltage to the liquid crystal. 8. In the first step and the second step, one liquid crystal cell sets a first potential or a second potential to a selected scan electrode and sets a third potential to a non-selected scan electrode. Potential or a fourth potential is set, and at least one of the other liquid crystal cells is selected when one liquid crystal cell sets the first potential to the selected scanning electrode of the one liquid crystal cell. When a second potential is set to the scan electrode and one liquid crystal cell is set to the second potential on the selected scan electrode of the one liquid crystal cell, the first potential is set to the selected scan electrode, When the liquid crystal cell sets the third potential to the non-selected scan electrodes of the one liquid crystal cell, the fourth potential is set to the non-selected scan electrodes, and the one liquid crystal cell selects the one liquid crystal cell. When the fourth potential is set on the scan electrodes that are not The driving method of claim 7, setting the third potential to the scanning electrodes not.