JP2003142736A - Mounting method of semiconductor light emitting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simplify wiring work by reducing the number of wire bonding for the mounted member of a semiconductor light emitting device. SOLUTION: The semiconductor light emitting device 1 is provided with an element main body 2 and a sub-mount member 11. The element main body 2 is constituted so that respective semiconductor layers 4, 5 and 6 are formed on the surface of a transparent insulating substrate 3, and an N-side electrode 9 as well as a P-side electrode 10 are formed on predetermined places of respective layers. The sub-mount member 11 is provided with an auxiliary N-side electrode layer 15 formed so as to be insulated to the surface of a conductive substrate 12, and an auxiliary P-side electrode 14 formed so as to be conducted. The sub-mount member 11 and the element main body 2 are constituted integrally so that the surface side of the sub-mount member 11 is opposed to the surface side of the element main body 2 mutually, and the N-side electrode layer 15 is conducted while the auxiliary P-side electrode layer 14 is conducted to the P-side electrode 10. The semiconductor light emitting device 1, constituted in such a manner as described above, is mounted on the mounted member 16.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for mounting a semiconductor light emitting device, and more particularly, to a semiconductor light emitting device constructed by additionally attaching a submount member to a device body for performing a light emitting action. Regarding mounting method.

[0002]

2. Description of the Related Art In recent years, high brightness characteristics have been obtained by growing a crystal of a gallium nitride compound semiconductor on a sapphire substrate by utilizing a metal organic chemical vapor deposition method (hereinafter referred to as MOCVD method). A semiconductor light emitting device for emitting blue light has been developed (see Patent Document 1, for example).

[0003]

[Patent Document 1] Japanese Unexamined Patent Publication No. 5-152609

In the high-luminance semiconductor light emitting device for blue light emission, as shown in FIG. 9, a GaN buffer layer 71 is grown on a transparent sapphire substrate 70, and the buffer layer 7 is formed.
N-type semiconductor layer 72 (GaN layer, AlGa
The N layer), the light emitting layer 73 (InGaN layer), and the P-type semiconductor layer 74 (AlGaN layer, GaN layer) are grown in a laminated shape. Then, an N-side electrode 75 and a P-side electrode 76 are formed on the GaN layer in the N-type semiconductor layer 72 and the GaN layer in the P-type semiconductor layer 74, respectively.

On the other hand, in the mounting structure of the semiconductor light emitting element to the lead frame 77 of the illustrated example which is a mounted member, the lead frame 77 is formed by using wires 78 and 79 for both the N side electrode 75 and the P side electrode 76. N
The side terminal portion 77a and the P side terminal portion 77b are bonded to each other. The semiconductor light emitting element thus mounted is configured to emit light from the surface on the side where the electrode 76 is disposed, as indicated by the arrow in the figure.

[0006]

By the way, in the above-mentioned conventional semiconductor light emitting device, it is necessary to perform wire bonding at two points on a mounted member such as a lead frame, and the number of steps for mounting or connecting the wires is reduced. The actual situation is that the number of operations has become complicated and complicated.

Further, since the semiconductor light emitting device of this type has a structure in which light is emitted from the side where the electrodes are arranged, as shown in FIG. 10, the electrode 76 exists in the light emitting region A, The location where the electrode 76 is provided becomes a non-light emitting portion. Therefore, the substantial light emitting region is narrowed by the amount corresponding to the electrode 76, and in the example shown in the figure, the substantial light emitting region in the entire device is ½ or less of the total surface area. As a result, despite having the high brightness characteristic as described above,
There is a problem that it is difficult to obtain a sufficient amount of light emission, and it becomes difficult to meet the demand for high brightness when used for various display boards and the like.

The present invention has been devised under the circumstances described above, and reduces the number of wire bonds to a mounted member of a semiconductor light emitting element so that the connection work can be performed easily. At the same time, it is an object of the present invention to provide a method for mounting a semiconductor light emitting element, which can increase a substantial light emitting region in the semiconductor light emitting element as much as possible to secure a sufficient amount of light emission and improve brightness.

[0009]

DISCLOSURE OF THE INVENTION In order to solve the above problems, the present invention takes the following technical means.

That is, the invention described in claim 1 of the present application is a method for mounting a semiconductor light emitting element on a mounted member, wherein the semiconductor light emitting element is an N-type semiconductor layer on the surface of a transparent insulating substrate. A light emitting layer and a P-type semiconductor layer are formed, a P-side electrode is formed on the surface of the P-type semiconductor layer, and an N-side electrode is formed on an exposed surface portion of the N-type semiconductor layer. A main body and a submount member having an auxiliary N-side electrode layer formed so as to be insulated from the surface of the conductive substrate and an auxiliary P-side electrode layer formed so as to be in a conductive state. The submount member and the element body face each other on the surface sides of the submount member and the element body, and between the auxiliary N-side electrode layer and the N-side electrode and the auxiliary. The side electrode layer and the P-side electrode are integrally formed so as to be in a conductive state, respectively, and the semiconductor light emitting device configured as described above is mounted on a mounted member. There is.

The invention described in claim 2 of the present application is
In the invention according to claim 1, the surface portions of the auxiliary N-side electrode layer and the auxiliary P-side electrode layer of the submount member are covered with an insulating layer, and the insulating layer is formed on each of the auxiliary electrode layers. Each through hole that communicates independently is drilled,
In addition, on the surface side of the insulating layer, the respective adhering metal layers that are in a conductive state with the both auxiliary electrode layers are formed independently of each other through the through holes, and the respective adhering metal layers are formed. Is characterized in that it is bonded and attached to both electrodes of the element body.

According to the invention described in claim 1, by bonding the submount member of the semiconductor light emitting element to the P side terminal portion of the mounted member such as a lead frame, the P side of the element body is bonded. The electrodes are electrically connected from the auxiliary P-side electrode layer of the submount member to the P-side terminal portion of the mounted member such as the lead frame via the conductive substrate. Therefore, there is no need for wire bonding to the P-side electrode of the element body, and there is an advantage that the mounting work or connection work of this type of semiconductor light emitting device is simplified.

Further, the light emission from the element body is performed from the back surface of the sapphire substrate, which is the surface opposite to the surface where both electrodes are arranged, and the P-side electrode hinders light emission as in the conventional case. Things will disappear. As a result, most of the back surface of the sapphire substrate becomes a substantial light emitting region, a sufficient amount of light emission can be secured, and it is possible to meet the demand for high brightness when using this type of semiconductor light emitting device.

Since the light emitted from the light emitting layer of the element body to the submount member side is reflected by the auxiliary electrode layer on the surface of the submount member, the light is emitted from the back surface of the sapphire substrate in the element body. The total amount of light emitted by is further increased including the above-mentioned reflected light, and higher brightness can be obtained.

Further, according to the invention described in claim 2, each metal layer for adhesion is formed independently on the surface side of the insulating layer covering the surface portions of both electrodes of the submount member. It is possible to bring both auxiliary electrodes of the submount member into conduction with both electrodes of the element body simply by bonding and attaching to both electrodes of the element body.
Therefore, the electrical connection work between the submount member and the element body can be easily performed, and the strict restriction on the relative position error is relaxed, and the degree of freedom in positioning or alignment is increased.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The preferred embodiments of the present invention will be described below.
A specific description will be given with reference to the drawings.

FIG. 1 is a schematic vertical sectional front view showing an element body which is a constituent element of a semiconductor light emitting element according to the first embodiment of the present invention, FIG. 2 is a schematic plan view thereof, and FIG. 3 is a constituent element of the semiconductor light emitting element. 4 is a schematic vertical sectional front view showing the submount member, FIG. 4 is a schematic plan view thereof, and FIG. 5 is a schematic vertical sectional view showing the overall configuration of the semiconductor light emitting element and a mounting state to a lead frame.

As shown in FIG. 1, the device body 2 of the semiconductor light emitting device 1 according to the first embodiment basically comprises an N-type semiconductor layer 4 and a light emitting layer on a sapphire substrate 3 which is an insulating substrate. 5 and a P-type semiconductor layer 6 are formed to form a laminated portion 7. Specifically, the laminated portion 7 has a buffer layer 8 of gallium nitride (GaN) grown on the surface of the transparent or semi-transparent sapphire substrate 3, and an N-type GaN layer is sequentially formed on the surface side from the lower layer portion. 41 and N type A
layer 42 of _0.2 Ga _0.8 N and In _0.15 as a light emitting layer.
Ga _0.85 N layer 5 and P-type Al _0.2 Ga _0.8 N layer 61
And a P-type GaN layer 62. The light emitting layer 5 emits light having a wavelength corresponding to blue (preferably 470 nm).

In addition, the N-type GaN layer 41 and N
Si is added to the layer 42 of the type Al _0.2 Ga _0.8 N,
Mg is added to the P-type Al _0.2 Ga _0.8 N layer 61 and the P-type GaN layer 62.
Zn is added to the layer 5 of _0.15 Ga _0.85 N. Then, the Ga of In in the layer 5 of In _0.15 Ga _0.85 N is
When the composition ratio (mixed crystal ratio) is increased, the wavelength of light emitted from the layer 5 becomes longer, and when the addition amount of Zn is increased, the composition ratio is increased. It has the characteristic that the wavelength of light becomes longer than in the case. The thickness of each layer is, for example, 3 μm, 300 nm, 50 nm, 300 nm, 15 in the order of the layers 41, 42, 5, 61, 62 from the lower layer side.
It is set to 0 nm.

The element body 2 of the illustrated example is finally obtained as a single chip, for example, 0.5 m on a side in plan view.
Although it is a square shape of m, in the actual manufacturing,
It is obtained by collectively forming a wafer having a predetermined area as a wafer having a predetermined area by the MOCVD method and then dividing the wafer into the single chips by dicing.

Then, Ga in the N-type semiconductor layer 4 is
The N-side electrode 9 is formed on the exposed surface portion of the N layer 41 removed by etching, and the P-side electrode 10 is formed on the surface portion of the GaN layer in the P-type semiconductor layer 6. In addition, this N
The side electrode 9 and the P-side electrode 10 are roughly arranged in a plan view shape as shown in FIG.

On the other hand, as shown in FIG. 3, the submount member 11 of the semiconductor light emitting device 1 according to the first embodiment has SiO 2 on the surface of an opaque conductive silicon substrate 12.
_The insulating oxide film 13 of 2 is formed, the central portion thereof is removed by etching to form the auxiliary P-side electrode layer 14, and the auxiliary N-side electrode layer 15 is formed on the outer peripheral surface of the oxide film 13. It was formed. Both auxiliary electrode layers 14 and 15 are formed by vapor deposition using an alloy of Au and Sn or an indium alloy.
As will be described later, the electrode also serves as a solder metal.

Then, the auxiliary P-side electrode layer 14 and the auxiliary N
The side electrode layer 15 is generally arranged in a plan view shape as shown in FIG. In addition, as shown in the same figure, on one side of the silicon substrate 12, a strip-shaped auxiliary N-side electrode layer 1 that is electrically connected to the auxiliary N-side electrode layers 15 at two locations.
5a is formed on the surface of the insulating oxide film 13.

Next, a method for manufacturing the semiconductor light emitting device 1 by joining and integrating the device body 2 and the submount member 11 having the above-described structures, and the structure of the semiconductor light emitting device 1 obtained by the method will be described. .

First, after the element body 2 and the submount member 11 are separately manufactured, the surface sides of the element body 2 and the submount member 11 are opposed to each other, and the N-side electrodes 9 and P of the element body 2 are arranged.
The auxiliary N-side electrode layer 15 and the auxiliary P-side electrode layer 14 of the submount member 11 are soldered to the side electrodes 10, respectively. In this soldering work, since both auxiliary electrode layers 15 and 14 of the submount member 11 also serve as soldering metal, these auxiliary electrode layers 15 and 1 are used.
4 is melted and solidified appropriately.

As a result, as shown in FIG.
Light is emitted from the back surface 3a of the sapphire substrate 3 as indicated by an arrow. In addition, P of the element body 2
The side electrode 10 is the silicon substrate 12 of the submount member 11.
On the other hand, the N-side electrode 9 of the element body 2 is electrically insulated from the silicon substrate 12 while being electrically conductive. Note that FIG.
The height dimension of the laminated portion 7 of the element body 2 shown in FIG. 2 is longer than the height dimension of the laminated portion 7 shown in FIG. 5 for convenience of explanation.

To mount the semiconductor light emitting device 1 obtained as described above on the lead frame 16, as shown in FIG.
The upper surface of a is bonded so that the lower surface of the submount member 11 is conductive, and the strip-shaped auxiliary N-side electrode layer 15a of the submount member 11 and the N-side terminal portion 16b of the lead frame 16 are connected. Wire bonding is performed between them.

As a result, the P-side electrode 1 of the element body 2 is
0 is electrically connected to the P-side terminal portion 16a of the lead frame 16 through the conductive silicon substrate 12, and the N-side electrode 9 of the element body 2 is electrically connected to the N-side terminal portion 16b of the lead frame 16 through the wire 17. To be in a state. After that, by sealing the outer peripheral portion of the semiconductor light emitting element 1 with a resin or the like, an LED lamp for blue light emission is obtained.

With such a structure, a region other than the location of the N-side electrode 9 on the back surface 3a of the transparent sapphire substrate 3 of the element body 2 becomes a light emitting region, and about 75% of the total area of the back surface 3a is formed. It is used as a light emitting area.
Therefore, the light emission inhibition due to the electrodes is drastically reduced as in the conventional case, and a light emitting device having a sufficient light emission amount and high brightness can be obtained.

In addition, the light emitted downward from the light emitting layer 5 of the element body 2 is reflected by the opaque submount member 11 (auxiliary electrode layers 14 and 15) and then the back surface of the sapphire substrate 3. Since the light is emitted outward from 3a, there is an advantage that the utilization efficiency of light is improved.

Further, since the submount member 11 is used, wire bonding to the P-side electrode 10 is not required, so that the connection work can be simplified and the production can be facilitated.

Next, a second embodiment of the present invention will be described with reference to FIG.
This will be described with reference to 7 and 8. In the following description of the second embodiment, constituent elements common to those of the above-described first embodiment are designated by the same reference numerals and the description thereof will be omitted.

The semiconductor light emitting device 1 according to the second embodiment is different from the first embodiment described above in that, as shown in FIGS. 6 and 7, the entire surface of the device body 2 is formed by the Si method using the CVD method.
The insulating layer 18 made of O ₂ , Si ₃ N ₄ or the like is covered, and the insulating layer 18 is provided with through holes 19 and 20 communicating with the N-side electrode 9 and the P-side electrode 10, respectively. The point is that the metal layers 21 and 22 made of an alloy of Au and Sn or an indium alloy are independently formed on the surface portion. In this case, the through holes 19 and 2
Since the respective metal layers 21 and 22 are embedded in 0, the one metal layer 21 is brought into conduction with the N-side electrode 9 and the other metal layer 22 is connected to the P-side electrode 10.
It will be in the state of conducting to.

The structure of the submount member 11 is as shown in FIG.
7 and the shape of each metal layer 21 and 22 in plan view
And the auxiliary N-side electrode layer 15 and the auxiliary P-side electrode depending on the arrangement state.
The polar layer 14 is formed, and other portions, for example,
The auxiliary N-side electrode layer 15 is SiO ₂Insulating film 13 such as
Regarding the points which are formed by
It has the same configuration as.

As shown in FIG. 8, the element body 2 and the submount member 11 are arranged so that their front surface sides face each other, and the metal layers 21 and 22 and the auxiliary electrode layers 15 and 14 are arranged as shown in FIG. The semiconductor light emitting device 1 is obtained by joining and integrating and. In addition, according to the illustrated configuration,
The P-side electrode 10 of the element body 2 is electrically connected to the P-side terminal portion 16a of the lead frame 16 via the conductive silicon substrate 12, and the N-side electrode 9 of the element body 2 is on the N side of the lead frame 16. The terminal portion 16b is electrically connected via the wire 17.

In this case, the metal layers 21 and 2 are
Since the position of 2 and each auxiliary electrode layer 15 and 14 can be easily aligned, the joining work (soldering work) of these two layers, and by extension, the joining work of the element main body 2 and the submount member 11, is extremely simple. You can do it.

It is needless to say that the second embodiment can secure a sufficient amount of light emission as in the first embodiment.

[Brief description of drawings]

FIG. 1 is a schematic vertical sectional front view showing an element body which is a constituent element of a semiconductor light emitting element according to a first embodiment of the present invention.

FIG. 2 is a schematic plan view of the element body according to the first embodiment.

FIG. 3 is a schematic vertical sectional front view of a submount member which is a constituent element of the semiconductor light emitting device according to the first embodiment.

FIG. 4 is a schematic plan view of a submount member according to the first embodiment.

FIG. 5 is a schematic vertical cross-sectional side view showing an overall configuration of the semiconductor light emitting device according to the first embodiment and a mounting state thereof to a mounted member.

FIG. 6 is a schematic vertical sectional front view showing an element body which is a constituent element of a semiconductor light emitting element according to a second embodiment of the present invention.

FIG. 7 is a schematic plan view of an element body according to the second embodiment.

FIG. 8 is a schematic vertical cross-sectional side view showing the overall configuration of the semiconductor light emitting device according to the second embodiment and its attachment state to a mounted member.

FIG. 9 is a schematic vertical cross-sectional side view showing an entire configuration of a conventional semiconductor light emitting element and a mounting state of the semiconductor light emitting element on a mounted member.

FIG. 10 is a schematic plan view of a conventional semiconductor light emitting device.

[Explanation of symbols]

1 Semiconductor light emitting element 2 element body 3 Transparent insulating substrate (sapphire substrate) 4 N-type semiconductor layer 5 Light emitting layer 6 P-type semiconductor layer 9 N side electrode 10 P side electrode 11 Submount member 12 Conductive substrate (silicon substrate) 14 Auxiliary P-side electrode layer 15 Auxiliary N-side electrode layer 16 Lead frame (mounted member)

Claims (2)

[Claims] 1. A method of mounting a semiconductor light emitting element on a mount member, wherein the semiconductor light emitting element is formed on a surface of a transparent insulating substrate with N
-Type semiconductor layer, light-emitting layer, and P-type semiconductor layer are formed, a P-side electrode is formed on the surface of the P-type semiconductor layer, and an N-side electrode is formed on an exposed surface portion of the N-type semiconductor layer. And a submount member having an auxiliary N-side electrode layer formed so as to be insulated from the surface of the conductive substrate and an auxiliary P-side electrode layer formed so as to be in a conductive state, And the submount member and the element body face each other on the surface sides of the submount member and the element body, and between the auxiliary N-side electrode layer and the N-side electrode. And the auxiliary P-side electrode layer and the P-side electrode are integrally formed so as to be electrically connected to each other, and the semiconductor light emitting device configured as described above is mounted on a mounted member. This A method for mounting a semiconductor light emitting device, comprising: 2. The surface portions of the auxiliary N-side electrode layer and the auxiliary P-side electrode layer of the submount member in the semiconductor light emitting element are covered with an insulating layer, and the insulating layer covers both of the auxiliary electrode layers. Each through-hole communicating with each other is bored, and each metal layer for adhesion, which is electrically connected to both of the auxiliary electrode layers, is independently formed on the surface side of the insulating layer through each through-hole. 2. The mount for a semiconductor light emitting device according to claim 1, wherein the mounting metal layers are formed so as to be in a state of being bonded and attached to both electrodes of the device body. Method.