JP2003017700A - Bipolar semiconductor device - Google Patents

Abstract

(57) [Problem] To increase the on-state voltage of a conventional IGBT when the breakdown voltage is increased. This limit is overcome, the withstand voltage is increased, and the on-voltage is reduced. SOLUTION: A drain electrode 2, a high-concentration first conductivity type semiconductor substrate 4, a high-concentration second conductivity type buffer layer 6, a first conductivity type drift layer 8, a second conductivity type drift layer 10, a first conductivity type body layer. 12, a second conductivity type emitter region 18 is formed in the first conductivity type body layer 12, and a gate electrode 22 that penetrates through the second conductivity type emitter region 18 and reaches the second conductivity type drift layer 10. To form Two or more pn junction surfaces are formed, and the depletion layer spreads widely and uniformly at the time of reverse bias, so that the breakdown voltage can be maintained high even if the on-voltage is reduced.
A carrier injection layer may be provided on the surface side instead of the high-concentration first conductivity type semiconductor substrate 4.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a bipolar semiconductor device such as a bipolar transistor, a thyristor, and a diode. In particular, the present invention relates to a bipolar semiconductor device that conducts due to a conductivity modulation phenomenon in the drift layer.
Examples of this type of bipolar transistor include an insulated gate bipolar transistor (hereinafter referred to as IGBT) and an electrostatic induction bipolar transistor (hereinafter referred to as BSIT).

[0002]

2. Description of the Related Art IGBs exemplified above for power control
Bipolar semiconductor devices such as T, BSIT and thyristors are often used. A bipolar semiconductor device that conducts due to a conductivity modulation phenomenon in the drift layer is suitable for power control because it has a high breakdown voltage and a low on-voltage.

[0003] Figure 22 shows an example of a sectional structure of a conventional IGBT, in this case, ^{p +} -type drain electrode 62 on the back surface of the semiconductor substrate 64 is formed, ^{n +} -type buffer layer on the ^{p +} -type semiconductor substrate 64 66 are stacked to form the n ⁺ type buffer layer 6
The n ⁻ type drift layer 70 is stacked on the n ⁻ type drift layer 70, and the p ⁻ type body layer 72 is stacked on the n ⁻ type drift layer 70. p
^An n ⁺ type emitter region 78 and ap ⁺ type body contact region 74 are formed in the ⁻ type body layer 72, and an emitter electrode 76 is formed on the surface. FIG. 5 exemplifies a type in which switching is performed by a trench gate, and is located at a position facing the p ⁻ type body layer 72 between the n ⁻ type drift layer 70 and the n ⁺ type emitter region 78 with the insulating layer 80 interposed therebetween. The gate electrode 82 is formed. Note that hatching is omitted in the right half of the drawing in order to clarify the pointed portion of the pointing line.

[0004]

Problems to be Solved by the Invention A conventional IGBT is
the n ^- using high-resistance type drift layer 70 has secured the breakdown voltage, n in order to increase the breakdown voltage ^- the higher the resistance of the type drift layer 70, it becomes high to turn-on voltage. IG
Since the conductivity modulation phenomenon occurs in the drift layer 70, the BT has an advantage that the ON voltage is low even if the drift layer 70 has a high resistance, as compared with MOS or the like.
When comparing the GBTs, the higher the resistance of the drift layer 70, the higher the ON voltage. The bipolar semiconductor device has a higher breakdown voltage and a lower on-voltage than a unipolar semiconductor device such as a MOS, but if the breakdown voltage is further increased, the on-voltage increases, and if the on-voltage is reduced, the breakdown voltage increases. It has the limit of becoming low. The present invention overcomes this limitation and challenges the problem of increasing the withstand voltage and decreasing the on-voltage of the bipolar semiconductor device.

[0005]

Means and Actions for Solving the Problems In the present invention,
Since a conductivity modulation phenomenon occurs in the drift layer of the bipolar semiconductor device and a current flows, a layer of the opposite conductivity type can be added to the drift layer, and by adding the layer of the opposite conductivity type, a reverse junction surface can be formed. Utilizing the knowledge that even if formed, it does not cause a problem in the current flow during conduction. According to the research conducted by the present inventors, even if an opposite conductivity type layer, which is expected to increase the on-voltage to form a reverse junction surface, is added, the on-voltage is increased when the conductivity modulation phenomenon occurs and conduction occurs. It was confirmed that it would not be raised. On the other hand, when an opposite conductivity type layer forming an opposite junction surface is added in the drift layer, the depletion layer spreads widely when the semiconductor device is reverse biased, and the breakdown voltage is increased. For this reason, even if the resistance of the drift layer is lowered, the same breakdown voltage as the conventional one can be obtained. By adding an opposite conductivity type layer that is expected to raise the on-voltage to form the reverse junction surface, the resistance of the drift layer can actually be lowered without impairing the breakdown voltage, and as a result, the on-voltage can be lowered. Can be reduced. By utilizing this knowledge, it is possible to realize a bipolar semiconductor device having a higher breakdown voltage and a lower on-voltage than ever before.

One semiconductor device realized by the present invention is
In the drift layer of the bipolar type semiconductor device which conducts due to the conductivity modulation phenomenon in the drift layer, a layer of a conductivity type opposite to that of the drift layer and spreading in a plane is added (claim 1). . This bipolar type semiconductor device is typically embodied as an IGBT, a BSIT, a thyristor, a diode or the like. Further, it is embodied as both a type in which positive and negative carriers are injected from both sides of the drift layer to cause conductivity modulation, and a type in which positive and negative carriers are injected from one side to the drift layer to cause conductivity modulation.

If a region of opposite conductivity type is formed in the drift layer, when the semiconductor device is reverse biased,
The breakdown voltage is expected to increase because the depletion layer extends from the reverse junction surface. On the other hand, it is expected that the reverse junction surface impedes the flow of current during conduction, thus increasing the on-voltage. Therefore, it is required to utilize the former advantage to overcome the latter drawback, and for this purpose, a technique of dispersively disposing the opposite conductivity type regions in the drift layer has been developed. This is disclosed in JP-A-9-191109. According to this technique, when a reverse bias is applied, the depletion layer extends from the reverse junction surface to increase the withstand voltage, and when a positive bias is applied, the on-voltage does not increase because the current flows while avoiding the opposite conductivity type region. . However, in this technique, it is required to disperse the opposite conductivity type regions in the drift layer so as to be spaced apart from each other, and the opposite conductivity type layer must not spread in a plane. If it spreads in a plane,
This is because the on-voltage should rise due to the reverse junction surface that spreads across the surface. Therefore, in the conventional technique, it is required to disperse the opposite conductivity type regions in the drift layer so as to be spaced apart from each other, which makes it difficult to manufacture and increases the manufacturing cost. However, according to the research conducted by the present inventors, it was confirmed that, when the conductivity modulation phenomenon occurs in the drift layer and the conduction occurs, the reverse junction surface is easily crushed, and the conductivity modulation phenomenon occurs in the drift layer. It was confirmed that the on-voltage does not rise even if the opposite conductivity type layer in the drift layer is formed so as to spread in a plane only when it occurs and becomes conductive. Only when the conductivity is caused by the conductivity modulation phenomenon in the drift layer, it is not necessary to disperse the opposite conductivity type regions in the drift layer in a separated manner. It was confirmed. In this case, the opposite conductivity type layer can be easily manufactured, and the manufacturing cost is greatly reduced.

The thickness of the opposite conductivity type layer added in the drift layer is preferably thinner than the diffusion length of carriers of the opposite conductivity type (claim 2). In this case, when the reverse bias is applied, the depletion layer broadly expands, and when the positive bias is applied, the reverse junction surface is easily collapsed, so that the ON voltage is not increased and a phenomenon is stably obtained.

One typical example of the present invention is realized in an IGBT, a thyristor, a diode, etc. of a type in which a drift layer is laminated on a buffer layer, that is, a type having electrodes on both front and back surfaces (claim 3). . When a reverse bias is applied to this semiconductor device, an electric field is dispersed and applied to the lower surface of the opposite conductivity type layer and the lower surface of the body layer, and the depletion layer spreads widely,
High breakdown voltage can be obtained. Therefore, the resistance of the drift layer can be reduced while increasing the breakdown voltage, and the on-voltage can also be reduced. The characteristics of the present invention are remarkably exhibited. However, as described above, the present invention is not limited to the form in which the drift layer is stacked on the buffer layer and the positive and negative carriers are injected from both sides of the drift layer, and the positive and negative carriers such as the surface injection type IGBT are used. Is also effective for the type in which is injected from one side of the drift layer.

When the drift layer is laminated on the buffer layer, the opposite conductivity type layer is preferably laminated directly on the buffer layer (claim 4). In this case, the depletion layer spreads widely from the junction surface between the buffer layer and the drift layer and the junction surface between the drift layer and the body layer, and the breakdown voltage can be efficiently increased.

The opposite conductivity type layer may be formed at an intermediate height of the drift layer (claim 5). In this case, the depletion layer extends from the reverse junction surface to increase the withstand voltage, and other conductivity type carriers are accumulated in the other conductivity type layer at the time of turn-off, which easily escapes to the emitter side and the switching time at the time of turn-off is short. can do.

It is also possible to add a plurality of opposite conductivity type layers in the drift layer (claim 6). In this case, the depletion layer spreads uniformly and widely from the lower surface of the plurality of opposite conductivity type layers, and the breakdown voltage can be efficiently increased.

In the case of a bipolar semiconductor device having a trench gate extending in the drift layer, it is preferable that the opposite conductivity type layer is added at a position deeper than the deepest part of the trench gate (claim 7). In this case, since the resistance of the drift layer can be lowered, the current flowing along the trench gate can be spread over a wide range of the drift layer and flowed, and the on-resistance can be effectively lowered.

In the case of a bipolar semiconductor device having a trench gate extending in the drift layer, an opposite conductivity type layer may be added at a position shallower than the deepest part of the trench gate (claim 8). In this case, when conducting, carriers concentrate and flow in the drift layer facing the trench gate, so that the on-voltage can be suppressed low. At the time of turn-off, the trench gate serves as an off-gate that emits carriers of the other conductivity type to the emitter side, which contributes to surely turning off the semiconductor device. The switching time at turn-off can be shortened. One trench gate can have both the on-gate function and the off-gate function, or the on-gate and the off-gate can be provided separately.

The thickness of the anti-conductivity type layer may be maintained uniform and spread in a plane (claim 9), or the thickness may be spread in a plane while periodically changing (claim 10). ).
Layers of uniform thickness are easy to create and the production cost is low. In the method of providing a thickness distribution in the plane, it is easy to adjust various characteristics by selecting the thickness distribution pattern. For example, when a locally thin portion is created, carriers easily move, and the switching time can be shortened. If the thickness of the other conductivity type layer is thin, the effect of improving the withstand voltage may not be sufficiently obtained, but if the thickness fluctuates periodically and there is a thick portion in the vicinity, the depletion layer spreading from the thick portion may cause An effect of improving the withstand voltage in a thin portion can also be obtained. By adjusting the thickness distribution pattern, it becomes possible to satisfy desired characteristics such as breakdown voltage, on-resistance, and switching time.

The impurity concentration in the anti-conductivity type layer may be uniform in the thickness direction (Claim 11) or may vary in the thickness direction (Claim 12). By providing the concentration distribution, it is possible to further reduce the on-voltage and suppress the magnitude of the back electromotive force generated at turn-off. The impurity concentration in the drain layer including the anti-conductivity type layer may vary in the thickness direction (claim 13). By giving the concentration distribution to the drain layer other than the opposite conductivity type layer, it becomes possible to suppress the magnitude of the counter electromotive force generated at turn-off. If necessary, the buffer layer can be provided with a concentration distribution.

The present invention can be embodied in an IGBT having electrodes on both front and back surfaces. In this case, the drain electrode, the high-concentration first conductivity type semiconductor substrate, the high-concentration second conductivity type buffer layer, the first conductivity type drift layer, the second conductivity type drift layer, and the first conductivity type body layer are stacked in this order. It A second conductivity type emitter region is formed in the first conductivity type body layer, and faces the first conductivity type body layer between the second conductivity type drift layer and the second conductivity type emitter region with an insulating layer in between. A gate electrode is formed at the position (claim 14). In this case, the first
If the conductivity type is p-type, the second conductivity type is n-type, and if the first conductivity type is n-type, the second conductivity type is p-type. Further, the laminated structure of the first conductivity type drift layer and the second conductivity type drift layer may be repeatedly laminated a plurality of times. A low concentration second conductivity type drift layer may be added between the high concentration second conductivity type buffer layer and the first conductivity type drift layer. The gate electrode may be a trench gate type or a planar gate type. An example of a planar gate type IGBT is described in Japanese Patent Laid-Open No. 7-115189. IG above
The BT has a higher breakdown voltage and a lower on-voltage than the conventional IGBT, and reduces power loss.

In the case of the above-mentioned IGBT, the second-conductivity type regions may be dispersed and arranged in stripes or islands in the high-concentration first-conductivity type semiconductor substrate (claim 15). In this case, the amount of carriers injected from the high-concentration first conductivity type semiconductor substrate into the drift layer via the buffer layer is suppressed, and the carriers can be promptly removed at the time of turn-off. You can definitely turn off,
Also, the turn-off time can be shortened.

The present invention can also be embodied in an IGBT in which carriers are injected from the surface to cause a conductivity modulation phenomenon in the drift layer. In this case, the drain electrode, the second
A conductive type semiconductor substrate, a first conductive type drift layer, a second conductive type drift layer, and a first conductive type body layer are stacked in this order, and
A second conductivity type emitter region is formed in the conductivity type body layer, and a gate electrode facing the first conductivity type body layer between the second conductivity type drift layer and the second conductivity type emitter region with an insulating layer interposed therebetween is provided. A high-concentration first-conductivity type region that is formed and reaches the second-conductivity-type drift layer through the first-conductivity-type body layer is formed, and the injection gate electrode is connected to the high-concentration first-conductivity type region ( Claim 16). IGBT above
In this case, when a voltage is applied to the gate electrode, carriers are injected from the injection gate electrode, a conductivity modulation phenomenon occurs in the drift layer, and a low on-voltage is realized.

The present invention can also be embodied in a static induction transistor that injects carriers from the surface to generate a conductivity modulation phenomenon in the drift layer. In this case, the drain electrode, the second-conductivity-type semiconductor substrate, the first-conductivity-type drift layer, the second-conductivity-type drift layer, and the first-conductivity-type body layer are stacked in this order, and the second-conductivity body layer is provided with the second conductivity type. A high-concentration first conductivity type region is formed on both sides of the emitter region, the high-concentration first conductivity type region penetrating the first conductivity type body layer and reaching the second conductivity type drift layer. A gate electrode is connected to the mold region (claim 17). In this case, when a voltage is applied to the gate electrode, carriers are injected from the high-concentration first conductivity type region connected to the gate electrode, a conductivity modulation phenomenon occurs in the drift layer, and a low on-voltage is generated. Is realized.

The present invention can also be embodied in a diode. In this case, in the laminated structure of the first-conductivity-type layer and the second-conductivity-type layer that form the diode, the first-conductivity-type layer is formed in the first-conductivity-type layer.
Insert a thin layer of conductivity type. The thickness of the insertion layer is smaller than the diffusion length of the first conductivity type carrier (claim 18). In this case, when the first-conductivity-type thin layer is inserted into the second-conductivity-type layer to have a 4-layer thyristor structure at first glance, but the current flows in the forward direction because the first-conductivity-type layer is thin. The reverse junction surface easily collapses and acts as a diode. This diode has a high breakdown voltage and a low forward resistance.

The present invention can also be embodied in a thyristor. In this case, the first conductivity type substrate forming the thyristor,
A second conductivity type layer, a second conductivity type drift layer, a first conductivity type layer,
In the stack of the second conductivity type layers, the first conductivity type thin layer is inserted into the second conductivity type drift layer. The thickness of the first-conductivity-type thin layer is smaller than the diffusion length of the first-conductivity-type carrier. Also in this case, since the first-conductivity-type layer in the second-conductivity-type drift layer is thin, the reverse junction surface is easily crushed and acts as a thyristor. This thyristor has a high breakdown voltage and a low on-voltage.

[0023]

First Embodiment FIG. 1 shows a first embodiment in which the present invention is embodied in an IGBT having a front surface electrode, a back surface electrode, and a trench gate. In the case of the semiconductor device of the first embodiment, p ⁺
The drain electrode 2 is formed on the back surface of the type semiconductor substrate 4, and p
^An n ⁺ type buffer layer 6 is laminated on the ⁺ type semiconductor substrate 4,
The p ⁻ type drift layer 8 is stacked on the n ⁺ type buffer layer 6, the n ⁻ type drift layer 10 is stacked on the p ⁻ type drift layer 8, and the p ⁻ type body layer 12 is stacked on the n ⁻ type drift layer 10.
Are stacked. An n ⁺ type emitter region 18 and ap ⁺ type body contact region 14 are formed in the p ⁻ type body layer 12, and an emitter electrode 16 is formed on the surface. n ⁺
N ⁻ through the type emitter region 18 and the p ⁻ type body layer 12
A trench reaching the mold drift layer 10 is formed, and a gate electrode 22 covered with the insulating layer 20 is buried in the trench. The gate electrode 22 is the p ⁻ type body layer 1 between the n ⁻ type drift layer 10 and the n ⁺ type emitter region 18.
2 facing each other through the insulating layer 20. The p ⁻ -type drift layer 8 is deeper than the deepest part of the trench gate electrode 22.
Is in a deep position. The impurity concentration distributions of the p ⁺ type semiconductor substrate 4, the n ⁺ type buffer layer 6, the p ⁻ type drift layer 8, the n ⁻ type drift layer 10, and the p ⁻ type body layer 12 are substantially uniform. ^{The −} type drift layer 8 has a uniform thickness and extends uniformly in the horizontal direction. The p ⁻ type drift layer 8 is thinner than the diffusion length of holes. The cross-sectional structure of FIG. 1 is continuous in the direction perpendicular to the paper surface, and the gate electrode 22 is connected to an external wiring in a cross-section not shown. The sectional structure shown in FIG. 1 is periodically repeated in the left-right direction of the paper.

Clearly comparing FIG. 1 with FIG. 22, in this embodiment, an opposite conductivity type layer (p ⁻ type drift layer) 8 thinner than the diffusion length of holes is added to the n ⁻ type drift layer 70. There is. With respect to the layer thickness of the drift layer 70, the drift layer 10
The total layer thickness of # 8 and # 8 is thin. Further drift layer 1
The impurity concentrations of 0 and 8 are higher than the impurity concentration of the conventional drift layer 70, and the resistance is lowered.

When a reverse bias is applied to this semiconductor device,
A pn junction between the n ⁺ type buffer layer 6 and the p ⁻ type drift layer 8 and a p between the n ⁻ type drift layer 10 and the p ⁻ type body layer 12
A depletion layer extends from the n-junction. n ⁺ type buffer layer 6 and p ⁻
The depletion layer extending from the pn junction between the n type drift layers 8 mainly extends to the p ⁻ type drift layer 8 side, and the n ⁻ type drift layer 10
Punch through to. The p ⁻ type drift layer 8 and the n ⁻ type drift layer 10 are entirely depleted, and the entire drift layer is used to improve the breakdown voltage. The depletion layer extending from the pn junction between the n ⁻ type drift layer 10 and the p ⁻ type body layer 12 mainly extends toward the p ⁻ type body layer 12 side, and the p ⁻ type body layer 1
Spread throughout 2. When a reverse bias is applied, the depletion layer spreads widely over the drift layers 8 and 10 and the body layer 12,
The withstand voltage of this IGBT is higher than the conventional one. In this case, a high breakdown voltage can be obtained without increasing the resistance of the drift layers 8 and 10, so that the impurity concentration of the drift layers 8 and 10 can be increased to reduce the resistance, and further the layer thickness can be reduced. . Therefore, when turned on, the current flowing through the channel formed along the gate electrode 22 spreads widely in the n ⁻ type drift layer 10 and uniformly flows to the drain electrode 2 side as shown by the arrow. This also contributes to keeping the on-voltage low.

In the IGBT of this embodiment, a p ⁻ type drift layer 8 having a conductivity type opposite to that of the n ⁻ type drift layer 10 is laminated on the n ⁺ type buffer layer 6, and the n ⁻ type drift layer 10 is formed thereon.
Since they are laminated, the breakdown voltage is higher than that of the conventional IGBT. The thickness of the p ⁻ type drift layer 8 is smaller than the diffusion length of holes, and the reverse junction is easily collapsed when a positive bias is applied, so that the on-voltage is low. Since the drift layers 8 and 10 have a high impurity concentration and a low resistance and the layer thickness is thin, the on-voltage can be suppressed low.

In FIG. 2, the horizontal axis represents the ON voltage, and the vertical axis represents the time from when the gate voltage is turned off until the current flowing through the transistor is actually turned off. Circles in the figure show the measurement results of the IGBT of FIG. 1, and squares and triangles show the measurement results of the IGBT of FIG. 22 (conventional IGBT). It is confirmed that the response time can be shortened with the same on-voltage and the on-voltage can be reduced with the same response time as compared with the conventional case. P ⁻ type drift layer 8 at turn-off
Are confirmed to contribute to the effective discharge of carriers.

FIG. 3 shows the manufacturing process of the IGBT of FIG. 1 over time. Illustration up to the state of (A) is omitted because it is manufactured through normal steps. At the stage of (A),
The structure on the surface side of the n ⁻ type drift layer 10 is completed. The n ⁻ type drift layer 10 is formed on the n ⁺ type semiconductor substrate 24. In the step (B), the back surface of the n ⁺ type semiconductor substrate 24 is polished and thinned to a predetermined thickness.
In the stage of (C), boron ions are implanted from the back surface with high energy to form the p ⁻ type drift layer 8 on the lower surface of the n ⁻ type drift layer 10. In (D), BF ₂ ions are implanted at low energy from the back surface to change the back surface side of the n ⁺ type semiconductor substrate 24 into p ⁺ type 4. In (E), the drain electrode 2 is completed on the lower surface of the p ⁺ type 4. This allows the IG of FIG.
BT is completed. Opposite conductivity type layer (p ⁻ type drift layer 8)
Since it is spread over the surface, it can be manufactured by uniformly implanting boron ions, and can be manufactured easily at low cost.

FIG. 4 shows the IGBT of the second embodiment, in which an opposite conductivity type layer (p ⁻ type drift layer 8) is added between the lower n ⁻ type drift layer 10x and the upper n ⁻ type drift layer 10y. Has been done. Also in this case, when the reverse bias is applied, the lower n ⁻ type drift layer 10x and the p ⁻ type drift layer 8 are formed.
The depletion layer greatly extends from the junction surface of the p ⁻ type drift layer 8 to obtain a high breakdown voltage. In addition, holes are concentrated in the p ⁻ type drift layer 8 during conduction, and the holes quickly escape to the emitter side during turn-off, which has the advantage of shortening the switching time.

FIG. 5 shows a third embodiment, where n⁺Type buffer
On layer 6, p⁻Type drift layer 8 and n ⁻Type drift layer 10
2 shows an IGBT in which the alternating layers are repeated twice. In Figure 3
Indicates the lower alternating layer with the subscript a and the upper alternating layer with the subscript b
Shows. The number of alternating layers is not limited to 2 times, but 3 times
It may be more. Multiple drift layers of opposite conductivity type
When used, a homogeneous depletion layer can be formed over a wide area.
Therefore, the breakdown voltage can be increased more effectively. Opposite conductivity type
The plurality of drift layers 8a, 8b of the trench gate 22
Is formed in a region deeper than the deepest part of
The basic structure is maintained.

FIG. 6 shows a fourth embodiment of the buffer layer 6α.
Has a gradient in the thickness direction. In this case, the n-type impurity concentration is high on the lower side and low on the upper side. In this case, the depletion layer spreads smoothly at turn-off, and the counter electromotive force generated at turn-off can be suppressed low. It should be noted that the smooth spread is in contrast to the sudden spread, and does not mean that the depletion layer spreads slowly enough to slow the switching speed. Since the depletion layer spreads smoothly and quickly, the back electromotive force can be kept low without delaying the switching speed.

FIG. 7 shows a fifth embodiment of the buffer layer 6α.
Not only the p ⁻ type drift layer 8α and the n ⁻ type drift layer 10α have a concentration gradient in the thickness direction. In this case, even the p-type substrate 4α has a concentration gradient. By adjusting the concentration distribution in the thickness direction, the on-voltage is lowered while maintaining the breakdown voltage, the speed of depletion layer spreading is adjusted to adjust the amount of back electromotive force generated at turn-off, and the switching time is adjusted. It is possible,
The characteristics of the semiconductor element can be easily adjusted. For example, if a high impurity concentration region is formed in a part of the n ⁻ type drift layer 10α in the thickness direction, the on-voltage can be lowered while maintaining the breakdown voltage, and the impurity concentration of the p ⁻ type drift layer 8α is increased. When it is made thicker, the spreading speed of the depletion layer at the time of turn-off is delayed and the magnitude of the back electromotive force generated can be suppressed.

FIG. 8 shows a sixth embodiment, in which a p ⁻ type drift layer is formed by alternately repeating a low concentration layer 8y and a medium concentration layer 8x in the horizontal direction. At the time of turn-off, carriers are removed in a short time after passing through the low concentration layer 8y, and the switching time is short. While the reverse bias is applied, the depletion layer from the middle concentration layer 8x spreads over a wide range, and the low concentration layer 8x
It prevents the breakdown voltage from decreasing at y.

FIG. 9 shows a seventh embodiment, in which the p ⁻ type drift layer 8β has its thickness periodically changed in the horizontal direction. At turn-off, carriers are eliminated in a short time by passing through a thin region, and the switching time is short. While the reverse bias is applied, the depletion layer from the thick p ⁻ type drift layer 8β spreads over a wide range, and prevents the breakdown voltage from decreasing in the thin portion.

FIG. 10 shows an eighth embodiment, in which the p ⁻ type drift layer 8γ located in the middle of the n ⁻ type drift layers 10x and 10y changes its thickness periodically in the horizontal direction. It is possible to obtain an operation substantially similar to that of the seventh embodiment shown in FIG.

The p ^-- type drift layers 8β and 8γ shown in FIGS. 9 and 10 whose thickness is periodically changed in the horizontal direction can be manufactured as follows. First, a p ⁻ layer having a thick portion is uniformly formed in the surface direction, and then protons (H ⁺ ), deuterium, or deuterium ions are implanted into the portion where the thickness is to be reduced, and then 300 to 550 The p ⁻ layer is thinned by heating it to ℃ and heat-treating it to make it a donor, thereby making part of the p ⁻ layer n-type.
Alternatively, a p ⁻ layer having a thickness of a thick portion is uniformly formed in the surface direction, and then phosphorus ions are implanted into a portion where the thickness is to be thinned to convert impurities into donors to make a part of the p ⁻ layer n-type. Reduce the thickness of the p ^- layer. The p ⁻ type drift layers 8β and 8γ whose thickness is cyclically changed in the horizontal direction are manufactured by periodically selecting the positions where the ions are implanted and the impurities are converted to donors.

FIG. 11 shows a ninth embodiment. As described above, the cross-sectional structure shown in the drawing is repeated in the left-right direction of the paper,
A plurality of trench gates are extending in the drift layer 10. The drift layer 8d of the opposite conductivity type is added only to the position below the gap between the trench gates. The drift layer 8d of the opposite conductivity type does not exist immediately below the trench gate 22. The opposite conductivity type drift layer 8d does not necessarily have to extend over the entire surface, and may exist locally in a necessary portion.

FIG. 12 shows a tenth embodiment. In this embodiment, the p ⁺ -type semiconductor substrate 4 has a periodic pitch of n.
^{A +} region 3 is formed. As explained above, FIG.
The structure 2 is continuous in the direction perpendicular to the paper surface, and the n ⁺ region 3 extends in a stripe shape. Further, the cross-sectional structure of FIG. 12 is repeated in the left-right direction of the drawing, and a plurality of n ⁺ regions 3 are formed immediately below the trench gate in the left-right direction in the drawing at regular intervals. Since the n ⁺ region 3 has a function of inhibiting injection of excessive holes from the p ⁺ type semiconductor substrate 4 when the IGBT is conductive, the n ⁺ region 3 is provided to surely turn off the IGBT. You can do it. It is also effective in shortening the switching time.
Instead of extending in stripes, the n ⁺ regions 3 may be dispersed and arranged in islands at a periodic pitch in the p ⁺ type semiconductor substrate 4.

FIG. 13 shows an eleventh embodiment. n ⁺ region 3
Do not have to penetrate the p ⁺ type semiconductor substrate 4.

FIG. 14 shows a twelfth embodiment. In this embodiment, the trench gate is deep, and the gate electrode 22a and the insulating film 20a reach the p ⁻ type drift layer 8. When the trench gate reaches the p ⁻ type drift layer 8, the IGB
When T is conductive, a current flows through the accumulation region of the n ⁻ type drift layer 10, so that the resistance decreases and the on-voltage decreases. At the time of turn-off, the gate electrode 22a functions as an off-gate, the holes in the p ⁻ type drift layer 8 can be quickly extracted, and the turn-off can be surely performed. Also, the switching time is shortened.

FIG. 15 shows a thirteenth embodiment. In this embodiment, an off-gate electrode 26 is formed separately from the gate electrode 22 for turning on. Off-gate electrode 26
Are n ⁻ type drift layer 10, p ⁻ type drift layer 8, n ⁺
It penetrates through the type buffer layer 6 and reaches the p-type semiconductor substrate 4. The off-gate electrode 26 is insulated by the insulating layers 27 and 28. The off-gate electrode 26 is p-typed when turned off.
Holes in the ⁻ type drift layer 8 can be quickly extracted, and it can be reliably turned off. Also, the switching time is shortened.

FIG. 16 shows a fourteenth embodiment. In this embodiment, the off-gate electrode 26a is short and remains in the p ⁻ type drift layer 8. At the time of turn-off, the off-gate electrode 26a can quickly extract holes in the p ⁻ type drift layer 8 and can surely turn off. Also, the switching time is shortened.

FIG. 17 shows a fifteenth embodiment. In this embodiment, ap ⁺ type hole injection region 52 which penetrates the p ⁻ type body layer 12 and reaches the n ⁻ type drift layer 10 is formed. An injection gate electrode 50 is formed on the upper surface of the p ⁺ type hole injection region 52. In this case, at the time of turn-on, holes are injected from the injection gate electrode 50 and the p ⁺ type hole injection region 52 into the n ⁻ type drift layer 10 and the p ⁻ type drift layer 8 to generate an active conductivity modulation phenomenon. In this case, the p ⁺ -type layer is not required on the lower surface of the n ⁺ -type buffer layer 6.
The drain electrode 2 is formed directly on the lower surface of the n ⁺ type layer 6. The semiconductor device of FIG. 17 is a surface injection type IGBT and has the same characteristics as the IGBT shown in FIG.

FIG. 18 shows a sixteenth embodiment. This example
Then, there is no gate electrode. Instead of n⁺Type Emi
On both sides of the data area 56, p⁻Through the mold body layer 12
N ⁻P reaching the drift layer 10⁺Mold hole injection area
59 are formed. p⁺Above the mold hole injection area 59
A gate electrode 58 is formed on the surface, and n⁺Type emitter region
An emitter electrode 54 is formed on the upper surface of 56. This
In the case of⁺P on the lower surface of the mold layer 6⁺Mold layer is provided
Not in. n⁺The drain electrode 2 is directly formed on the lower surface of the mold layer 6.
Has been formed. In this case, a positive voltage is applied to the gate electrode 58.
When applied, p⁺Mold hole injection region 59 to n⁻Type
Lift layer 10 and p⁻By injecting holes into the mold drift layer 8
Generates a vigorous conductivity modulation phenomenon. For this reason
The pressure is low. In the semiconductor device of FIG. 18, holes are injected from the surface.
BSIT (Bipolar-mode Static Induction)
 Act as a Transistor).

FIG. 19 shows a seventeenth embodiment. In this embodiment, the present invention is embodied in a thyristor. p ⁻
The type drift layer 38 is thinner than the diffusion length of holes, and when a voltage is applied in the forward direction of the thyristor, the reverse junction surface is easily collapsed, and thus the type drift layer 38 operates as a thyristor. Also in this case,
When holes are injected from the p ⁺ -type hole injection region 44, active conductivity modulation occurs to turn on and realize a low on-voltage (or on-resistance). Since the ON voltage is lowered by utilizing the active conductivity modulation, the impurity concentration of the n ⁻ type drift layer 40 and the p ⁻ type drift layer 38 can be lowered, and a high breakdown voltage is realized at the time of OFF. At the time of reverse bias, the depletion layer extends widely from the junction surface between the n ⁺ type layer 36 and the p ⁻ type drift layer 38 and the junction surface between the n ⁻ type drift layer 40 and the p ⁻ type layer 42, which also increases the breakdown voltage.

FIG. 20 shows an eighteenth embodiment. In this embodiment, the present invention is embodied in a diode. p ⁻
The type drift layer 8 is thinner than the diffusion length of holes, and when a voltage is applied in the forward direction of the diode, the reverse junction surface is easily crushed, so that the type drift layer 8 operates as a diode. Also in this case, n
^The forward voltage drop is small because active conductivity modulation occurs in the ⁻ type drift layer 10 and the p ⁻ type drift layer 8. It uses active conductivity modulation to lower the forward resistance,
Impurity concentrations of the n ⁻ type drift layer 10 and the p ⁻ type drift layer 8 can be reduced, and a high breakdown voltage is realized when off. At the time of reverse bias, the depletion layer extends widely from the junction surface between the n ⁺ type layer 6 and the p ⁻ type layer 8 and the junction surface between the n ⁻ type layer 10 and the p ⁻ type layer 1, which also increases the breakdown voltage.

FIG. 21 shows a nineteenth embodiment. This embodiment also embodies the present invention in a diode. p ⁻
The type drift layer 8 is thinner than the diffusion length of holes, and when a voltage is applied in the forward direction of the diode, the reverse junction surface is easily crushed, so that the type drift layer 8 operates as a diode. Also in this case, n
^The forward voltage drop is small because active conductivity modulation occurs in the ⁻ type drift layer 10 and the p ⁻ type drift layer 8. It uses active conductivity modulation to lower the forward resistance,
Impurity concentrations of the n ⁻ type drift layer 10 and the p ⁻ type drift layer 8 can be reduced, and a high breakdown voltage is realized when off. At the time of reverse bias, the depletion layer extends widely from the junction surface between the n ⁺ type layer 6 and the p ⁻ type layer 8, which also increases the breakdown voltage.

In the above, an example in which the present invention is embodied in an IGBT, a thyristor, a diode or the like is shown, but it can be embodied in a normal bipolar transistor.
Further, in the above embodiment, the conductivity types p and n can be completely exchanged. Although the trench gate structure is adopted in many of the above-described embodiments, the present invention can be applied to the case of a planar gate structure. n ⁻ type drift layer 10 and p ⁻
The type drift layer 8 is preferably formed using an epitaxial layer, but other crystal growth techniques can be used. Various ion implantation techniques can be used for imparting the conductivity type.

[0049]

According to the bipolar semiconductor device of the first aspect, as illustrated in FIG. 1 and the like, since the drift layer 8 of opposite conductivity type spreading in a plane is laminated, the depletion layer spreads widely and the off-state is increased. The withstand voltage can be increased. Therefore, the impurity concentration of the drift layer can be increased and the resistance can be reduced without impairing the breakdown voltage. According to this semiconductor device, it is possible to control high-voltage power while suppressing power loss. If the thickness of the opposite conductivity type layer in the drift layer is smaller than the diffusion length of carriers of the opposite conductivity type,
Since the reverse junction surface formed by inserting the opposite conductivity type layer is easily collapsed by the positive bias, it is possible to prevent practically the adverse effects that would be caused by inserting the opposite conductivity type layer from occurring. it can. As illustrated in FIG. 1, when the drift layers 8 and 10 are stacked on the layer 6 serving as a buffer layer because the opposite conductivity type layer 4 is formed on the bottom surface, carriers are injected from the back surface. Thus, the conductivity modulation phenomenon of the semiconductor device which causes the conductivity modulation phenomenon can be activated, and the on-voltage can be lowered to increase the breakdown voltage. As illustrated in FIG. 1, when the drift layer 8 of the opposite conductivity type is stacked on the buffer layer 6, the depletion layer spreads widely and the effect is high. As illustrated in FIG. 4, when a drift layer 8 of the opposite conductivity type is stacked in the middle of the drift layers 10x and 10y, carriers are likely to escape at the time of turn-off, and reliable turn-off and a short switching time are achieved. As illustrated in FIG. 5, a plurality of layers 8a and 8b having opposite conductivity types are provided in the drift layer.
Is added, the on-voltage can be lowered to increase the withstand voltage and the switching time can be shortened. In the case of a bipolar semiconductor device in which a trench gate is extended in the drift layer, the resistance of the drift layer can be reduced by adding an opposite conductivity type layer at a position deeper than the deepest part of the trench gate. The current flowing along the gate can be spread over a wide range of the drift layer, and the on-resistance can be effectively reduced. In the case of a bipolar semiconductor device in which a trench gate extends into the drift layer, if the opposite conductivity type layer is added at a position shallower than the deepest part of the trench gate, the drift layer facing the trench gate at the time of conduction is formed. The on-voltage can be suppressed to a low level because carriers concentrate and flow. At the time of turn-off, it can be surely turned off and the switching time can be shortened. The thickness of the anti-conductivity type layer may be uniformly maintained and spread in the plane, or may be spread in the plane while periodically changing the thickness.
Layers of uniform thickness are easy to create and the production cost is low. In the method of giving a thickness distribution in the plane, the impurity concentration in the anti-conductivity type layer, which can be adjusted to various characteristics easily by selecting the distribution, may be uniform in the thickness direction, but changes in the thickness direction. May be. By providing the concentration distribution, it is possible to further reduce the on-voltage and suppress the magnitude of the back electromotive force generated at turn-off. Further, the impurity concentration in the drain layer including the anti-conductivity type layer may change in the thickness direction. By giving a concentration distribution to the drain layers other than the opposite electromotive force layer, it is possible to suppress the magnitude of the counter electromotive force generated at turn-off. Alternatively, by giving a concentration distribution to the buffer layer, it is possible to suppress the magnitude of the counter electromotive force generated at turn-off. The present invention is an IGBT having electrodes on both front and back surfaces.
Can be embodied in In this case, as illustrated in FIG. 1, the drain electrode 2, the high-concentration first conductivity type semiconductor substrate 4, the high-concentration second conductivity type buffer layer 6, the first conductivity type drift layer 8, and the second conductivity type drift. The layer 10 and the first conductivity type body layer 12 are stacked in this order. A second conductive type emitter region 18 is formed in the first conductive type body layer 12, and a first conductive type emitter region 18 is formed between the second conductive type drift layer 10 and the second conductive type emitter region 18.
A gate electrode 22 is formed at a position facing the conductive type body layer 12 with the insulating layer 20 in between. The gate electrode may be a trench gate type or a planar gate type. The conductivity types can be reversed, and if the first conductivity type is p-type, the second conductivity type is n-type, and the first conductivity type is n-type.
If it is a type, the second conductivity type is a p-type. As illustrated in FIG. 4, a second conductivity type low concentration drift layer 10x may be added between the high concentration second conductivity type buffer layer 6 and the first conductivity type drift layer 8. Alternatively, as illustrated in FIG. 5, the laminated structure of the first conductivity type drift layer 8 and the second conductivity type drift layer 10 may be repeatedly laminated a plurality of times. IG above
The BT has a higher breakdown voltage and a lower on-voltage than the conventional IGBT, and reduces power loss. In the case of the above-mentioned IGBT, as shown in FIG. 12 and FIG. 13, when the second conductivity type regions 3 are dispersed and arranged in a stripe shape or an island shape in the high concentration first conductivity type semiconductor substrate 4, It is possible to suppress the amount of carriers injected from the first-concentration-concentration semiconductor substrate 4 into the drift layer via the buffer layer 6, and to promptly escape the carriers at the time of turn-off. It can be surely turned off, and the turn-off time can be shortened. The present invention can also be embodied in an IGBT in which carriers are injected from the surface to cause a conductivity modulation phenomenon in the drift layer. In this case, as illustrated in FIG. 17, the drain electrode 2, the second conductivity type semiconductor substrate 6, the first conductivity type drift layer 8, and the second conductivity type drift layer 1 are used.
0 and the first conductivity type body layer 12 are stacked in this order, the second conductivity type emitter region 18 is formed in the first conductivity type body layer 12, and the second conductivity type drift layer 10 and the second conductivity type emitter region 18 are formed. The gate electrode 22 is formed so as to face the first conductivity type body layer 12 with the insulating layer in between, and the second conductivity type drift layer 10 penetrates through the first conductivity type body layer 12.
The high-concentration first-conductivity-type region 52 is formed, and the injection gate electrode 50 is connected to the high-concentration first-conductivity-type region 52. The gate electrode may be a trench gate type or a planar gate type. In the case of the above-mentioned IGBT, when a voltage is applied to the gate electrode, carriers are injected from the injection gate electrode, a conductivity modulation phenomenon occurs in the drift layer, and a low on-voltage is realized. The present invention can also be embodied in a static induction transistor that injects carriers from the surface to generate a conductivity modulation phenomenon in the drift layer. In this case, as illustrated in FIG. 18, the drain electrode 2, the second conductivity type semiconductor substrate 6, the first conductivity type drift layer 8, the second conductivity type
The conductivity type drift layer 10 and the first conductivity type body layer 12 are laminated in this order, the second conductivity type emitter region 56 is formed in the first conductivity type body layer 12, and the first conductivity type drift layer 10 and the first conductivity type body layer 12 are formed on both sides of the emitter region 56. A high-concentration first-conductivity-type region 59 that penetrates the conductivity-type body layer 12 and reaches the second-conductivity-type drift layer 10 is formed, and a gate electrode 58 is connected to the high-concentration first-conductivity type region 59. In this case, when a voltage is applied to the gate electrode, carriers are injected from the gate, a conductivity modulation phenomenon occurs in the drift layer, and a low on-voltage is realized. The present invention can also be embodied in a diode. In this case, as illustrated in FIGS. 20 and 21, in the laminated structure of the first conductivity type layer and the second conductivity type layer forming the diode, the first conductivity type thin layer 8 is inserted into the second conductivity type layer. To do. The thickness of the insertion layer 8 is made smaller than the diffusion length of the first conductivity type carrier. In this case, although the first-conductivity-type thin layer 8 is inserted into the second-conductivity-type layer to have a four-layer thyristor structure at first glance, the current flows in the forward direction because the first-conductivity-type layer 8 is thin. When flowing, the reverse junction easily collapses and acts as a diode. This diode has a high breakdown voltage and a low forward resistance. The present invention can also be embodied in a thyristor. In this case, as illustrated in FIG. 19, the first conductivity type substrate 34 and the second conductivity type layer 3 forming the thyristor.
In the stack of 6, the second conductivity type drift layer 40, the first conductivity type layer 42, and the second conductivity type layer 46, the first conductivity type thin layer 38 is inserted into the second conductivity type drift layer 40. The thickness of the first-conductivity-type thin layer 38 is smaller than the diffusion length of the first-conductivity-type carrier. Also in this case, since the first-conductivity-type layer 38 in the second-conductivity-type drift layer is thin, the reverse junction is easily collapsed and the first-conductivity-type layer 38 functions as a thyristor. This thyristor has a high breakdown voltage and a low on-voltage.

[Brief description of drawings]

FIG. 1 shows a cross section of a semiconductor device of a first embodiment.

FIG. 2 shows ON voltage and switching time of the semiconductor device of the first embodiment in comparison with a conventional device.

FIG. 3 shows the manufacturing process of the semiconductor device of the first embodiment over time.

FIG. 4 shows a cross section of a semiconductor device of a second embodiment.

FIG. 5 shows a cross section of a semiconductor device according to a third embodiment.

FIG. 6 shows a cross section of a semiconductor device according to a fourth embodiment.

FIG. 7 shows a cross section of a semiconductor device according to a fifth embodiment.

FIG. 8 shows a cross section of a semiconductor device according to a sixth embodiment.

FIG. 9 shows a cross section of a semiconductor device according to a seventh embodiment.

FIG. 10 shows a cross section of a semiconductor device according to an eighth embodiment.

FIG. 11 shows a cross section of a semiconductor device according to a ninth embodiment.

FIG. 12 shows a cross section of a semiconductor device according to a tenth embodiment.

FIG. 13 shows a cross section of a semiconductor device according to an eleventh embodiment.

FIG. 14 shows a cross section of a semiconductor device according to a twelfth embodiment.

FIG. 15 shows a cross section of a semiconductor device according to a thirteenth embodiment.

FIG. 16 shows a cross section of a semiconductor device according to a fourteenth embodiment.

FIG. 17 shows a cross section of a semiconductor device according to a fifteenth embodiment.

FIG. 18 shows a cross section of a semiconductor device according to a sixteenth embodiment.

FIG. 19 shows a cross section of a semiconductor device according to a seventeenth embodiment.

FIG. 20 shows a cross section of a semiconductor device according to an eighteenth embodiment.

FIG. 21 shows a cross section of a semiconductor device according to a nineteenth embodiment.

FIG. 22 shows a cross section of a conventional semiconductor device.

[Explanation of symbols]

2: Drain electrode 4: p ⁺ type semiconductor substrate (high concentration first conductivity type semiconductor substrate) 6: n ⁺ type buffer layer (high concentration second conductivity type buffer layer) 8: p ⁻ type drift layer (first conductivity type) Drift layer: Opposite conductive side drift layer) 10: n ⁻ type drift layer (second conductive type drift layer) 12: p ⁻ type body layer (first conductive type body layer) 14: p ⁺ type body contact region 16: emitter Electrode 16 18: n ⁺ type emitter region (second conductivity type emitter region) 20: insulating layer 22: trench gate

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Takahide Sugiyama             Aichi Prefecture Nagachite Town Aichi District             Ground 1 Toyota Central Research Institute Co., Ltd. (72) Inventor Masayasu Ishiko             Aichi Prefecture Nagachite Town Aichi District             Ground 1 Toyota Central Research Institute Co., Ltd. (72) Inventor Hiroyuki Ueda             Aichi Prefecture Nagachite Town Aichi District             Ground 1 Toyota Central Research Institute Co., Ltd. (72) Inventor Masanori Usui             Aichi Prefecture Nagachite Town Aichi District             Ground 1 Toyota Central Research Institute Co., Ltd. (72) Inventor Yukio Miyaji             Aichi Prefecture Nagachite Town Aichi District             Ground 1 Toyota Central Research Institute Co., Ltd. (72) Inventor Toyokazu Onishi             1 Toyota Town, Toyota City, Aichi Prefecture Toyota Auto             Car Co., Ltd. (72) Inventor Katsuhiko Nishiwaki             1 Toyota Town, Toyota City, Aichi Prefecture Toyota Auto             Car Co., Ltd.

Claims (19)

[Claims] 1. A bipolar semiconductor device in which a conductivity modulation phenomenon occurs in the drift layer to conduct the drift layer, and a layer having a conductivity type opposite to that of the drift layer and spreading in a plane is added to the drift layer. Bipolar semiconductor device. 2. The bipolar semiconductor device according to claim 1, wherein the opposite conductivity type layer has a thickness smaller than a diffusion length of carriers of the opposite conductivity type. 3. The bipolar semiconductor device according to claim 1, wherein the drift layer is stacked on a buffer layer. 4. The bipolar semiconductor device according to claim 3, wherein the opposite conductivity type layer is stacked on the buffer layer. 5. The bipolar semiconductor device according to claim 1, wherein the opposite conductivity type layer is formed at an intermediate height of the drift layer. 6. The bipolar semiconductor device according to claim 1, wherein a plurality of layers of the opposite conductivity type are added in the drift layer. 7. The trench gate is extended in the drift layer, and the opposite conductivity type layer is added at a position deeper than the deepest portion of the trench gate. The bipolar semiconductor device according to any one of claims. 8. The trench gate is extended in the drift layer, and the opposite conductivity type layer is added at a position shallower than the deepest part of the trench gate. The bipolar semiconductor device according to any one of claims. 9. The bipolar semiconductor device according to claim 1, wherein the anti-conductivity type layer has a uniform thickness and spreads in a plane. 10. The bipolar semiconductor device according to claim 1, wherein the thickness of the anti-conductivity type layer spreads in a plane while changing periodically. 11. The bipolar semiconductor device according to claim 1, wherein the impurity concentration in the anti-conductive layer is uniform in the thickness direction. 12. The impurity concentration in the anti-conductivity layer changes in the thickness direction.
8. The bipolar semiconductor device according to any one of 1. 13. The bipolar semiconductor device according to claim 1, wherein the impurity concentration in the drain layer including the anti-conductivity type layer changes in the thickness direction. 14. A drain electrode, a high concentration first conductivity type semiconductor substrate, a high concentration second conductivity type buffer layer, a first conductivity type drift layer, a second conductivity type drift layer, and a first conductivity type body layer are stacked in this order. A second conductive type emitter region is formed in the first conductive type body layer, and an insulating layer is sandwiched between the first conductive type body layer between the second conductive type drift layer and the second conductive type emitter region. An insulated gate bipolar transistor having facing gate electrodes. 15. The bipolar transistor according to claim 14, wherein the second-conductivity-type regions are distributed in stripes or islands in the high-concentration first-conductivity-type semiconductor substrate. 16. A drain electrode, a second-conductivity-type semiconductor substrate, a first-conductivity-type drift layer, a second-conductivity-type drift layer, and a first-conductivity-type body layer are stacked in this order, and a first conductivity-type body layer is provided with a first layer. A second conductivity type emitter region is formed, and a gate electrode facing the first conductivity type body layer between the second conductivity type drift layer and the second conductivity type emitter region with an insulating layer interposed therebetween is formed. A high-concentration first-conductivity type region that penetrates the body layer and reaches the second-conductivity-type drift layer, and a high-concentration first-conductivity type region is connected to an injection gate electrode. 17. A drain electrode, a second conductive type semiconductor substrate, a first conductive type drift layer, a second conductive type drift layer, and a first conductive type body layer are stacked in this order, and a first conductive type body layer is provided with A second-conductivity type emitter region is formed, and a high-concentration first-conductivity type region penetrating the first-conductivity-type body layer and reaching the second-conductivity-type drift layer is formed on both sides sandwiching the emitter region. BSIT in which the gate electrode is connected to the one conductivity type region. 18. A diode in which a first-conductivity-type layer and a second-conductivity-type layer are laminated, wherein a first-conductivity-type thin layer is inserted in the second-conductivity-type layer, and the thickness thereof is the first. A diode characterized by being thinner than a diffusion length of a conductive type carrier. 19. A first conductivity type substrate, a second conductivity type layer, and a second conductivity type substrate.
A thyristor in which a conductivity type drift layer, a first conductivity type layer, and a second conductivity type layer are stacked, and a first conductivity type thin layer is inserted in the second conductivity type drift layer, and the thickness thereof is 1
A thyristor characterized by being thinner than the diffusion length of a conductive type carrier.