JP2003059299A - Semiconductor memory and its test method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a small scale potential measuring method which can easily measure a potential of a word line. SOLUTION: A dummy cell of which a threshold value is made fixed is arranged on a digit line which can be selected by a Y decoder in the same way as a normal cell, a dummy cell having the same constitution as a normal cell and of which a threshold value is fixed is arranged for constitution of a memory cell group arranged at intersection parts of a plurality of word lines and bit lines, a digit line on which dummy cells are arranged in the same way as a normal cell is selected by the Y decoder, and data is outputted through a sense amplifier.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for testing a semiconductor memory device, and more particularly to measuring the potential of a word line of a semiconductor flash memory.

[0002]

2. Description of the Related Art A test circuit according to the present invention confirms that a measurement voltage is normally applied to each word line in each measurement mode, and confirms that there is no abnormality in the potential generation circuit of the word line. Configured to check.

Such a potential measuring circuit is generally confirmed by directly measuring the voltage from a potential generating circuit which generates the potential of the word line. However, in the circuit from the potential generating circuit to the word line. Since the potential of the selected word line does not rise due to imperfections such as a short circuit, and the potential of the potential generation circuit and the potential of the word line may actually differ, it is necessary to directly measure the potential applied to the word line. ing.

In order to meet this demand, for example, as disclosed in JP-A-8-17199, a potential comparison circuit using a comparator or the like is attached to each word line, and the comparison result is measured to obtain an expected potential. It has been proposed to make sure that is on the word line.

The technique disclosed in this prior art document is shown in FIG. 5, in which 501 represents a memory cell array and 5
02 is a memory cell, 503 is a bit line, 504 is a word line, 505 is a first potential supply source, 506 is a second potential supply source, 507 is an NchTr, and 516 is prepared corresponding to each bit line 3. The value of the bit line 503 corresponding to the analog input is input to the comparator, and the potential determination circuit 508 is formed by the comparator 516, and 517 calculates the logical product of all the outputs of these comparators 516. It is a NAND circuit that outputs to the external output terminal 510. With this configuration, it is possible to measure whether or not the normal level is applied to all word lines, but it is not possible to measure the potential of only the selected word line.

For this reason, it is not possible to find a failure in which a voltage abnormality occurs only when a specific word line is selected due to a short-circuit of the potential generation circuit, etc. Therefore, as in the case where there is no measurement circuit, writing or erasing of a normal cell is performed. Change the threshold,
It is necessary to read the data in each measurement mode for each writing and erasing to measure the potential. As a result, there is a drawback in that the test time is increased because a test time of a time obtained by multiplying the number of times of writing or erasing by the total test time of each mode is required. Furthermore, since the dedicated potential measuring circuit is added to the outside of the memory cell array, there is a problem that the circuit scale becomes large and the chip manufacturing cost is burdened.

Further, there is Japanese Patent Laid-Open No. 61-17796 as shown in FIG. 6 as an example of a prior application having a similar structure in which a dummy cell is used to measure a potential. In the figure, 601
a is a dummy cell that generates a first reference level, 601b is a dummy cell that generates a second reference level, and the dummy cells 601a and 601b have the same structure as the memory cell 601 and generate a desired reference level on the data line 602. To set. The row selection circuit 604 of this prior application simultaneously drives not only one specific word line, but also a word line 603 which brings a dummy cell into a selected state. The column selection circuit 605 is
Control is performed so as to connect a specific data line to which the memory cell in the selected state is connected to the signal input terminals S1 and S2 of the comparison circuit 606, and dummy cells 601a and 60
The two data lines 602 connected to 1b are controlled to be connected to the comparison circuit 606 and the reference input terminals R1 and R2, respectively. In this configuration, data is simultaneously read from the normal cell and the dummy cell corresponding to the normal cell, and the outputs of the dummy cell and the normal cell are compared.

[0008]

In the above-mentioned prior application example, in order to measure the voltage of the word line, which is to be realized by the present invention, the threshold value of the memory cell is changed in the same manner as in the conventional method. There is a need to do. Further, since data is read simultaneously with the normal cell, it is necessary to prepare a word line and a selection circuit for the dummy cell, which has a drawback that the circuit scale is also affected.

Therefore, a main object of the present invention is to provide a small-scale potential measuring method for the purpose of easily measuring the potential of each word line.

A cell having a constant threshold value is arranged on a digit line selectable by a Y decoder in a semiconductor flash memory in the same manner as a normal cell, and a plurality of word lines are provided.
For the memory cell group arranged at the intersections of the digit lines, dummy cells are arranged on the digit lines in the same structure as the normal cells, and the Y decoder selects the digit line in which the dummy cells are arranged in the same manner as the normal cells. However, a means for outputting data via a sense amplifier is provided, and this dummy cell group is turned on and off by being influenced only by the voltage of the word line unlike a normal cell because the threshold value is fixed. Data is output via the sense amplifier as well as the data cell. Therefore, it is necessary to confirm that the potential of each word line is above or below a certain value without preparing a voltage measurement circuit having a voltage comparison circuit. It is to confirm by data output.

[0011]

According to a semiconductor memory device and a method of measuring a semiconductor memory device of the present invention, a normal memory cell whose threshold value is changed by performing a write or erase operation and a dummy cell whose threshold value is fixed are sensed by the same sense. It is characterized in that a Y selector is configured so that it can be connected to an amplifier and the voltage of the word line is measured. Also, by adding a resistor to the source side of the dummy cell, the threshold value of the dummy cell is changed, and a data address determined for testing or a test mode signal is input from the address input to the Y decoder and the digit line in which the dummy cell is arranged is connected. Select with Y decoder,
By applying a voltage according to the read mode to one word line corresponding to the address, the dummy cell existing at the intersection of the selected word line and digit line has a fixed threshold voltage of the dummy cell. It is characterized in that it is turned on when the value exceeds, and current flows from the digit line to GND. In addition, a resistance circuit configured by using a selector so that the resistance value can be changed depending on the measurement mode is connected to the source side of the dummy cell, and the threshold value of the dummy cell is changed depending on the mode. Further, it is characterized in that one dummy cell is provided in each of the memory cell groups shared by a plurality of sense amplifiers for reading data, and a plurality of dummy cell groups can be selected simultaneously. Further, the semiconductor memory device measuring method of the present invention is characterized in that data is simultaneously read from a normal cell, a normal cell and a dummy cell corresponding thereto, and the outputs of the dummy cell and the normal cell are compared and read.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing the configuration of the first embodiment of the present invention. Referring to the drawings, there is shown a memory as one embodiment of the present invention. This semiconductor memory is
A plurality of word lines W1 to W4, digit lines D1 to D4 and memory cells MC arranged at their intersections, an X decoder XD for selecting a word line to be read from data, and a plurality of digit lines selected via a Y decoder YD. And a dummy cell DC having a fixed threshold value.

In a normal flash memory cell, the threshold value can be changed by performing a writing or erasing operation, and it is turned on or off by applying a potential according to the read mode to the word lines W1 to W4, and a digit is displayed. The output that changes the potentials of the lines D1 to D4 is processed by the sense amplifier SA, and the output that changes depending on the voltage of the word line and the threshold value of the memory cell according to each measured potential is processed as the output data Dout of the memory.

With respect to this processed data, the dummy cell DC sharing the sense amplifier with the normal cell provided according to the present invention and selected by the Y selector has a fixed threshold value, so the voltage of the word line exceeds a certain value. Only then, the ON / OFF state transition is performed.

The data thus obtained is the sense amplifier S
It is supplied to A and output as read data. The read data is compared with the expected value prepared in advance, and it is confirmed that the dummy cell DC is in the ON or OFF state according to the expected value. By the above operation, the potentials of the word lines W1 to W4 can be tested without adding a dedicated voltage measuring circuit.

Referring to FIG. 1, the dummy cell of FIG. 1 is constructed as follows. That is, the normal memory cell M that originally changes the threshold value by performing the write or erase operation.
The Y selector YD is constructed so that C and the dummy cell DC having a fixed threshold value can be connected to the same sense amplifier. By using the same sense amplifier SA for the normal memory cell MC and the dummy cell DC, the voltages of the word lines W1 to W4 can be measured without causing a large increase in the circuit scale.

In FIG. 1, a resistance R is provided on the source side of the dummy cell DC to change the threshold value of the dummy cell DC. Details of the sense amplifier and the X, Y decoder are well known to those skilled in the art, and since they are not directly related to the present invention, their detailed configurations are omitted.

The operation of this embodiment will be described below. First, the data address decided for testing,
Alternatively, the test mode signal is input from the address input ADin to the Y decoder YD so that the digit line D5 in which the dummy cells are arranged is selected by the Y decoder YD.
Then, similarly to reading the data of the normal cell, a voltage according to the read mode is applied to one word line corresponding to the address.

The dummy cell existing at the intersection of the selected word line and digit line is turned on when the potential of the word line exceeds the fixed threshold of the dummy cell, and a current flows from the digit line to GND. The state is detected by the sense amplifier connected to the digit line through the Y decoder, converted to "0" or "1", and output. FIG. 2 shows a comparison diagram of the threshold voltage of the memory cell and the potential of the word line. When the potential of the word line is higher than the threshold value of the memory cell, the memory cell is turned on. Here, since the threshold value of a normal memory cell can be changed by writing or erasing, the output data changes depending on two types of elements, the threshold value of the memory cell and the voltage of the word line. However, by using a dummy cell with a fixed threshold value, the only factor that causes the state transition from ON to OFF or from OFF to ON is the voltage of the word line. When a normal voltage is applied to each word line, all dummy cells on the selected digit line are turned on or turned on.
Since it is an FF, all data output via the sense amplifier is "0" or "1". By measuring that all the output data is “0” or “1” with a tester or the like, it can be confirmed that the voltage applied to each word line is a certain value or more.

On the contrary, select a digit line connected to a dummy cell whose threshold value has been raised more than the once selected dummy cell, and confirm that the potential applied to the word line is below the threshold value of those dummy cells. Then, it can be confirmed that the potential of the word line is within a certain range.

For example, the read mode is write confirmation,
When there are three types for data read and erase confirmation, as shown in FIG. 2, four types of dummy cells having thresholds between write confirmation and data read, data read and erase confirmation, and above write confirmation and below erase confirmation. DC1, DC2, DC
3, DC4 is prepared. After that, when data is read in each mode, the state of each dummy cell is determined as shown in Table 1. Here, the data output when the potential of the word line is higher than the threshold value of the dummy cell and the dummy cell is in the ON state is 0, and in the opposite case is 1, the dummy cells DC1, DC2, D
The outputs of C3 and DC4 are the bits "3", "2",
When set to "1" and "0", the read data is "0111", "0011", "0001" depending on the mode. When the same data is read from all the word lines, it can be confirmed that the voltage applied to the word lines in the three read modes is normally applied to all the word lines depending on the mode.

As another embodiment of the present invention, the basic structure is as described above, but the structure of the dummy cell is further devised. The structure is shown in FIG. In this figure, the source side of the dummy cell has a configuration capable of changing the resistance value depending on the measurement mode. Therefore, the selector SEL can change the resistance value depending on the measurement mode.
Is connected to the source side of the dummy cell so that the threshold value of the dummy cell can be changed depending on the mode.

As described above, the present embodiment has the further advantage that it is possible to measure a plurality of voltage levels with a set of dummy cells.

In each of the above-mentioned embodiments, the effect of being able to measure a plurality of voltages of the word line in each mode is such that the resistance value of the resistor added to the source of the dummy cell is variable, but a plurality of dummy cell groups are used. Is prepared and read simultaneously, a third embodiment is shown in FIG. In the present embodiment, the dummy cell groups DC1 to DC4 are provided one by one in the memory cell groups MC1 to MC4 to which the plurality of sense amplifiers SA1 to SA4 for reading data are provided, and a plurality of dummy cell groups having the maximum read data width are simultaneously provided. The configuration is selectable.

Therefore, it is possible to finely set the threshold value of the dummy cell by selecting these plural dummy cell groups and reading the data, and to obtain a more detailed value of the potential of the word line by one read operation. be able to.

Moreover, in the present embodiment, since the potential can be measured in a plurality of steps, it is possible to easily find the defect that the potential is reversed depending on the mode by one reading. .

[0027]

As described above, according to the present invention, it is possible to judge from the data output that the normal voltage is applied to each word line by using the dummy cell. If this circuit is not present and the potential of the word line is to be measured using the data output as in the present invention, the threshold value of the normal cell is gradually changed by multi-step erasing, etc. It is necessary to read data in each measurement mode.

Assume that it takes 1 second to erase once, and 1 second to read data for one measurement mode. When the level measurement is performed by the above method in a memory cell having four kinds of measurement modes, the erase operation is performed. The number of times x 5 seconds of test time is required. If the number of erases from the written state to the erased state is 10, the test time of 50 seconds is required. However, in the case of the present invention, the dummy cell is used to fix the threshold value of the cell. It is not necessary to change the cell threshold value, and the measurement can be performed only by reading the data in each measurement mode.

Therefore, it is possible to save a test time of (erasure count × measurement mode count × readout time). With the conditions described in the conventional method, a test time of 50 seconds can be saved.

Furthermore, in the third embodiment, since the dummy cells can be connected to a plurality of sense amplifiers at the same time, dummy cells having different thresholds are read out at the same time.
It is also possible to measure the voltage level for the maximum data read width with one data read.

Moreover, since the reference voltage is not required and the potential can be measured by a method that is completely unrelated to the potential generation circuit, the voltage level of the word line including the reference voltage is abnormal in each measurement mode. There is also an effect that it can be confirmed that it is not.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a first exemplary embodiment of the present invention.

FIG. 2 is a diagram showing an internal potential according to the first embodiment of the present invention.

FIG. 3 is a circuit diagram showing a configuration of a second exemplary embodiment of the present invention.

FIG. 4 is a circuit diagram showing a configuration of a third exemplary embodiment of the present invention.

FIG. 5 is a circuit diagram in a first conventional example.

FIG. 6 is a circuit diagram in a second conventional example.

[Explanation of symbols]

D1 to D4 digit lines DC, DC1-DC4 dummy cells SA, SA1-SA4 sense amplifier MC1 to MC4 memory cell group SEL selector R resistance RC resistance circuit W1-W4 word lines YD Y decoder XD X decoder 501 memory cell array 502 memory cell 503 bit line 504 word line 505 First potential supply source 506 Second potential supply source 507 NchTr 516 Comparator 508 potential determination circuit 517 NAND circuit 510 External output terminal 601a Dummy cell for generating first reference level 601b Dummy cell for generating second reference level 602 data line 603 word line 604 row selection circuit 605 column selection circuit 606 Comparison circuit S1 and S2 signal input terminals R1 and R2 reference input terminals D1, D2 identification output terminal

Claims (6)

[Claims] 1. A Y selector is configured so that a normal memory cell whose threshold value is changed by performing a write or erase operation and a dummy cell whose threshold value is fixed can be connected to the same sense amplifier, and the voltage of a word line is measured. A semiconductor memory device characterized by the above. 2. A dummy cell is arranged by changing the threshold value of the dummy cell by providing a resistance on the source side of the dummy cell and inputting a data address or test mode signal determined for testing from the address input to the Y decoder. The selected digit line is selected by the Y decoder, and a voltage according to the read mode is applied to one of the word lines corresponding to the address so that the selected digit line exists at the intersection of the selected word line and the digit line. The dummy cell
When the potential of the word line exceeds the fixed threshold value of the dummy cell, it is turned on, and the digit line to GN
A semiconductor memory device characterized in that a current flows to D. 3. A semiconductor memory device characterized in that a resistance circuit configured by using a selector so that a resistance value can be changed depending on a measurement mode is connected to a source side of the dummy cell, and a threshold value of the dummy cell is changed according to a mode. . 4. A dummy cell is provided for each of the memory cell groups shared by a plurality of sense amplifiers for reading data.
A semiconductor memory device characterized in that a plurality of dummy cell groups can be selected simultaneously. 5. A method of measuring a semiconductor memory device, comprising: simultaneously reading data from a normal cell, a normal cell, and the dummy cell corresponding thereto, and comparing and reading outputs of the dummy cell and the normal cell. 6. A data address determined for testing, or the test mode signal is input from an address input to the Y decoder, and the digit line in which the dummy cell is arranged is selected by the Y decoder. A voltage according to the read mode is applied to the corresponding one of the word lines, and the dummy cell existing at the intersection of the selected word line and the digit line is fixed to the dummy cell with the potential of the word line. If it exceeds the threshold value, it is turned on, a current is passed from the digit line to GND, and the state is detected by a sense amplifier connected to the digit line via the Y decoder, and "0" or " When the potential of the word line is higher than the threshold value of the memory cell and is output as data, the memory cell is turned on. When a normal voltage is applied to each word line, all the dummy cells on the selected digit line are turned on or off,
The data output via the sense amplifier is all "0" or "1". Each word is measured by measuring with a tester that the output data is all "0" or "1". A method for measuring a semiconductor memory device, which comprises confirming that a voltage applied to a line is a certain value or more.