JP2003046058A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device having noise prevented from being applied to a control terminal. SOLUTION: Cylindrical control terminals T1 and T2, which are stretched vertically to a common pattern 7 are arranged on the common pattern 7. A gate and a current sensing electrode of an IGBT element 1 are connected with terminal tables 211 and 231 which are arranged on base parts of the control terminals T1 and T2, respectively via metal wires WR. The control terminals T1 and T2 have structures, where a columnar or prism-shaped gate electrode 21 and a current sense terminal 23 are made central conductors, the peripheries are enclosed with insulation members IZ1, and the outer peripheries of the insulation members IZ1 are enclosed with control emitter terminals 22, respectively. The gate electrode 21 and the current sensing terminal 23 are protruded from end surfaces of the insulation members IZ1 and the control emitter terminals 22 which are arranged peripherally, and electrically connected with a control substrate 30, which is arranged above a relay terminal substrate 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device,
In particular, it relates to a modularized power semiconductor device.

[0002]

2. Description of the Related Art Conventionally, transistor elements and IGBTs
2. Description of the Related Art A configuration in which power semiconductor elements such as (Insulated Gate Bipolar Transistor) elements and diode elements are packaged into a module (hereinafter referred to as a semiconductor device module) is known.

Here, as an example of a semiconductor device module, FIG. 8 shows a configuration having an IGBT element 1 and a diode element 2.

As shown in FIG. 8, the diode element 2 functions as an IGB so that it functions as a freewheel diode.
The T element 1 is connected in parallel in a direction in which a forward current flows back.

The collector of the IGBT element 1 is connected to the main collector terminal plate 12, and the emitter thereof is the main emitter terminal plate 11.
And the control emitter terminal 22 as well.

The control emitter terminal 22 is used for driving the IGBT element 1, and a gate-emitter voltage (for example, 15 V) is applied between the control emitter terminal 22 and the gate terminal 21.
The IGBT element 1 can be driven by applying (about V).

Further, the IGBT element 1 is provided with a current sense electrode, and the current sense electrode is connected to the current sense terminal 23. A current sense electrode is a current (sense current) that is several thousandth of the current that flows in the main emitter electrode
Is an electrode formed so as to flow, and by detecting the sense current, the IGBT element 1 is feedback-controlled to enable overcurrent protection and short-circuit protection.

A gate terminal 21, a control emitter terminal 22,
The control terminals such as the current sense terminal 23 may be configured to be led to the outside of the semiconductor device module so as to receive a control signal from the outside and output the detected sense current to the outside. , IPM (Intell) with built-in control circuits such as drive circuits and protection circuits for power semiconductor devices.
igent Power Module) has been developed, and there are many configurations in which control terminals are connected to the control circuit board built into the package.

[0009]

In order to prevent the dielectric breakdown due to the voltage between the terminals, the control terminal has a distance between the terminals, regardless of whether the semiconductor device module has the control terminals led to the outside or the IPM. Is provided. The plurality of control terminals are arranged adjacent to each other in view of miniaturization of the module and connection with the semiconductor element.

Therefore, the gate terminal 21 and the control emitter terminal 22, and the control emitter terminal 22 and the current sense terminal 23.
Has a relation like a transmitting antenna and a receiving antenna. For example, when noise is output to the emitter due to the switching operation of the IGBT element 1, the control emitter terminal 2
2 noise is gate terminal 21 or current sense terminal 2
3 and each signal can be noisy.

An example thereof is shown in FIG. FIG. 9 (a) shows a normal waveform of the gate-emitter voltage, and FIG. 9 (b) shows
The case where noise is included in the waveform of the gate-emitter voltage is shown.

It should be noted that such noise not only occurs due to the switching operation of the IGBT element 1, but also
It may be given from the outside.

The present invention has been made to solve the above problems, and an object thereof is to provide a semiconductor device in which noise is prevented from being applied to a control terminal.

[0014]

According to a first aspect of the present invention, there is provided a semiconductor device, wherein a power semiconductor element housed in a bottom surface of a package is electrically connected to the power semiconductor element. A control terminal used for relaying a control signal for controlling the semiconductor device for use, the control terminal being arranged so as to extend in the vertical direction with respect to the bottom surface portion, and the control signal flows. A center conductor, an insulator arranged so as to surround the center conductor, and an outer peripheral conductor arranged so as to surround the insulator, the outer conductor being used for driving the power semiconductor element. , A potential corresponding to a reference potential is applied, and the first end portion of the central conductor on the bottom surface side protrudes from the side surface of the outer peripheral conductor while maintaining insulation with the outer peripheral conductor, End for electrical connection Without the platform, a second end opposite to the bottom surface portion of the center conductor protrudes from the end face of the insulator and the outer circumferential conductor, and forms a transfer portion of said control signal.

A semiconductor device according to a second aspect of the present invention has a plurality of the control terminals, and each of the plurality of control terminals includes a single central conductor, the insulator and the outer peripheral conductor. ing.

In a semiconductor device according to a third aspect of the present invention, the central conductors are plural, and the insulators are plurally arranged so as to individually surround the plural central conductors.
The outer peripheral conductor is arranged so as to commonly surround the plurality of insulators.

According to a fourth aspect of the present invention, in the semiconductor device according to the fourth aspect, the control terminal is arranged on a conductor pattern arranged in parallel with the bottom surface portion of the package, and the end face of the outer peripheral conductor is the conductor. Connected directly to the pattern.

According to a fifth aspect of the present invention, there is provided a semiconductor device according to claim 5, which is electrically connected to the power semiconductor element housed in the bottom surface of the package and is electrically connected to the power semiconductor element. A plurality of control terminals used for relaying a control signal for, the plurality of control terminals,
It has a flat plate-shaped main body arranged vertically to the bottom surface,
The main parts of the main body are arranged in parallel with a gap so that the main surfaces of the main parts face each other, and a potential corresponding to a reference potential is applied to the plurality of control terminals when the power semiconductor element is driven. Control terminals are included, each of the plurality of control terminals having first and second protrusions extending from two parallel sides of the body portion, and each of the plurality of control terminals. The first protrusion is a terminal block that is bent so that its main surface is parallel to the bottom face on the side of the bottom face, and the second protrusion of each of the plurality of control terminals is It forms a part for transmitting and receiving the control signal.

In the semiconductor device according to claim 6 of the present invention, an insulator is arranged in the gap between the main surfaces of the main body of the plurality of control terminals.

According to a seventh aspect of the present invention, in the semiconductor device, the semiconductor device further comprises a control board in which a control circuit for controlling the drive of the power semiconductor element is installed, and the transfer unit. Are directly connected to the control board.

A semiconductor device according to an eighth aspect of the present invention further comprises a control board provided outside the package, the control board having a control circuit for controlling the drive of the power semiconductor element. The transfer unit projects from the package and is directly connected to the control board.

[0022]

BEST MODE FOR CARRYING OUT THE INVENTION <A. Embodiment 1><A-1. Device Configuration> FIG. 1 shows a configuration of a semiconductor device module 100 as a first embodiment of a semiconductor device according to the present invention.

FIG. 1 is a perspective view showing the internal structure of the semiconductor device module 100, in which the resin package 10 is partially omitted to show the internal structure.

As shown in FIG. 1, an insulating substrate 3 having an insulating property and a relay terminal substrate 6 are arranged at a bottom portion of a resin package 10 with a space therebetween, and an emitter pattern 4 and a collector pattern are provided on the insulating substrate 3. 5 are electrically separated from each other, and the common pattern 7 is formed on the relay terminal board 6.
Is provided. The relay terminal board 6 may be any board as long as it has an insulating property.

On the collector pattern 5, IGB
One T element 1 and one diode element 2 are provided,
The IGBT element 1 and the emitter pattern 4 and the diode element 2 and the emitter pattern 4 are electrically connected by a plurality of metal wires WR.

On the common pattern 7, cylindrical control terminals T1 and T2 extending perpendicularly to the common pattern 7 are provided.
The gate and the current sense electrode of the IGBT element 1 are connected to the terminal blocks 211 and 231 provided at the bases of the control terminals T1 and T2, respectively, via the metal wire WR. The emitter of the IGBT element 1 is connected to the common pattern 7 via the metal wire WR.

The control terminals T1 and T2 have a columnar or prismatic gate terminal 21 and a current sense terminal 23, respectively, as a central conductor and are surrounded by an insulator IZ1 and the outer periphery of the insulator IZ1 is controlled by the control emitter terminal 2 respectively.
It has a structure surrounded by 2. Since the control emitter terminal 22 is arranged so as to surround the outer periphery of the insulator IZ1, it can be called an outer conductor.

In the control terminals T1 and T2, the insulator IZ1 and the control emitter terminal 2 which are provided around the control terminals T1 and T2 are provided.
The gate terminal 21 and the current sense terminal 2 than the end surface of 2
3, the gate terminal 21 and the current sense terminal 23 are electrically connected to the control board 30 disposed above the relay terminal board 6.

A control circuit such as a drive circuit and a protection circuit for the IGBT element 1 is arranged on the control board 30, and the semiconductor device module 100 becomes an IPM by incorporating the control board 30. By incorporating the control board 30, the signal path from the power semiconductor element is shortened, and the possibility that noise is applied to the control signal can be reduced.

A main emitter terminal plate 11 and a main collector terminal plate 12 are connected to the emitter pattern 4 and the collector pattern 5. Main emitter terminal board 11
The main collector terminal plate 12 has an elongated shape, and is bent so that the main surface at one end in the longitudinal direction is connected to the emitter pattern 4 and the collector pattern 5, and the main surface at the other end is the upper surface of the resin package 10. It is arranged so as to be exposed at.

Here, FIG. 2 shows a sectional structure of the control terminal T2 taken along the line AA. 3 is a perspective view showing the structure of the base of the control terminal T2.

As shown in FIG. 2, the cross section of the current sense terminal 23 is L-shaped, and the long side of the L-shape is surrounded by the insulator IZ1 and the control emitter terminal 22 as a central conductor, and the L-shaped section is formed. The portion corresponding to the short side of the shape is exposed as the terminal block 231.

Since the control emitter terminal 22 is connected to the common pattern 7 on the main surface of the relay terminal board 6 at its bottom surface by soldering or the like, the contact resistance with the common pattern 7 can be lowered. , Control emitter terminal 2
Since 2 is connected to the conductor pattern 302 provided on the lower main surface of the control board 30 by soldering or the like on its upper surface portion, the contact resistance with the conductor pattern 302 can be reduced.

The current sense terminal 23 receives a detection signal of a sense current flowing through the sense electrode of the IGBT element 1 on the control board 3.
Since it relays to 0, the electric signal flowing there is IGBT
Although the element 1 is not directly controlled, since the IGBT element 1 is feedback-controlled based on the sense current, the electric signal flowing through the current sense terminal 23 is called a control signal.

As shown in FIGS. 2 and 3, the lower portion of the terminal block 231 is covered with an insulator IZ1 and electrically insulated from the common pattern 7.

On the other hand, the tip of the long side of the current sense terminal 23 penetrates the control board 30 and projects from the upper main surface of the control board 30, and the conductor pattern 3 provided on the upper main surface of the control board 30.
It is connected to 01 by soldering or the like. Conductor pattern 30
1 and 302 are connected to a predetermined portion of a control circuit provided on the control board 30 and control the operation of the IGBT element 1 and the diode element 2 by exchanging an electric signal (control signal). Since the structure and operation of the above are not closely related to the present invention, description thereof is omitted.

With this structure, the common pattern 7 on the main surface of the relay terminal board 6 is provided on the lower main surface of the control board 30 via the control emitter terminal 22.
02, and the current sense terminal 23 is electrically connected to the conductor pattern 301 provided on the upper main surface of the control substrate 30. The configuration of the control terminal T1 is the same as that of the control terminal T2.

<A-2. Effect> As described above, in the semiconductor device module 100 according to the present invention, the gate terminal 21 and the current sense terminal 23 are used as the central conductors, and the periphery thereof is surrounded by the insulator IZ1.
Control terminals T1 and T having a structure in which the outer periphery of 1 is surrounded by a control emitter terminal 22 to which a potential corresponding to the reference potential is applied.
2 has a gate terminal 21, a control emitter terminal 22, and a control emitter terminal 2 when relaying the control signal.
2 and the current sense terminal 23 are prevented from forming a relationship such as a transmitting antenna and a receiving antenna, and noise generated due to the switching operation of the IGBT element 1 flows to the gate terminal 21 and the current sense terminal 23. Control signal) can be prevented from being applied.

Further, the gate terminal 21 and the current sense terminal 23 can be electrically shielded, and noise from the outside can be prevented from being applied to the electric signal flowing through the gate terminal 21 and the current sense terminal 23.

Further, since the control terminals T1 and T2 are independent, the control terminals can be arranged freely.

<B. Second Embodiment><B-1. Device Configuration> As a second embodiment of the semiconductor device according to the present invention, a configuration of a semiconductor device module 200 is shown in FIG.

FIG. 4 is a perspective view showing the internal structure of the semiconductor device module 200. Since the structure other than the control terminal T3 is the same as that of the semiconductor device module 100 described with reference to FIG. 1, illustration and description thereof are omitted. To do.

In FIG. 4, on the common pattern 7 on the main surface of the relay terminal substrate 6, a control terminal T3 extending vertically to the common pattern 7 is arranged. And the IGBT element 1
The gate and the current sense electrode of are connected to terminal blocks 211 and 231 provided at the base of the control terminal T3, respectively, via the metal wire WR. Also, IGB
The emitter of the T element 1 is connected to the common pattern 7 via the metal wire WR.

The control terminal T3 is a gate terminal 21 arranged on the common pattern 7 so as to extend vertically with a gap.
And the current sense terminal 23 as a central conductor, each of which is surrounded by an insulator IZ1, and the outer periphery of the two insulators IZ1 is commonly surrounded by a control emitter terminal 22. The control emitter terminal 22 has two insulators IZ.
Since it is arranged so as to surround the outer periphery of 1, it can be called an outer conductor.

The structures of the gate terminal 21 and the current sense terminal 23 are similar to those of the control terminal T2 described with reference to FIG.

The insulators IZ1 provided around the gate terminal 21 and the current sense terminal 23, and
The gate terminal 21 and the current sense terminal 23 are projected from the end surface of the control emitter terminal 22 that commonly surrounds the two insulators IZ1, and the gate terminal 21 and the current sense terminal 23 are arranged above the relay terminal board 6. The control board 30 is electrically connected.

<B-2. Effect> As described above, in the semiconductor device module 200 according to the present invention, the gate terminal 21 and the current sense terminal 23 are used as the central conductors, and the periphery thereof is surrounded by the insulator IZ1.
Since there is a control terminal T3 having a structure in which two insulators IZ1 are commonly surrounded by a control emitter terminal 22 to which a potential corresponding to a reference potential is applied, the cross-sectional area of the control emitter terminal 22 can be widened and the relay of the control signal can be performed. At this time, it is possible to improve the electric shield performance for the gate terminal 21 and the current sense terminal 23, and to apply noise from the outside to the electric signal (control signal) flowing through the gate terminal 21 and the current sense terminal 23. It can be prevented more effectively.

<C. Third Embodiment><C-1. Device Configuration> As a third embodiment of the semiconductor device according to the present invention, FIG. 5 shows a configuration of a semiconductor device module 300.

In the semiconductor device modules 100 and 200 described with reference to FIGS. 1 and 4 as the first and second embodiments, the cylindrical or prismatic gate terminal 21 and the current sense terminal 23 are used as the central conductors. Although the semiconductor device module 300 shown in FIG. 5 has a control terminal having a structure in which the insulator IZ1 surrounds the periphery, the control terminals such as the flat gate terminal 210, the control emitter terminal 220, and the current sense terminal 230 are provided. Are arranged so that their main surfaces face each other.

That is, the gate terminal 21 which is a control terminal
0, control emitter terminal 220 and current sense terminal 23
0 is a main body portion BD21, BD22 having a rectangular shape in plan view.
And BD23, projecting pieces 212, 222 and 232 extending from one long side of each, and projecting pieces 211, 221, and 231 extending from the other long side, respectively, and projecting pieces 211, 221 and 231. Is bent so that the main surface thereof is connected to the main surface of the relay terminal board 6 to form terminal blocks 211, 221, and 231, respectively.

Then, the control emitter terminal 220 to which a potential corresponding to the reference potential is applied is arranged at the center, and the gate terminal 210 and the current sense terminal 230 are arranged so that their main surfaces face both main surfaces of the control emitter terminal 220. Is provided.

Note that the terminal blocks 211, 221, and 231 are
Need to be electrically isolated from each other, so
Reference numerals 11, 221, and 231 denote body portions BD21, BD2.
2 and BD23 extend from different positions on one long side of each and are bent so as not to contact each other.

On the relay terminal board 6, the terminal block 21
No conductor pattern is provided to connect 1, 221, and 231 in common, and the terminal blocks 211, 221 are not provided.
And 231 by soldering or the like to the relay terminal board 6
Although partial conductor patterns for connection are provided on the upper side, it is sufficient that they have the same area as the terminal blocks 211, 221, and 231.
It is hidden by the placement of 21 and 231 and is not shown in the figure.

Then, the projecting pieces 212, 222 and 232
Are electrically connected to the control board 30 disposed above the relay terminal board 6.

The mold resin is filled between the main body portions BD21, BD22 and BD23 of the gate terminal 210, the control emitter terminal 220 and the current sense terminal 230 when the resin package 10 is molded. Although a structure having a gap may be provided at the stage of assembly, an insulating material may be sandwiched for reliable insulation.

The gate terminal 210, the control emitter terminal 220 and the current sense terminal 230 are shown in FIG.
The figure seen from the direction is shown. As shown in FIG. 5, the main body BD
21 between the main surfaces of BD22 and the main body BD22 and B
With the configuration in which the insulator IZ2 is sandwiched between the main surface with D23, the distance between the main surfaces can be made constant, and reliable insulation can be achieved.

The insulator IZ2 may be formed by applying a gel-like insulating material and curing it, or by sandwiching an insulating sheet.

Since the other structure is the same as that of the semiconductor device module 100 described with reference to FIG. 1, its illustration and description are omitted.

<C-2. Operation and Effect> As described above, in the semiconductor device module 300 according to the present invention, the control emitter terminal 220 to which a potential corresponding to the reference potential is applied is arranged in the center, and the control emitter terminal 220 is provided on both main surfaces thereof. Gate terminal 2 so that the main surfaces face each other
Since 10 and the current sense terminal 230 are provided, the gate terminal 210 and the control emitter terminal 220, and the control emitter terminal 220 and the current sense terminal 230 have a relationship like a transmitting antenna and a receiving antenna when relaying a control signal. And the noise generated due to the switching operation of the IGBT element 1 is prevented.
Also, it can be prevented from being applied to the electric signal (control signal) flowing through the current sense terminal 230. Further, by narrowing the main surface spacing of each terminal to the extent that dielectric breakdown does not occur, it is possible to prevent external noise from being applied to the electric signal (control signal) flowing to the gate terminal 210 and the current sense terminal 230.

In the above description, the case where there are three control terminals has been mentioned, but even when the number of control terminals exceeds three, a plurality of control emitter terminals 220 are provided and they are opposed to both main surfaces thereof. By disposing the remaining control terminals as described above, it is possible to prevent the control emitter terminal 220 and the other control terminals from having a relationship such as a transmitting antenna and a receiving antenna.

<D. Modified example> Embodiment 1 described above
In the semiconductor device modules 100 to 300 of 3 to 3, the IPM including the control board 30 is described.
The control board 30 may be arranged outside.

In this case, the control board 30 is arranged on the upper surface of the resin package 10, and the gate terminals 21 and the current sense terminals 23 of the control terminals T1 and T2 shown in FIG. 4 and the gate terminal 21 and the current sense terminal 23 of the control terminal T3 shown in FIG.
Of the gate terminal 210, the control emitter terminal 220 and the current sense terminal 230 shown in FIG. 5 are connected so as to project from the upper surface of the resin package 10. . With such a configuration, the semiconductor device module can be downsized.

Further, in the semiconductor device modules 100 to 300 of the first to third embodiments, as shown in FIG. 8, it has been explained that the semiconductor device modules 100 to 300 are provided with one set of power semiconductor elements of the IGBT element 1 and the diode element 2. However, the set of the IGBT element 1 and the diode element 2 is not limited to one set, and a plurality of sets may be connected in parallel or may be connected in series.

For example, as shown in FIG. 7, IGBT elements 1A and 1B are connected in series, and IGBT elements 1A and 1B have diode elements 1A and 1B, respectively.
Are connected in anti-parallel.

The collector of the IGBT element 1A is connected to the main collector terminal plate 121, and the emitter of the IGBT element 1A and the collector of the IGBT element 1B are commonly connected to the output terminal plate 122. This output terminal board 122
Is connected to an inductive load such as a motor provided outside. The emitter of the IGBT element 1B is connected to the main emitter terminal plate 123.

Further, the emitters of the IGBT elements 1A and 1B have control emitter terminals 22A and 22B, respectively.
The current sense electrodes of the IGBT elements 1A and 1B are connected to the current sense terminals 23A and 23B, respectively, and the gates of the IGBT elements 1A and 1B are connected to the gate terminals 21A and 21B, respectively.

In such a structure, the gate terminal 21
A, control emitter terminal 22A and current sense terminal 23
A set of three control terminals A, gate terminal 21B,
Since the control emitter terminal 22B and the current sense terminal 23B form a set of three control terminals, the control terminal configuration shown in the semiconductor device modules 100 to 300 of the first to third embodiments is set in each set of control terminals. It should be collected.

[0068]

According to the semiconductor device of the first aspect of the present invention, the periphery of the central conductor through which the control signal flows is surrounded by an insulator, and the outer periphery of the insulator is provided with a potential corresponding to the reference potential. Since it has a control terminal surrounded by a conductor,
It is possible to prevent the central conductor from functioning as an antenna, and prevent the noise generated due to the switching operation of the power semiconductor element from being applied to the control signal when relaying the control signal. Also, the center conductor can be electrically shielded,
It is possible to prevent external noise from being applied to the control signal.

According to the semiconductor device of the second aspect of the present invention, since the outer peripheral conductor is provided for each of the plurality of control terminals, the independence of each control terminal can be maintained and the control terminal It can be arranged freely.

According to the semiconductor device of the third aspect of the present invention, the outer periphery of each of the plurality of central conductors is surrounded by an insulator, and the outer periphery of the plurality of insulators is given a potential corresponding to the reference potential. Since it has a control terminal that is commonly surrounded by, the cross-sectional area of the outer conductor can be widened, and when relaying the control signal, the electrical shield performance for multiple central conductors can be improved, and multiple external noises can be generated. It can be more effectively prevented from being applied to the control signal flowing through the central conductor of.

According to the semiconductor device of the fourth aspect of the present invention, since the end face of the outer peripheral conductor is directly connected to the conductor pattern, the contact area between the outer peripheral conductor and the conductor pattern can be widened and the contact resistance can be reduced. it can.

According to a fifth aspect of the semiconductor device of the present invention, the plurality of control terminals are arranged in parallel with each other with a gap so that the main surfaces of the flat plate-shaped main body face each other. Since the control terminals to which a potential corresponding to the reference potential is applied at the time of driving the power semiconductor element are included, for example, in the case of three control terminals, the potential corresponding to the reference potential is included. A control terminal to which a potential corresponding to the reference potential is applied by arranging the control terminal to which the
The control terminal arranged so as to face the main surface can prevent it from becoming an antenna, and when relaying the control signal, noise generated due to the switching operation of the power semiconductor element is applied to the control signal. Can be prevented. Further, by making the main surface interval of each terminal narrow enough to prevent dielectric breakdown, it is possible to prevent external noise from being applied to the control signal.

According to the semiconductor device of the sixth aspect of the present invention, since the insulator is provided in the gap between the main surfaces of the main body of the plurality of control terminals, the main surface intervals can be made constant. Also, reliable insulation is possible.

According to the semiconductor device of the seventh aspect of the present invention, the control board in which the control circuit for controlling the drive of the power semiconductor element is provided is built in, and the control signal transfer unit is directly connected to the control board. Since the signal path from the power semiconductor element to the control board is shortened, it is possible to reduce the possibility that noise is applied to the control signal.

According to the semiconductor device of the eighth aspect of the present invention, since the control board having the control circuit for controlling the drive of the power semiconductor element is provided outside the resin package, the semiconductor device module is provided. Can be miniaturized.

[Brief description of drawings]

FIG. 1 is a perspective view showing an internal configuration of a semiconductor device module according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing a configuration of a control terminal of the semiconductor device module according to the first embodiment of the present invention.

FIG. 3 is a perspective view showing a configuration of a control terminal of the semiconductor device module according to the first embodiment of the present invention.

FIG. 4 is a perspective view showing an internal configuration of a semiconductor device module according to a second embodiment of the present invention.

FIG. 5 is a perspective view showing an internal configuration of a semiconductor device module according to a third embodiment of the present invention.

FIG. 6 is a side view showing a configuration of control terminals of a semiconductor device module according to a third embodiment of the present invention.

FIG. 7 is a diagram showing an example of a combination of power semiconductor elements.

FIG. 8 is a diagram showing a connection relationship between a power semiconductor element and a control terminal.

FIG. 9 is a diagram showing a problem of a conventional semiconductor device module.

[Explanation of symbols]

21,210 Gate terminal, 22,220 Control emitter terminal, 23,230 Current sense terminal, 211,231
Terminal block, T1, T2, T3 control terminals, IZ1, IZ
2 insulator.

Claims (8)

[Claims] 1. A power semiconductor element housed in a bottom surface of a package, and a control electrically connected to the power semiconductor element and used for relaying a control signal for controlling the power semiconductor element. A terminal, the control terminal is disposed so as to extend in a direction perpendicular to the bottom surface portion, a central conductor through which the control signal flows, and an insulation disposed so as to surround the central conductor. A body and an outer peripheral conductor arranged so as to surround the insulator, wherein the outer peripheral conductor is given a potential corresponding to a reference potential when the power semiconductor element is driven, The first end portion on the bottom surface side forms a terminal block for electrically connecting to the power semiconductor element by protruding from the side surface of the outer peripheral conductor while maintaining insulation with the outer peripheral conductor, Opposite side of the bottom Second end,
A semiconductor device, which projects from the end faces of the insulator and the outer peripheral conductor and serves as a part for transmitting and receiving the control signal. 2. The control terminals are plural, and each of the plural control terminals comprises a single central conductor, the insulator, and the outer peripheral conductor.
The semiconductor device described. 3. A plurality of the center conductors, a plurality of the insulators are arranged so as to individually surround the plurality of center conductors, and the outer peripheral conductors commonly surround the plurality of insulators. The semiconductor device according to claim 1, wherein the semiconductor device is arranged as follows. 4. The control terminal is arranged on a conductor pattern arranged in parallel to the bottom surface portion of the package, and an end surface of the outer peripheral conductor is directly connected to the conductor pattern. The semiconductor device described. 5. A power semiconductor element housed in a bottom surface of a package, and a plurality of elements electrically connected to the power semiconductor element and used for relaying a control signal for controlling the power semiconductor element. And a control terminal, wherein the plurality of control terminals has a flat plate-shaped main body portion that is arranged perpendicular to the bottom surface portion, and a gap is formed so that main surfaces of the main body portion face each other. Arranged in parallel, among the plurality of control terminals, when driving the power semiconductor element, includes a control terminal to which a potential corresponding to a reference potential is applied, each of the plurality of control terminals, It has a 1st and 2nd projecting piece extended from the mutually parallel 2 sides of a main-body part, The said 1st projecting piece of each of these control terminals WHEREIN: The main surface is the said bottom surface side. Bend it so that it is parallel to the bottom. No terminal blocks Te, each of said second projecting piece of the plurality of control terminals forms a transfer portion of the control signal, the semiconductor device. 6. The semiconductor device according to claim 5, wherein an insulator is provided in the gap between the main surfaces of the main body of the plurality of control terminals. 7. The semiconductor device further includes a control board in which a control circuit for controlling driving of the power semiconductor element is provided, and the transfer unit is directly connected to the control board. The semiconductor device according to claim 1 or claim 5. 8. The semiconductor device further comprises a control board on the outside of the package, the control board having a control circuit for controlling the drive of the power semiconductor element, wherein the transfer unit projects from the package. The semiconductor device according to claim 1 or 5, which is directly connected to the control substrate.