JP2003043995A - Active matrix type oled display device and its driving circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an OLED(organic light emitting diode) driving pixel circuit having satisfactory display performance. SOLUTION: In this pixel circuit, four transistors are constituted in a pixel and after first and second scanning lines GL1, GL2 which are connected respectively to the gate electrode of a second transistor MSH and that of a third transistor MWR are made active and the gate electrode and the drain electrode of a first transistor MDR are made to be in conduction state via the second transistor MSH and a current having a value corresponding to a video signal is made to flow from a power source to a signal line through the first and third transistors MDR, MWR and the first scanning line GL1 is made inactive, the second scanning line GL2 is made inactive and thereafter a third scanning line GL3 which is connected to the gate electrode of a fourth transistor MCH is made active and a current having a value corresponding to the video signal is made to flow through an OLED through the fourth transistor MCH.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type OLED display device, a new display device and a driving method for improving display quality.
(OLED is an abbreviation for Organic Lighting Emission Diode.)

[0002]

2. Description of the Related Art Conventional active matrix OLE
In the circuit of the pixel cell of the D display device, a first transistor (hereinafter also referred to as a switching transistor T1) is provided at an intersection of wirings stretched vertically and horizontally, and its gate electrode is used as a scan line (also referred to as a gate line). , The drain electrode (or source electrode) is connected to the signal line (also referred to as drain line or source line), and the source electrode (or drain electrode)
Is connected to the gate electrode of the second transistor,
In the transistor (hereinafter, also referred to as a driving transistor T2), a source electrode (or a drain electrode) is connected to a current supply line (hereinafter, also referred to as a power supply line, a power supply line, Vdd, an anode line, an anode line), and a drain The electrode (or source electrode) is connected to the anode electrode (or cathode electrode) of the OLED element, and the other electrode of the OLED element serves as the cathode electrode (or anode electrode). The equivalent circuit is shown in FIG.

As described above, at least two transistors are required because the active matrix method used for the OLED panel must basically satisfy the following conditions. 1. Select a specific pixel,
Be given the necessary display information. 2.1 Ability to pass current through OLED element during one frame period Compared with the active matrix method used for liquid crystal here, the switching transistor is also for liquid crystal, but the driving transistor is for active matrix used for liquid crystal There is no method, current is passed through the OLED,
It is a transistor that is necessary to make it glow. The reason for this is that in the case of liquid crystal, the ON state can be maintained by applying a voltage, but in the case of OLED, the pixel is kept in the ON state by continuing to flow current.

Therefore, the OLED panel requires a current source for keeping the current flowing, and the driving transistor plays that role. First, when the scanning line is turned on, electric charges are accumulated in the capacitor C1 through the switching transistor T1. Since the capacitor C1 continues to apply a voltage to the gate of the driving transistor T2, even if the switching transistor T1 is turned off, current continues to flow from the current supply line through the driving transistor and the pixel is turned on for one frame period. it can. When displaying gradations using this configuration, it is necessary to apply a voltage according to the gradation to the gate voltage of the driving transistor T2. Here, if the same voltage is applied to the driving transistor T2,
Even if it is applied to the gate electrode of, if the threshold voltage of T2 (hereinafter, also referred to as Vth) of the driving transistor of each pixel varies, the value of the current flowing through the OLED element changes in each pixel. Therefore, variations in the threshold voltage of the driving transistor appear in the display as they are.

The on-current of a transistor is extremely uniform if it is a single-crystal transistor, but in a low-temperature polycrystalline transistor (hereinafter also referred to as a low-temperature polysilicon TFT) that can be formed on an inexpensive glass substrate. Since the variation in the threshold value varies in the range exceeding ± 1.0 V, the on-current flowing through the driving transistor T2 varies correspondingly, and unevenness or salt and pepper is mixed in the display. Such roughness occurs. These display defects occur not only with variations in threshold voltage, but also with variations in TFT mobility, variations in off-current, variations in parasitic capacitance, and the like. Therefore, in the method of displaying gradations in an analog manner, it is necessary to strictly control the characteristics of the transistor in order to obtain uniform display (for example, the threshold voltage is ± 0.1 V or less),
The current low-temperature polycrystalline polysilicon TFT cannot satisfy this specification. To solve this problem, FIG.
Various circuit configurations have been proposed as shown in (B) to (D).

FIG. 25B shows SID98 and DIGES.
The circuit disclosed in T., p. The configuration is such that four transistors are provided in one pixel, and variations in the threshold voltage of the driving transistor T2 are compensated by a capacitor to obtain a uniform current. However, in this configuration, variations in the threshold voltage of the driving transistor T2 are compensated, but since the video signal (hereinafter, also referred to as data) is given as a voltage, mobility other than the threshold voltage of the driving transistor, etc. , It is not possible to compensate for the variation in the parameters that give the ON current.

On the other hand, a circuit configuration has been proposed in which data is given as a current to compensate for characteristic variations of the driving transistor T2. FIG. 25C shows IEDM98-p.875.
The configuration is disclosed in. Data is the current Idata
In order to solve the above-mentioned problem.

However, this method is Since the programmed current is programmed through the OLED element, when the OLED has a large junction capacitance, it takes a long time to write Idata, and high speed operation cannot be expected. 2. The driving transistor (MN2) that controls the driving current for the switching transistor (MN4) connected to the power supply line when the current path changes serves as a source follower. Therefore, the source voltage of the driving transistor is
It varies depending on the characteristics of the switching transistor. It has drawbacks such as

As a solution to this problem, FIG.
There is a 5 (D) circuit. This circuit is based on the ED20
01-8SDM2001-8pp7.
The source electrode of the driving transistor (T3) is connected to Vdd, and the writing of Idata is the above-mentioned OL.
Since the configuration does not include the ED element, it is not necessary to charge the junction capacitance of the OLED element, and the circuit is suitable for high-speed operation. Further, as a modification, the circuit of FIG. 25 (E) is raised. The operation of the circuit in FIG. 25E is shown in FIG.
The circuit operation is essentially the same.

[0010]

Here, in these circuits, as disclosed in IEDM98-pp875, the signal current writing transistor (MN) is basically used.
3 and T2) and the sample and hold transistor (MN1 and T1) for holding the gate voltage must be closed before the voltage supply switch transistor (MN4) and the current path switching switch transistor (T4) are opened. Not in.

On the other hand, in these circuits, a signal current writing transistor (MN3 or T2) and a sample and hold transistor (M) for holding a gate voltage are used.
N1 and T1) are connected to the same scanning line or are driven so as to be turned ON / OFF at the same time. In the circuit of FIG. 25C, when the same gate voltage is applied to the signal current writing transistor (MN3) and the sample hold transistor (MN1), the source potential and drain potential of MN1 are the same as the source potential and drain potential of MN3. Therefore, in the case of p-channel, if the transistors have the same threshold characteristics, MN1 is always closed first.

Further, a current writing transistor (MN
3) and the voltage supply switch transistor (MN4) are closed at the same time, and even if the threshold value of MN1 becomes sufficiently lower than the threshold value of MN3 and it closes after MN3, MN
If it is closed before opening 4, driving transistor (MN2)
Since there is no voltage supply path to the gate voltage of the MN2 (the voltage from the cathode electrode is blocked by the OLED element), the gate voltage of the MN2 is almost the same as that at the time of writing current, which is a problem. There is no. In the case of the n channel, the polarities are completely opposite to each other, but there is no problem because they are relatively the same.

However, FIG. 25D and FIG.
In the circuit of (E), unlike the circuit of FIG. 25C, the source potential or the drain electrode potential of the current writing switch transistor (T2) is always the source potential or the drain potential of the sample hold transistor (T1). Than the threshold voltage of the driving transistor (T3) (-Vth in the case of p-channel),
If they are operated with the same gate voltage, the current writing switch transistor (T2) will be closed before the sample and hold transistor (T1). Then, the gate voltage of the driving transistor (T3) becomes
In the case of FIG. 25 (D), the potential of the signal line, and in the case of FIG. 25 (E), the sample-hold transistor (T1) is moved toward the power supply potential by its own programmed current connected to the power supply. Will be recharged until is closed. Therefore, the stored (programmed) current at the time of writing changes accordingly, and increases in the case of FIG. 25 (D) and decreases in the case of FIG. 25 (E).

Here, the most problematic case is when the scanning waveform (gate waveform) has a delay (waveform dullness). In particular, when a vertical scanning circuit (gate circuit) is built with low temperature polysilicon, the delay amount of the scanning waveform is large and has variations. If the delay amount is large, the rate of increase or decrease of the current due to recharging increases accordingly, so that if there is variation, it causes variation of the current flowing through the OLED. In this case, the current varies among the scanning lines, and since the scanning waveform often extends in the horizontal direction, horizontal stripe-shaped unevenness is generated.

Further, when the threshold value of the current writing switch transistor (T2) and the sample and hold transistor (T1) varies by about 0.1 V between adjacent pixels in the state where the scanning waveform is delayed, the OLED of the pixel is displayed. Since variations occur in the current flowing through the display, and the display is rough, the advantages of these circuits are hardly generated.
In an actual active matrix type display device, there is no possibility that there will be no delay in the scanning waveform, and the problem becomes more serious as the size and size of the display become higher.

The present invention solves the above-mentioned conventional problems, and
The transistor that controls the current flowing through the ED does not have the source follower configuration, and the drive voltage can be lowered, and the circuit configuration suitable for high-speed operation is provided. Even when the active matrix type OLED display device and the driving method thereof have a high margin with respect to the variation of the delay amount and the variation of the threshold value and can obtain the good display performance without streaks and roughness and the high productivity. With the goal.

[0017]

In order to achieve this object, an active matrix type OLED display device and its driving method of the present invention have the following configurations and methods.

As a first configuration, in a display device in which a unit pixel is composed of a plurality of transistors and an OLED element, in the unit pixel, a first transistor whose source electrode is connected to a power source, and one electrode of which is the power source are provided. And a capacitor having the other electrode connected to the gate electrode of the first transistor, and one of a source electrode or a drain electrode connected to the drain electrode of the first transistor, and the other of the source electrode and the drain electrode. Is connected to the gate electrode of the first transistor, one of the source electrode or the drain electrode and the second transistor whose gate electrode is connected to the first scan line is connected to the drain electrode of the first transistor, The other of the source electrode or the drain electrode was connected to the signal line, and the gate electrode was connected to the second scanning line. No. 3 transistor and one of the source electrode or the drain electrode are connected to the drain electrode of the first transistor, the other of the source electrode or the drain electrode is connected to the OLED element, and the gate electrode is connected to the third scanning line. And an active matrix type OLED display device.

As a second configuration, in a display device in which a unit pixel is composed of a plurality of transistors and an OLED element, in the unit pixel, a first transistor whose source electrode is connected to a power source and one electrode of which is the power source are provided. A capacitor having the other electrode connected to the gate electrode of the first transistor, and one of a source electrode or a drain electrode connected to the gate electrode of the first transistor, and the gate electrode performing the first scanning. The second transistor connected to the line and one of the source electrode and the drain electrode are connected to the signal line, and the third transistor whose gate electrode is connected to the second scan line and one of the source electrode and the drain electrode are connected to each other. A fourth transistor connected to the OLED element and having a gate electrode connected to the third scanning line, and a source electrode or a drain electrode. Is connected to the drain electrode of the first transistor, and the other of the source electrode and the drain electrode is the other of the source electrode and the drain electrode of the second transistor and the source electrode or the drain electrode of the third transistor. And a fifth transistor connected to the other of the source electrode and the drain electrode of the fourth transistor, the active matrix type OLED display device.

As a third structure, the active matrix OLED display device is characterized in that the second and third scanning lines are common and the third transistor and the fourth transistor have different conductivity types. Make up.

As a fourth configuration, the active matrix is characterized in that the third transistor and the fourth transistor have threshold characteristics such that when one is in a conducting state, the other is in a non-conductive state. A type OLED display device.

As a fifth structure, the transistor is
An active matrix type OLED display device comprising a thin film transistor element using polysilicon.

As a sixth configuration, an active matrix type OLED display device is constructed in which the first transistor is a hole conduction type transistor.

In a seventh structure, the second transistor is formed by connecting in series two or more transistor elements whose gate electrodes are connected to a common gate line, and an active matrix type OLED display. Configure the device.

As an eighth structure, at least one of transistor elements used in a vertical scanning circuit or a horizontal driving circuit of an active matrix type OLED display device,
As a ninth configuration of an active matrix type OLED display device, which is formed simultaneously with a transistor element in a pixel, the vertical scanning circuit has three different outputs from one output of an external or internal shift register. Active matrix type OL including a circuit for generating a scanning waveform having a pulse width and a phase
Configure an ED display device.

As a tenth structure, the horizontal drive circuit includes a charging circuit for cutting off a current corresponding to the video signal and keeping the signal line at a constant potential during a part of a vertical scanning period. An active matrix type OLED display device characterized by having.

As an eleventh structure, an active matrix type OLED display device is characterized in that the change in the light emission luminance between the adjacent pixels is up to 2%.

As a twelfth configuration, a display for a mobile terminal is constructed which uses the above active matrix type OLED display device.

As a thirteenth structure, a large-sized television using the active matrix type OLED display device is constructed.

As a fourteenth structure, a high-definition monitor characterized by using the above active matrix type OLED display device is formed.

As a first method, in a display device in which a unit pixel is composed of a plurality of transistors and OLED elements, by activating the first scanning line and the second scanning line, the gate electrode of the first transistor can be formed. The drain electrode is made conductive via the second transistor, and a current having a value corresponding to the video signal is passed from the power source to the signal line through the first transistor and the third transistor, and then the first By deactivating the first scanning line, the gate voltage of the first transistor is held, the second scanning line is deactivated, and then the second scanning line is deactivated. After deactivating the scanning line, the third scanning line is activated, and a current having a value corresponding to the video signal is passed through the fourth transistor. LED to flow.

As a second method, in a display device in which a unit pixel is composed of a plurality of transistors and OLED elements, the first scanning line and the second scanning line are activated, and the gate electrode and drain electrode of the first transistor are activated. , A conductive state is applied via the second transistor, a predetermined bias voltage is applied to the gate voltage of the fifth transistor, and the power is supplied from the power source through the first transistor, the third transistor and the fifth transistor. After flowing a current having a value corresponding to the video signal toward the signal line, the first scanning line is made inactive to hold the gate voltage of the first transistor,
After deactivating the scan line, the second scan line is deactivated, the second scan line is deactivated, the third scan line is activated, and the fourth transistor is passed through the video signal. A current having a value corresponding to a signal is passed through the OLED.

As a third method, in a display device in which a unit pixel is composed of a plurality of transistors and OLED elements, by activating the first scanning line and the second scanning line, the gate electrode of the first transistor is formed. The drain electrode is made conductive via the second transistor, and a current having a value corresponding to the video signal is passed from the power source to the signal line through the first transistor and the third transistor, and then the first By deactivating the first scan line, the second scan line is deactivated with respect to the third transistor after deactivating the first scan line. Active and active with respect to the fourth transistor, and a current having a value corresponding to the video signal is passed through the fourth transistor through the OLE. Flowing in.

As a fourth method, in a display device in which a unit pixel is composed of a plurality of transistors and OLED elements, the first scanning line and the second scanning line are activated and the gate electrode and drain electrode of the first transistor are activated. , A conductive state is applied via the second transistor, a predetermined bias voltage is applied to the gate voltage of the fifth transistor, and the power is supplied from the power source through the first transistor, the third transistor and the fifth transistor. After flowing a current having a value corresponding to the video signal toward the signal line, the first scanning line is made inactive to hold the gate voltage of the first transistor,
After deactivating the scanning line of, the second scanning line is made inactive to the third transistor and active to the fourth transistor, and the value corresponding to the video signal is passed through the fourth transistor. Current is the OLE
Pour into D.

As a fifth method, in a display device in which a unit pixel includes a plurality of transistors and an OLED element, one of a source electrode and a drain electrode is connected to a gate electrode of a first transistor whose source electrode is connected to a power source. , The drain electrode of the first transistor,
Second with the other of the source electrode or the drain electrode connected
After the voltage of the first scanning line connected to the gate electrode of the transistor is deactivated so that the second transistor is in the non-conductive state, one of the source electrode and the drain electrode is connected to the first transistor. The voltage of the second scanning line connected to the drain electrode, the other of the source electrode and the drain electrode being connected to the signal line and connected to the gate electrode of the third transistor, causes the third transistor to be in a non-conductive state. So that one of the source electrode and the drain electrode is connected to the drain electrode of the first transistor, and the other of the source electrode and the drain electrode is connected to the gate electrode of the fourth transistor connected to the OLED element. The voltage of the third scanning line is activated so that the fourth transistor element becomes conductive.

As a sixth method, in a display device in which a unit pixel includes a plurality of transistors and an OLED element, one of a source electrode and a drain electrode is connected to a gate electrode of a first transistor whose source electrode is connected to a power source. , The drain electrode of the first transistor,
Second with the other of the source electrode or the drain electrode connected
After the voltage of the first scanning line connected to the gate electrode of the transistor is deactivated so that the second transistor is in the non-conductive state, one of the source electrode and the drain electrode is connected to the first transistor. A drain electrode, the other of the source electrode or the drain electrode is connected to the signal line, and the gate electrode of the third transistor, and one of the source electrode or the drain electrode is connected to the drain electrode of the first transistor, and the source electrode Alternatively, the voltage of the second scanning line connected to the gate electrode of the fourth transistor whose other drain electrode is connected to the OLED element causes the third transistor to be in a non-conductive state, and the fourth transistor element So that it becomes conductive.

As a seventh method, in the display device including the OLED element, one of the source electrode and the drain electrode is connected to the drain electrode of the first transistor, and the other of the source electrode and the drain electrode is connected to the first electrode. Gate electrode of the fifth transistor connected to the other of the source electrode and the drain electrode of the second transistor, the other of the source electrode and the drain electrode of the third transistor, and the other of the source electrode and the drain electrode of the fourth transistor. A predetermined bias voltage is applied to.

As an eighth method, the predetermined bias voltage is set so that the first transistor and the fifth transistor both operate in the saturation region.

[0039]

BEST MODE FOR CARRYING OUT THE INVENTION (Embodiment 1) FIG.
1 shows a circuit configuration of the present invention. A unit pixel is formed by a plurality of transistors each including at least four and an OLED element, and by activating the first scan line GL1, the second transistor is configured to short-circuit the gate and drain of the first transistor MDR. When the MSH is opened and the second scan line GL2 is activated, the first transistor MDR and the third transistor M
After a current having a value corresponding to the video signal is passed through the WR and the gate voltage of the first transistor MDR is stored in the capacitor CS connected between the gate and the source of the first transistor MDR so as to pass the signal current. , The first scanning line GL1 is made inactive, and the second transistor M
After turning SH off, the second scan line GL2 is deactivated, the third transistor MWR is turned off, and then the third scan line GL3 is activated,
The current is supplied to the fourth transistor MCH and OLED.
The pixel circuit is configured so as to flow to the element.

This circuit has four transistors in one pixel. The source of the first transistor MDR is connected to the power supply line (voltage source), and the gate of the MDR is connected to the source of the second transistor MSH. Therefore, the gate of the second transistor MSH is connected to the first scan line GL1, the drain of MSH is the drain of MDR, and the third transistor MWR.
And the source of the fourth transistor MCH. The drain of the MWR is the signal line DAT.
A, the gate is connected to the second scan line GL2, MCH
Has its gate on the third scan line GL3 and its drain on OLED
Is connected to the anode electrode.

The means and action will be described below.

FIG. 2 shows a pixel driving method (timing chart) of the present invention, FIG. 3 shows a conventional pixel driving method (timing chart), and FIG. 4 shows an equivalent circuit diagram of the pixel of the present invention at each timing. 5 shows the equivalent circuit of the pixel at the second timing (t1 to t2) of the conventional pixel, and FIG. 6 shows the change of the operating point of the drive transistor MDR of the present invention and the conventional pixel.

The drive circuit of the present invention is controlled by three timings. The first period is the timing (to t1) for storing the required current value. MWR at this timing
Also, when MSH is opened, an equivalent circuit shown in FIG.
It becomes A. Here, the MDR is in a diode-connected state in which the gate and the drain are connected, so that a predetermined current ISIG corresponding to the video signal flows from the signal line through the MDR and MWR. At this time, MS
A current I2 also flows through H, and the gate voltage of MDR is I1 =
The current I2 flows until it reaches a gate voltage V1 at which ISIG flows, and when it reaches V1, the current I2 stops flowing.

The second timing is the timing (t1 to t2) for closing the MSH. The equivalent circuit at that time is shown in FIG. 3B. As a result, the current ISIG remains flowing in the MWR, the gate voltage of the MDR is kept at V1,
Separated from voltage and current sources. The third timing (t2) is the timing to close the MWR and open the MCH. The equivalent circuit at that time is shown in FIG. 3C. At this time, the timing of closing the MWR and the timing of opening the MCH are the same or the timing of opening the MCH is later than the timing of closing the MWR. As a result, the current value ISIG stored in the MDR flows into the OLED via the MCH. The operating point of MDR moves to V2 in FIG.
Since the DR transistor operates in the saturation region, the current value of the MDR before and after switching basically does not change, and a predetermined current ISIG ′ (≈ISIG) corresponding to the video signal flows through the OLED.

On the other hand, in the conventional pixel, the scanning lines GL1 and G
Since L2 is common, the scanning waveforms of MSH and MWR are the same. At this time, the source potential or the drain electrode potential of the MSH is always lower than the source potential or the drain potential of the MWR by the threshold value of the MDR (-Vth in the case of the p-channel). If it is operated in, the MWR will close before the MSH. The equivalent circuit at that time is shown in FIG. The gate voltage of the MDR is then recharged towards the power supply potential by its own programmed current connected to the power supply until the MSH is completely closed. Therefore, the stored (programmed) current ISIG at the time of writing changes accordingly, and decreases depending on the delay time. As shown in FIG. 6, the operating point of the MDR at this time is that the gate voltage is V1 at the second timing.
To V1 'from V1' to V1 at the third timing
2 ', ISIG changes to ISIG ", and a large voltage change occurs.

All four transistors are made of the same P
Although it may be a channel-type transistor, an N-channel type transistor, or a different type transistor, all P-channel transistors are used in this embodiment mode. In this embodiment mode, a low-temperature polysilicon thin film transistor (also referred to as a TFT) is used as the transistor. However, the transistor is not limited to a low temperature polysilicon thin film transistor, and a single crystal transistor on a silicon wafer may be used, or a high temperature polysilicon transistor formed on continuous grain boundary silicon (CGS) or a quartz substrate. But good.

In the present embodiment, the cross-sectional structure of the transistor is a top gate planar type TFT, but it may be a bottom gate type, a stagger type or an inverted stagger type. Furthermore, the impurity regions (source and drain) may be formed by using the self-aligned method, or may be formed by the non-self-aligned method.
These are all within the scope of the invention.

FIG. 7 shows a planar structure of the pixel of this embodiment. A wiring electrode group for supplying a voltage and a current to the pixels arranged in a matrix is provided on the substrate.
A signal line DATA in FIG. 7 is a wiring for transmitting a video signal current, and scanning lines GL1 to GL3 are wirings for transmitting a control signal for activating / deactivating a pixel transistor, and a power source. The line is a wiring for supplying an anode voltage to the hole injecting electrode 31 (pixel electrode, anode). The resistance of each wiring electrode is preferably low, and the wiring electrode is made of Al, Ti or titanium nitride (TiN), Ta, Mo, Cr, W, Cu, N.
The metal containing any one or more of d, Zr and the like is used in a single layer or a laminated structure of two or more layers. However, the present invention is not limited to this material.

Further, the capacitor CS holding the gate voltage of the first transistor MDR is generally formed in the non-display area between the adjacent pixels. When forming a full-color panel with a low-molecular OLED, since the OLED layer is formed by mask vapor deposition using a metal mask, the width of the non-display area between adjacent pixels is about 10 to 20 μm. Since this part does not contribute to light emission, the holding capacitor CS
In the case of a method in which light is taken out from the glass substrate side on which the transistor is formed, the formation of the film in this region is an effective means for improving the aperture ratio. The structure of the OLED element will be described below.

FIG. 8 shows a configuration example of the OLED display device of this embodiment. In this embodiment, since a method of extracting light from the glass substrate side on which the transistor is formed (hereinafter referred to as bottom extraction) is used, ITO that is a transparent electrode is used for the hole injection electrode 31.

First, an array of transistors is formed in a desired shape on a substrate. Then, ITO, which is a transparent electrode, is formed as a pixel electrode on the flattening film by a sputtering method and patterned. Then, an OLED layer, an electron injection electrode, etc. are laminated.

The OLED display device shown in FIG. 8 has an array of thin film transistors TFT on a glass substrate 35.
ITO serving as the hole injecting electrode 31 via the insulating layer 38
OLE having 31 and organic layer 22 and electron injection electrode 32
The D structures 11 are stacked. As the substrate material, light needs to be emitted from the rear surface direction of the substrate, and therefore, a transparent or translucent material such as glass, quartz or resin can be used.

The total thickness of the hole injecting electrode 31, which is the base of the OLED structure 11, and the wiring electrode of the TFT is not particularly limited, but it is usually about 100 to 1000 nm.

The insulating layer 38 provided between the wiring electrode of the TFT and the organic layer of the OLED structure 11 is formed by sputtering or vacuum deposition of an inorganic material such as silicon oxide such as SiO 2 or silicon nitride. , A silicon oxide layer formed by SOG (spin on glass), a coating film of a resin material such as photoresist, polyimide, acrylic resin, or the like, as long as it has an insulating property, The organic film is preferable because it is preferable to be thick and flat. Further, since the insulating layer 38 protects the OLED element 11 which is weak against moisture, it is preferable that the organic film having high hygroscopicity has a structure that does not come into contact with the outside air.

In the present embodiment, the colorization method is realized by separately coating three kinds of materials having different emission peaks (R, G, B) with metal masks. Further, as another method, for example, there is a method of obtaining by combining a white light emitting OLED structure and an RGB color filter, and a blue light emitting OLE.
There is also a method of obtaining RGB three colors from the D structure by a wavelength conversion layer.

Next, the OLED structure 11 constituting the OLED display device of the present invention will be described. OL of the present invention
The ED structure 11 includes a hole injection electrode 31 that is a transparent electrode.
And one or more organic layers 22 and an electron injection electrode 32. The organic layer has at least one hole transport layer and at least one light emitting layer, for example, an electron injecting and transporting layer, a light emitting layer, a hole transporting layer, and a hole injecting layer in that order. In addition,
The hole transport layer may be omitted. The organic layer of the OLED structure 11 of the present invention can have various configurations, and the electron injection / transport layer can be omitted, or can be integrated with the light emitting layer, or the hole injection / transport layer and the light emitting layer can be mixed. May be. The electron injection electrode is made of a metal, compound or alloy having a small work function, which is preferably formed by a vapor deposition method such as a vapor deposition method or a sputtering method.

Since the hole injecting electrode 31 has a structure in which light emitted from the hole injecting electrode 31 side is extracted,
For example, ITO (tin-doped indium oxide), IZO
(Zinc-doped indium oxide), ZnO, SnO2, I
Examples include transparent materials such as n2O3, but especially IT
O and IZO are preferred. The thickness of the hole injection electrode 31 is
It suffices that it has a certain thickness or more that can sufficiently inject holes, and normally, it is preferably about 10 to 500 nm.
In addition, these films are preferably thin as far as the transmittance characteristics are not impaired in order to prevent a short circuit with the cathode at the ends. In actual use, the film thickness and optical constants of the electrodes may be set so that the interference effect due to reflection at the interface of the hole injection electrode 31 such as ITO sufficiently satisfies the light extraction efficiency and color purity. . The hole injection electrode 31 can be formed by a vapor deposition method or the like, but is preferably formed by a sputtering method. The sputtering gas is not particularly limited, and an inert gas such as Ar, He, Ne, Kr, Xe, or a mixed gas thereof may be used.

The electron injection electrode 32 is formed of a metal, compound or alloy having a small work function, which is preferably formed by vapor deposition, sputtering or the like. The constituent material of the electron injection electrode to be formed is, for example, K, Li, Na or M.
g, La, Ce, Ca, Sr, Ba, Al, Ag, I
It is preferable to use a simple metal element such as n, Sn, Zn, or Zr, or a two-component or three-component alloy system containing them in order to improve stability. As the alloy system, for example, A
g.Mg (Ag: 1 to 20 at%), Al.Li (Li:
0.3 to 14 at%), In.Mg (Mg: 50 to 80 at)
%), Al.Ca (Ca: 5 to 20 at%) and the like are preferable.

The thickness of the electron injecting electrode thin film may be a certain thickness or more capable of sufficiently injecting electrons, and is 0.1 nm or more,
The thickness is preferably 1 nm or more.

The hole injection layer has a function of facilitating the injection of holes from the hole injection electrode 31, and the hole transport layer has a function of transporting holes and a function of blocking electrons. Also called the transport layer.

The electron injecting and transporting layer is provided when the electron injecting and transporting function of the compound used for the light emitting layer is not so high, and the function of facilitating the injection of electrons from the electron injecting electrode,
It has a function of transporting electrons and a function of hindering holes.

The hole injection layer, the hole transport layer and the electron injection transport layer increase the number of holes and electrons injected into the light emitting layer.
Confine, optimize recombination region and improve luminous efficiency.

The electron injecting and transporting layer may be separately provided in the layer having the injecting function and the layer having the transporting function.

The thickness of the light emitting layer, the combined thickness of the hole injecting layer and the hole transporting layer, and the thickness of the electron injecting and transporting layer are not particularly limited and may vary depending on the forming method.
It is preferably about 00 nm.

The thicknesses of the hole injecting layer, the hole transporting layer and the electron injecting and transporting layer are about the same as the thickness of the light emitting layer or about 1/10 to 10 times, depending on the design of the recombination / light emitting region. Good. The thickness of the hole injecting layer and the hole transporting layer, and the thickness of the electron injecting layer and the thickness of the electron transporting layer when the electron injecting layer and the electron injecting layer are separated are 1 nm or more and 20 nm for the transport layer.
The above is preferable. At this time, the upper limits of the thickness of the injection layer and the transport layer are usually about 100 nm in the injection layer and about 100 nm in the transport layer. Such a film thickness is the same when two injecting and transporting layers are provided. Also, by controlling the film thickness while considering the carrier mobility and carrier density (determined by the ionization potential and electron affinity) of the combined light emitting layer, electron injecting and transporting layer, and hole injecting and transporting layer, the recombination region and the light emitting region can be controlled. Can be freely designed, and it is possible to design the emission color, control the emission brightness and emission spectrum by the interference effect of both electrodes, and control the spatial distribution of emission.

The light emitting layer of the OLED element of the present invention contains a fluorescent substance which is a compound having a light emitting function. Examples of the fluorescent substance include, for example, JP-A-63-2646.
No. 92, etc., metal complex dyes such as tris (8-quinolinolato) aluminum [Alq3], JP-A-6-110569 (phenylanthracene derivative), and JP-A-6-114456 (tetraarylethene). Derivative), JP-A-6-100857,
A blue-green light emitting material such as that disclosed in JP-A-2-247278 can be used.

Further, the hole injection layer / hole transport layer includes
For example, JP-A-63-295695 and JP-A-2-
No. 191694, No. 3-792, No. 5-234681, No. 5-239455, No. 5-299174, and No. 7-126.
Various organic compounds described in JP-A No. 225, JP-A-7-126226, JP-A-8-100172, EP0650955A1 and the like can be used.
For forming the hole injecting and transporting layer, the light emitting layer and the electron injecting and transporting layer, it is preferable to use the vacuum deposition method because a uniform thin film can be formed.

Further, the OLED layer is sealed with a sealing material 40 so that moisture does not enter. Although a stacked structure of a metal thin film and an organic film is used in this embodiment mode, a method of attaching glass with a sealant may be used.

A direct current voltage was applied to the OLED display device thus manufactured, and it was continuously driven at a constant current density of 10 mA / cm 2. The OLED structure is 5.0 V, 100 cd / c
White light emission with m2, color coordinates x = 0.30, y = 0.33 was confirmed. The blue light emitting part has a brightness of 100 cd / cm2,
The color coordinate is x = 0.129, y = 0.105, the green light emitting portion has a brightness of 200 cd / cm 2, and the color coordinate is x = 0.340.
y = 0.625, the brightness of the red light emitting portion is 125 cd / cm2
Thus, an emission color having color coordinates of x = 0.649 and y = 0.338 was obtained.

The effects of this embodiment will be shown below. Figure 9
Is the OLE for the delay time of the scanning waveform (gate waveform)
The change of D current IOLED is shown. FIG. 9A shows the OLED current IOLE when there is no variation in the threshold voltage VTH of the transistor and when the threshold value of MSH is lower by −0.1V.
FIG. 9B shows the dependence of D on the gate waveform delay time in the case where there is no variation in the threshold value VTH of the transistor,
OLED current IOL when the threshold of -0.1V is lower
The amount of change in ED (%) is shown. As shown in FIG. 9, in the conventional pixel, OLE depends on the delay time of the gate waveform.
Since the D current changes significantly, horizontal stripes are generated due to variations in the delay amount. In the present invention, however, the horizontal stripes are completely absent because it hardly depends on the delay time.

FIG. 10 shows changes in the OLED current when the threshold values of the four transistor elements change. 10A and 10B are conventional pixels, and A is ISIG = 1 μ.
In the case of A, the case of B is ISIG = 0.01 μA, and FIG.
C and D are pixels of the present invention, C shows the case of ISIG = 1 μA, and D shows the case of ISIG = 0.01 μA. Figure 10
As shown in A and B, in the conventional pixel, MSH and M
Although the OLED current changes drastically when the threshold value of WR changes, as shown in FIGS. 10C and 10D, in the case of the present invention, even if they change, the OLED current hardly changes and is stable. Is.

As a result, the variation margin of the threshold voltage of each transistor is, for example, a current variation of ± 2%.
Under the conditions that allow up to, the conventional pixel has a voltage of ± 0.1 V, but in the present embodiment, it has a voltage of ± 0.8 V, which can be greatly expanded. In the conventional pixel, the MSH
However, the pixel of the present invention is in the form of being regulated by the threshold variation of the drive transistor MDR originally used in the current programming method, and has an extremely wide threshold variation margin. I was able to.

As described above, in the present embodiment, there is a delay in the scanning waveform and the amount of delay varies,
Even when the thresholds of the current writing switch transistor MWR and the sample and hold transistor MSH vary among the adjacent pixels, the current flowing through the OLED of the pixel does not vary, so that delay amount variation and threshold value variation can be prevented. Large sized OLED display panel with high margin, high display performance without streaks and roughness, and high linearity of OLED current with respect to signal current, resulting in high yield and high productivity. Can be obtained. (Embodiment 2) The present embodiment is different from the following except that
It has the same configuration as that of the first embodiment.

In the present embodiment, as shown in FIG.
The cascade transistor MCS is connected to DR. In the first embodiment, when the operating point of the MDR shifts from V1 to V2, there is no problem if it is an ideal transistor saturation region characteristic. However, as shown in FIG. 12, the Early effect or gate length modulation, and further, Due to the kink effect, ISI
G is increased to ISIG 'according to the drain voltage.
As a result, if there is a variation ΔVth in the threshold value of the MDR, it appears as a variation in the OLED current IOLED. Therefore, in order to stabilize the current ISIG before and after switching between MWR and MCH, these effects must be reduced.

Therefore, at least five transistors are formed, and the transistor MCS is set to M as shown in FIG.
By making a cascade connection to DR and setting an appropriate bias voltage, the characteristic becomes as shown in FIG. 12, and the change of the current ISIG depending on the operating point becomes extremely small. At this time, the appropriate range of the bias voltage refers to the condition that both MDR and MCS operate in the saturation region.

In the present embodiment, in addition to the effects of the first embodiment, the margin of MDR threshold variation is ± 0.8.
It was possible to greatly improve from V to ± 2V. (Embodiment 3 of the Invention) The present embodiment is different from the following except that
It has the same configuration as that of the first embodiment.

In the present embodiment, the second and third scanning lines are made common by making the conductivity types of the third transistor and the fourth transistor different. The structure of the pixel circuit of this embodiment is shown in FIG. In this embodiment mode, the third transistor MWR is an n-channel (also referred to as an electron conduction type) transistor, and the fourth transistor MCH is a p-channel (also referred to as a hole conduction type) transistor. As a result, even if MWR and MCH are connected to a common transistor, when one is in the ON state, the other is in the OFF state, so the current switching method of the present invention is not impaired.

In this embodiment, in addition to the effect of the first embodiment, by reducing the number of scanning lines, the yield can be improved by simplifying the driving circuit and the aperture ratio of the pixel can be improved. (Embodiment 4) The present embodiment is different from the following except that
It has the same configuration as in the first and third embodiments.

In this embodiment, in addition to the configuration of the third embodiment, the basic operation timing is that of the first embodiment.
Similarly, at the time of shifting from the second timing to the third timing, if there is a branch in the path through which the current flows, the drain current of the MDR increases, so that the current value corresponding to the video signal is flowed. Can't remember the gate voltage. In the present embodiment, when MWR and MCH are made to have different conductivity types as in the third embodiment, the threshold values are controlled so that the M lines are always switched at the timing of switching the scanning lines.
MCH is turned on after WR is turned off. Specifically, the threshold value of the third transistor MSH (n channel) is set to 2 ± 2V, and the threshold value of the fourth transistor MWR (p channel) is set to −2 ± 2V. As a result, even if the same scanning voltage waveform is applied, the two transistors are not turned on at the same time, and the current switching method of the present invention is not impaired.

In the present embodiment, as in the third embodiment, by reducing the number of scanning lines, it is possible to improve the yield by simplifying the driving circuit and the aperture ratio of pixels. (Fifth Embodiment of the Invention) In the present embodiment, except for the following,
It has the same configuration as that of the first embodiment.

In this embodiment, the MDR is composed of a p-channel type polysilicon thin film transistor. As a result, the kink effect shown in FIG. 6 can be reduced as compared with the case of using n-channel type polysilicon.

As a result, in the case of n-channel polysilicon, the margin of MDR threshold variation is ± 0.
Although it was about 3V, in the case of a p-channel type polysilicon thin film transistor, it was able to be greatly improved to ± 0.8V. (Embodiment 6 of the Invention)
It has the same configuration as that of the first embodiment.

In this embodiment, the transistors forming the active matrix are p-channel type polysilicon thin film transistors, and the MSH has a multi-gate structure in which the gates are dual gates or more. MSH
Operates as a voltage holding switch for the gate voltage of the MDR, and therefore requires a characteristic with a high ON / OFF ratio as much as possible. FIG. 14 shows leak current values in various gate structures. From this, it is understood that the gate structure needs a multi-gate structure which is more than the dual gate structure.

As a result, in this embodiment, in addition to the effects of the first embodiment, the area occupied by the holding capacitor CS can be reduced and the aperture ratio can be improved by 5 points. (Seventh Embodiment of the Invention) The present embodiment is different from the following except that
It has the same configuration as that of the first embodiment.

In the present embodiment, the transistors forming the active matrix are formed of polysilicon thin film transistors, and the active matrix OLE is used.
A vertical scanning circuit of the D display device and a precharge circuit for setting a predetermined voltage to a signal line before writing a current were integrally formed on a substrate at the same time as forming transistors forming pixels.

FIG. 15 shows an active matrix OLED.
The external view of the whole display apparatus is shown. The present invention requires at least four or more transistors in a unit pixel. Therefore, it is suitable to use polysilicon having high mobility as the material of the active element as the material of the transistors constituting them. Therefore, it is possible to integrally form the peripheral circuits that drive the panel. Further, in the present embodiment, the vertical scanning circuit and the precharge circuit are built in, but as a built-in circuit, a signal side circuit can be easily built in when a single crystal transistor is used. In these embodiments, the type of circuit to be incorporated may be determined in consideration of transistor performance.
In addition to the effect of the first embodiment, by incorporating the peripheral circuit, the number of connection points with the external circuit can be reduced, the mechanical reliability is improved, and the peripheral frame area can be made compact. Also, the weight of the entire panel could be reduced. (Embodiment 8) The present embodiment is different from the following except that
The configuration is the same as in the first and seventh embodiments.

In the present embodiment, the vertical scanning circuit of the third embodiment is used as a circuit for generating scanning waveforms having three different pulse widths and phases from one output of the shift register, and a glass substrate using polysilicon. Formed on.
16 to 18 are circuit diagrams of the vertical scanning circuit according to the present embodiment. The output INB of one shift register is input to one of the three NOR circuits, and the other three control lines OEV are input.
By controlling with A, OEVB, and OEVC, it is possible to generate vertical scanning waveforms φ1 to φ3 of three specifications having different pulse widths and phases as shown in FIG. 2 of the first embodiment.

In addition to the effects of the first and seventh embodiments, the present embodiment has an extremely small circuit configuration and three different pulse widths as compared with the case where the shift registers are independently configured in three stages. It is possible to generate a scanning waveform having a phase, and it is possible to achieve narrowing of the peripheral picture frame. (Ninth Embodiment of the Invention) The present embodiment is different from the following except that
The configuration is the same as in the first and seventh embodiments.

In this embodiment, the transistor of the pixel of Embodiment 1 is formed, and at the same time, the current corresponding to the video signal is cut off and the signal line is set to a constant potential in a part of the vertical scanning period. A charging circuit (hereinafter, referred to as a precharge circuit) for forming was formed on the glass substrate using polysilicon. FIG. 19 shows a circuit diagram of the precharge of this embodiment.

As a result, in this embodiment, in addition to the effects of the first and seventh embodiments, the floating or pulling of the black level, which is a problem in the pixel circuit of the present embodiment of the current writing method, is improved. It was possible to improve the contrast ratio. (Embodiment 10 of the Invention) The present embodiment has the same configuration as that of Embodiment 1 except for the following.

In the present embodiment, the variation amount of luminance (current amount) is set within 2%. FIG. 20 shows the luminance on the horizontal axis and the variation amount (ΔI · I) of the luminance (Bcd / m ² ) on the vertical axis. Brightness is 1 cd / m ²
In the luminance region from 1 to 1000 cd / m ² , if the variation amount is 2% or more, the human recognizes the varied boundary line. Therefore, it is necessary that the variation amount of the brightness (current amount) is within 2%.

In the OLED display device of the present invention, it has been found that when the difference between the threshold voltages of the MDRs of the adjacent pixels is ± 0.8 V or more, it becomes an intermediate bright point which causes roughness. Therefore, in order to suppress the fluctuation of the brightness within 2%, the difference in the threshold voltages of the MDRs of the adjacent pixels is set to ± 0.8 V or less, so that the brightness variation of the adjacent pixels can be set to the recognition limit or less.

When the current value Ids in the saturation region of the first transistor is represented by the following expression Ids = k × (Vgs-Vth) ² (1 + Vds * λ), even if the threshold value varies between the adjacent pixels. Even if it does not exist, if the value of λ in the above equation varies, the current value flowing through the OLED varies. FIG. 21 shows the results of simulating the current value due to the variation of λ on the horizontal axis λ and the vertical axis. To keep the fluctuation within ± 2%,
λ must be kept below 0.05.

Furthermore, by setting the channel length to 15 μm or more, the grain boundaries of the crystals contained in the channel increase, the electric field is relaxed, and the kink effect is suppressed to a low level.
It has been found that the value of can be suppressed to 0.05 or less. This is because when L is lengthened, the rate of fluctuation of the effective channel length due to the drain voltage decreases. FIG. 22 shows the simulation result.

Further, when the holding capacitor Cs and the off-current minimum value Ioff of the third transistor MSH are set to Ioff, the following equation Cs / Ioff> 0.2 (F / A) is satisfied. In FIG. 23, the horizontal axis shows the off current of MSH and the vertical axis shows the simulation result of the current value flowing through the OLED. It is understood that the change in the current value flowing through the OLED can be suppressed to 2% or less by setting the off current of the MSH to 5 pA or less. This is because when the leak current increases, the charge stored between the gate and source of the MDR (both ends of the capacitor) cannot be retained for one field in the voltage non-writing state. Therefore, the larger the holding capacitor Cs, the larger the allowable amount of off-current. We have found that the variation of the current value between adjacent pixels can be suppressed to 2% or less by satisfying the above expression.

Further, the channel width (W) × channel length (L) of MSH is 50 μm ² or less, and the holding capacitor CS is 0.5 pF or more. In the driving method described above, the voltage between the source and gate of the transistor of M1 is
When the MSH changes from the on-state to the off-state, it is affected by the parasitic capacitance of the MSH. When the MSH changes from on to off, the voltage variation ΔVoff due to this is expressed by the following equation. ΔVoff = Con / (Cs + Con) × (Von−V
th) + Coff / (Cs + Coff) × (Vth−V
off) Here, Con and Voff are the capacitances of the transistors in the ON and OFF states of MSH, Vth is the threshold voltage of MSH, and Cs is the value of the storage capacitance. Therefore ΔVoff
Are affected by variations in threshold voltage. In order to reduce this effect, the size of MSH should be reduced and ΔVof
It is necessary to reduce the value of f.

In order to suppress the fluctuation of the current value between adjacent pixels to 2% or less, L * W of MSH is 50 μm ² or less or CS
Was found to be 0.5 pF or more. (Eleventh Embodiment of the Invention) The present embodiment has the same configuration as that of the first embodiment except for the following.

In the present embodiment, the active matrix type OLED display device of the present invention is used as a display for a mobile terminal.

As a result, a compact display having good display quality can be realized. This property matches the performance required for a display for mobile terminals. (Embodiment 12) This embodiment has the same configuration as that of Embodiment 1 except for the following.

In this embodiment, the active matrix type OLED display device of the present invention is used for a large-sized high-definition display. By using the OLED element of the present invention, it is possible to realize a display having good display quality even in a large-sized and high-definition display having a large waveform delay. (Thirteenth Embodiment of the Invention) The present embodiment has the same configuration as that of the first embodiment except for the following.

In this embodiment, first, the TFT is formed on the substrate.
To form a desired shape. Then, Ag, which is an opaque electrode as a pixel electrode on the flattening film, is formed by a sputtering method and patterned. Then, an OLED layer, an electron injection electrode, etc. are laminated. FIG. 24 shows a configuration example of the OLED display device of the present invention. The OLED display device shown in FIG. 24 has an array of thin film transistors TFT, a metal film 33 serving as a hole injecting electrode 31 and an organic layer 22, and an MgA serving as an electron injecting electrode on the glass substrate 11 via an insulating layer 38.
OLED structure having g34 is stacked. As shown in FIG. 24, a method of extracting light from the side opposite to the transistor side of the OLED element (hereinafter referred to as top extraction)
In this case, the hole injection electrode 31 having a higher reflectance of metal or the like has a higher luminous efficiency.

As the substrate material, since light is emitted from the surface direction of the substrate, a non-transmissive material such as stainless steel can be used in addition to a transparent or translucent material such as glass, quartz or resin. In addition, the encapsulating material 40 needs to be transparent on the take-out side so that moisture does not enter the OLED layer, so a laminated structure including only the organic film is used.

In this embodiment, the conditions for the material of the light emitting layer are basically the same as those in the first embodiment.

A direct current voltage was applied to the OLED display device thus manufactured, and it was continuously driven at a constant current density of 10 mA / cm 2. The OLED structure is 5.0 V, 150 cd / c
White light emission with m2, color coordinates x = 0.30, y = 0.33 was confirmed. The blue light emitting part has a brightness of 150 cd / cm2,
The color coordinates are x = 0.129, y = 0.105, the green light emitting portion has a luminance of 300 cd / cm 2, and the color coordinates are x = 0.340.
y = 0.625, the brightness of the red light emitting portion is 200 cd / cm2
Thus, a luminescent color having color coordinates of x = 0.649 and y = 0.338 was obtained, and the light extraction efficiency was improved by 1.5 times as compared with the first embodiment.

[0105]

As described above, according to the present invention, in a large-sized and high-definition display panel suitable for high-speed operation, having a large waveform delay, and a built-in circuit, even if there is characteristic variation represented by a transistor threshold, Minimize the effect, OL
It is possible to provide an active matrix drive type OLED display device that can reduce the fluctuation of the current value flowing in the ED and obtain high display performance.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a pixel circuit of an active matrix type OLED display device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a drive waveform of a pixel circuit of the active matrix OLED display device according to the first embodiment of the present invention.

FIG. 3 is a diagram showing drive waveforms of a pixel circuit of a conventional active matrix OLED display device.

FIG. 4 is a diagram showing an equivalent circuit at each timing of the pixel circuit of the active matrix type OLED display device according to the first embodiment of the present invention.

FIG. 5 is a diagram showing an equivalent circuit of a pixel circuit of a conventional active matrix OLED display device at a second timing.

FIG. 6 is a diagram showing an operating point of a first transistor of the pixel circuit of the active matrix type OLED display device according to the first embodiment of the present invention.

FIG. 7 is a plan view of a pixel of the active matrix OLED display device according to the first embodiment of the present invention.

FIG. 8 is a cross-sectional view of a pixel of the active matrix type OLED display device according to the first embodiment of the present invention.

FIG. 9 is a diagram showing an effect on the gate delay time of the active matrix type OLED display device according to the first embodiment of the present invention.

FIG. 10 is a diagram showing an effect of the active matrix type OLED display device according to the first embodiment of the present invention on variations in threshold value.

FIG. 11 is a circuit diagram of a pixel circuit of an active matrix type OLED display device according to a second embodiment of the present invention.

FIG. 12 is a first pixel circuit of an active matrix type OLED display device according to Embodiments 1 and 2 of the present invention.
Of the operating point of the transistor

FIG. 13 is a circuit diagram of a pixel circuit of an active matrix type OLED display device according to a third embodiment of the present invention.

FIG. 14 is a diagram showing a comparison of off-state currents of the second transistors of Embodiment 6 of the present invention.

FIG. 15 is an overall view of an active matrix type OLED display device according to a seventh embodiment of the present invention.

FIG. 16 is an overall circuit diagram of a vertical scanning circuit according to an eighth embodiment of the present invention.

FIG. 17 is a circuit diagram of a bitblock_c portion in FIG.

FIG. 18 is a circuit diagram of a vbuffer_c portion in FIG.

FIG. 19 is a circuit diagram of a precharge circuit according to a ninth embodiment of the present invention.

FIG. 20 is a diagram showing the relationship between the identification limit luminance and brightness of a person.

FIG. 21 shows O according to the variation of λ according to the tenth embodiment of the present invention.
Diagram showing variations in LED current

FIG. 22 is a diagram showing channel length dependency of λ according to the tenth embodiment of the present invention.

FIG. 23 is a diagram showing variations in OLED current with respect to off-state current of the second transistor of Embodiment 10 of the present invention.

FIG. 24 is a sectional view of a pixel of an active matrix type OLED display device according to a thirteenth embodiment of the present invention.

FIG. 25 is a circuit diagram of a pixel circuit of a conventional active matrix type OLED display device.

[Explanation of symbols]

MDR first transistor MSH second transistor MWR third transistor MCH 4th transistor GL1 First scan line GL2 second scan line GL3 Third scan line DATA signal line VDD power line CS holding capacitor 31 Pixel electrode (anode electrode) 22 OLED layer 32 cathode electrode AA valid display area (valid screen) GD built-in vertical scanning circuit PR built-in precharge circuit DT video signal line terminal CT cathode terminal AT anode terminal LS built-in level shift circuit

Front page continuation (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09G 3/20 G09G 3/20 621M 622 622E 624 624B 680 680T 680V H05B 33/08 H05B 33/08 33/14 33/14 A (72) Inventor Akiko Nakamura 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Inventor, Yukio Numata 1006 Kadoma, Kadoma City, Osaka F Term (Reference) 3K007 AB02 AB04 BA06 DA01 DB03 EB00 GA04 5C080 AA06 BB05 DD03 DD07 DD08 EE28 FF11 JJ03 JJ04 JJ05 5C094 AA07 AA08 AA13 AA53 AA55 BA03 BA12 BA27 CA19 CA24 CA25 DA09 DA13 DB01 DB01 DB04 DB04 EA04 EA05 EA07 H04A12 A13 A01

Claims (22)

[Claims] 1. A unit pixel includes a plurality of transistors and an OLE.
In a display device including a D element, in the unit pixel,
A first transistor whose source electrode is connected to the power supply;
A capacitor having one electrode connected to the power supply and the other electrode connected to the gate electrode of the first transistor, and one of a source electrode and a drain electrode connected to the drain electrode of the first transistor, and a source The other of the electrode or the drain electrode is connected to the gate electrode of the first transistor, and the second electrode whose gate electrode is connected to the first scanning line and one of the source electrode or the drain electrode are connected to the first transistor. A third transistor connected to the drain electrode, the other of the source electrode and the drain electrode connected to the signal line, and the gate electrode connected to the second scanning line; and one of the source electrode and the drain electrode, Connected to the drain electrode of the transistor, the other of the source electrode and the drain electrode is the OLED
An active matrix OLED display device, comprising: a fourth transistor connected to the element, and a gate electrode connected to the third scanning line. 2. A unit pixel includes a plurality of transistors and an OLE.
In a display device including a D element, in the unit pixel,
A first transistor whose source electrode is connected to the power supply;
A capacitor having one electrode connected to the power supply and the other electrode connected to the gate electrode of the first transistor, and one of a source electrode and a drain electrode connected to the gate electrode of the first transistor, and a gate A second transistor whose electrode is connected to the first scanning line and one of a source electrode or a drain electrode connected to the signal line, and a third transistor whose gate electrode is connected to the second scanning line; and a source electrode Alternatively, one of the drain electrodes is connected to the OLED element, the gate electrode is connected to the third scanning line, and one of the source electrode or the drain electrode is connected to the drain electrode of the first transistor, The other of the source electrode and the drain electrode is the other of the source electrode and the drain electrode of the second transistor, and the other is the third transistor. An active matrix type OLED display device characterized by having a fifth transistor connected to the other of the other and the source electrode or the drain electrode of the fourth transistor of the source electrode and the drain electrode of Njisuta 3. The active device according to claim 1, wherein the second and third scanning lines are common, and the third transistor and the fourth transistor have different conductivity types. Matrix type OLED display device 4. The active element according to claim 3, wherein the third transistor and the fourth transistor have threshold characteristics such that when one is in a conducting state, the other is in a non-conducting state. Matrix type OLED display device 5. The active matrix type OLED display device according to claim 1, wherein the transistor is a thin film transistor element using polysilicon. 6. The active matrix type OLED display device according to claim 5, wherein the first transistor is a hole conductive type transistor. 7. The active matrix according to claim 5, wherein the second transistor is formed by connecting in series two or more transistor elements whose gate electrodes are connected to a common gate line. Type OLED display device 8. The at least one transistor element used in a vertical scanning circuit or a horizontal driving circuit of an active matrix type OLED display device is formed simultaneously with a transistor element in a pixel.
To 7 active matrix type OLED display device 9. The active device according to claim 8, wherein the vertical scanning circuit includes a circuit for generating a scanning waveform having three different pulse widths and phases from one output of an external or internal shift register. Matrix type O
LED display device 10. The horizontal driving circuit includes a charging circuit for cutting off a current corresponding to the video signal and keeping the signal line at a constant potential during a part of a vertical scanning period. Active matrix type OLED display device according to claim 8 or 9. 11. The active-matrix OLED display device according to claim 1, wherein the change in emission luminance between the adjacent pixels is 2% at maximum. 12. A display for a mobile terminal, which uses the active matrix type OLED display device according to any one of claims 1 to 11. 13. A large-sized television using the active matrix type OLED display device according to any one of claims 1 to 11. 14. A high-definition monitor using the active-matrix OLED display device according to claim 1. Description: 15. In a display device in which a unit pixel includes a plurality of transistors and an OLED element, a gate electrode and a drain electrode of the first transistor are activated by activating a first scanning line and a second scanning line. After making a current through the second transistor and passing a current having a value corresponding to the video signal from the power source toward the signal line through the first transistor and the third transistor, the first scanning line is connected. By deactivating, the gate voltage of the first transistor is held, the first scanning line is deactivated, the second scanning line is deactivated, and the second scanning line is deactivated. After being activated, the third scan line is activated and a current having a value corresponding to the video signal is passed through the OLED through the fourth transistor. The driving method of an active matrix type OLED display device, characterized in that 16. A display device in which a unit pixel includes a plurality of transistors and an OLED element, in which a first scanning line and a second scanning line are activated, and a gate electrode of the first transistor and a drain electrode of the fifth transistor are formed. Is turned on via the second transistor, and a predetermined bias voltage is applied to the gate voltage of the fifth transistor,
A current having a value corresponding to a video signal is made to flow from the power supply to the signal line through the third transistor and the fifth transistor, and then the first scanning line is made inactive, whereby the first transistor Hold the gate voltage of the second scanning line, deactivate the first scanning line, deactivate the second scanning line, deactivate the second scanning line, and activate the third scanning line. And driving a current having a value corresponding to the video signal through the fourth transistor to the OLED. 17. In a display device in which a unit pixel includes a plurality of transistors and an OLED element, a gate electrode and a drain electrode of the first transistor are activated by activating a first scanning line and a second scanning line. After making a current through the second transistor and passing a current having a value corresponding to the video signal from the power source toward the signal line through the first transistor and the third transistor, the first scanning line is connected. By deactivating, the gate voltage of the first transistor is held, the first scanning line is deactivated, and then the second scanning line is deactivated with respect to the third transistor. Of the transistor, and a current having a value corresponding to the video signal is passed through the OLED through the fourth transistor. The driving method of an active matrix type OLED display device comprising 18. A display device in which a unit pixel includes a plurality of transistors and an OLED element, in which a first scanning line and a second scanning line are activated, and a gate electrode of the first transistor and a drain electrode of the fifth transistor are formed. Is turned on via the second transistor, and a predetermined bias voltage is applied to the gate voltage of the fifth transistor,
A current having a value corresponding to a video signal is made to flow from the power supply to the signal line through the third transistor and the fifth transistor, and then the first scanning line is made inactive, whereby the first transistor Hold the gate voltage of the second scanning line and deactivate the first scanning line, and then make the second scanning line inactive with respect to the third transistor and active with respect to the fourth transistor. A method of driving an active matrix type OLED display device, characterized in that a current having a value corresponding to the video signal is passed through the OLED through 19. A display device in which a unit pixel includes a plurality of transistors and an OLED element, and one of a source electrode and a drain electrode is connected to a gate electrode of a first transistor whose source electrode is connected to a power source, and the first electrode is connected to the gate electrode of the first transistor. The drain electrode of the transistor is connected to the gate electrode of the second transistor, the other of which is connected to the source electrode or the drain electrode, so that the voltage of the first scanning line is cut off from the second transistor. After being deactivated, one of the source electrode and the drain electrode is connected to the drain electrode of the first transistor, the other of the source electrode and the drain electrode is connected to the signal line, and connected to the gate electrode of the third transistor. The voltage of the second scanning line is deactivated so that the third transistor becomes non-conductive. One of the source electrode and the drain electrode is connected to the drain electrode of the first transistor, and the other of the source electrode and the drain electrode is connected to the gate electrode of the fourth transistor connected to the OLED element. A method of driving an active matrix type OLED display device, characterized in that a voltage of a scanning line is activated so that the fourth transistor element becomes conductive. 20. In a display device in which a unit pixel includes a plurality of transistors and an OLED element, one of a source electrode and a drain electrode is connected to a gate electrode of a first transistor whose source electrode is connected to a power source, and the first electrode is connected to the first electrode. The drain electrode of the transistor is connected to the gate electrode of the second transistor, the other of which is connected to the source electrode or the drain electrode, so that the voltage of the first scanning line is cut off from the second transistor. After being deactivated, one of the source electrode or the drain electrode is connected to the drain electrode of the first transistor, the other of the source electrode or the drain electrode is connected to the signal line, and the gate electrode of the third transistor and the source electrode are connected. Alternatively, one of the drain electrodes is connected to the drain electrode of the first transistor, The other of the source electrode or the drain electrode is connected to the gate electrode of the fourth transistor connected to the OLED element, and the voltage of the second scanning line is turned off by the third transistor,
An active matrix OLED characterized in that the fourth transistor element is made conductive.
Driving method of display device 21. In a display device in which a unit pixel is composed of a plurality of transistors and an OLED element, one of a source electrode and a drain electrode is connected to a drain electrode of the first transistor, and the other of the source electrode and the drain electrode is A second transistor connected to the other of the source electrode and the drain electrode of the second transistor, the other of the source electrode and the drain electrode of the third transistor, and the other of the source electrode and the drain electrode of the fourth transistor. 22. The active matrix type OLE according to claim 20, wherein a predetermined bias voltage is applied to the gate electrode.
Driving method of D display device 22. The predetermined bias voltage is the first bias voltage.
22. The method for driving an active matrix type OLED display device according to claim 16, wherein both the transistor and the fifth transistor are set to operate in a saturation region.