JP2002329641A - Variable capacity capacitor and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a variable capacitor that has an extremely small number of lattice defects in oxygen in the entire dielectric layer, and hence has an extremely small amount of dielectric loss, and to provide the manufacturing method of the variable capacitor. SOLUTION: In the variable capacity capacitor where a lower electrode layer 2, a dielectric layer 3 where a dielectric rate changes by applying an external control voltage, and an upper electrode layer 4 are deposited successively, the dielectric layer 3 is made of a Perovskite type oxide crystal particle containing at least Ba, Sr, and Ti, and the crystal particle is oriented randomly without being oriented in a specific direction. In addition, when the dielectric layer 3 is to be formed, an amorphous dielectric layer is formed on a ground dielectric layer 2 that is orientated in (110) at an extremely low temperature, and then is heat-treated to manufacture the variable capacity capacitor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention controls an electrostatic capacity by applying a voltage (hereinafter referred to as an external control voltage) to a dielectric layer from the outside to change the dielectric constant of the dielectric layer. More particularly, the present invention relates to a variable capacitor having a dielectric layer having a high rate of change in dielectric constant and having a small dielectric loss even at a high frequency, and a method for manufacturing the same.

[0002]

2. Description of the Related Art Heretofore, a varactor diode which changes its capacitance by applying a reverse bias to the diode has been used as a variable capacitance capacitor. Diodes are used in rectifier circuits and the like by utilizing the fact that current flows when a forward bias is applied to a PN junction. The above PN
There is a region called a depletion layer where neither electrons nor holes exist on the junction surface, and when a reverse bias is applied to the diode, both the electrons and holes are pulled in the direction away from the PN junction surface, so the depletion layer becomes thicker, The thickness of the depletion layer changes depending on the magnitude of the reverse bias. Since this depletion layer can be considered as a dielectric, if a reverse bias is applied to the diode, the thickness of the dielectric changes depending on the magnitude of the reverse bias, and as a result the capacitor is used as a capacitor. can do.

[0003] Varactor diodes are standardized especially for use as variable capacitance capacitors. Varactor diodes are used in telecommunications equipment as variable-capacitance capacitors. Is being promoted. Varactor diodes have high loss at high frequencies and thin depletion layers at low voltages, increasing leakage currents and, in principle, no longer functioning as capacitors, making it difficult to handle high-frequency circuits (high-frequency operation). .

[0004] Therefore, in order to construct an element that can be used as a variable capacitor even at high frequency operation (Ba _x Sr
Dielectric materials such as _1-x ) TiO ₃ (hereinafter abbreviated as BST) have been proposed (for example, see JP-A-11-3839). Since the rate of change of the capacitance of a variable capacitor using such a dielectric material as a dielectric layer is a function of the electric field strength applied to the dielectric layer, the dielectric layer used for the variable capacitor that changes the capacitance at a low voltage is used. Is usually several μ
m or less. In order to produce such a dielectric layer, a method such as a sputtering method, a sol-gel method, or a CVD method is used. It is considered effective to use a sputtering method to stably produce a large number of variable capacitance capacitors using a dielectric layer at low cost. In order to form a dielectric layer using a sputtering method, it is common to use a ceramic having the same composition as a target dielectric as a target. In such sputtering using a ceramic target, an RF sputtering apparatus is generally used, and a sputtering atmosphere in which O ₂ gas is mixed in addition to Ar gas is used. Normally, sputtering of a metal thin film is performed in an atmosphere using only Ar gas.However, in ceramics, oxygen is desorbed at the time of film formation, and as a result, the oxygen concentration of the formed dielectric layer is lower than the stoichiometric composition. This causes a large amount of oxygen lattice defects. In order to suppress the generation of such oxygen lattice defects, an O ₂ gas is introduced into the atmosphere during sputtering. Actually, the generation of oxygen lattice defects is not completely suppressed only by changing the sputtering atmosphere by introducing the O ₂ gas, and in order to further reduce the oxygen lattice defects, the temperature after sputtering is higher than the substrate temperature at the time of sputtering. Long-term heat treatment has been performed (for example, see Japanese Patent Application Laid-Open No. 9-31645).

Further, in order to suppress the deterioration of dielectric loss due to lattice defects of oxygen, there has been reported a method of adding Mn or the like to a dielectric layer in addition to heat treatment after sputtering (for example, W. Chang, et al., Mat. Res. Soc. Symp. Proc. Vo
l.541, (1999) 699).

[0006]

However, the above-described method of suppressing the deterioration of dielectric loss or the generation of oxygen lattice defects due to oxygen lattice defects requires a long heat treatment after sputtering. However, as a method of manufacturing a variable capacitor by improving productivity, there is a problem that the efficiency is low and the capacitor cannot be manufactured at low cost.

The present invention has been made in view of the above problems, and has as its object to reduce oxygen lattice defects,
An object of the present invention is to provide a variable capacitor having a dielectric layer with low dielectric loss.

Another object is to provide a method of manufacturing a variable capacitor having a dielectric layer with less oxygen lattice defects in a short time and at low cost without requiring a long-time heat treatment.

[0009]

According to the present invention, a variable electrode is formed by sequentially depositing a lower electrode layer, a dielectric layer whose permittivity changes by applying an external control voltage, and an upper lower electrode layer on a supporting substrate. In the capacitance capacitor, the dielectric layer is a perovskite oxide crystal particle containing at least Ba, Sr, and Ti, and the crystal particle is randomly oriented. The random orientation refers to a state in which the crystal grains have a certain orientation at the crystal grain level, but the crystal grains are not oriented on a specific surface when viewed from the entire dielectric layer.

[0010] In the perovskite oxide constituting the dielectric layer, the range of x in (Ba _x Sr _1-x ) TiO ₃ is 0.4 to 0.6.

The thickness of the dielectric layer is 1 μm or less, and the dielectric crystal particles constituting the dielectric layer are equiaxed, and the average particle size of the crystal particles is 0.5 μm or less. . The lower electrode layer is made of Pt, Au or a solid solution thereof with the (111) plane oriented on the substrate on which the dielectric layer is to be formed.

Further, a lower electrode layer made of Pt, Au or a solid solution thereof oriented on the (111) plane is formed on the supporting substrate, and then an amorphous dielectric layer is coated on the lower electrode layer. After that, the amorphous dielectric layer is crystallized by heat treatment to form a dielectric layer in which crystal grains are randomly oriented, and an upper electrode layer is formed on the dielectric layer. .

[0013]

As a result of repeated investigations by the present inventor, the dielectric layer has a thickness of 20.
An amorphous dielectric layer can be formed by sputtering at a low temperature of 0 ° C. or lower. Then, when crystallized by heat treatment,
It has been found that oxygen can be replenished in an amorphous state in which oxygen is more easily diffused than in a crystal, so that a short-time heat treatment can suppress lattice defects of oxygen and reduce loss.

That is, a variable capacitor according to the present invention is a variable capacitor having a lower electrode layer formed on both surfaces of a dielectric layer, wherein the thickness of the dielectric layer is 1 μm or less, and The body layer is composed of perovskite oxide crystal particles containing at least Ba, Sr, and Ti, and the crystal particles are randomly oriented.

In the variable capacitor, the dielectric crystal grains constituting the dielectric layer are equiaxed, and the average grain size of the crystal grains is 0.5 μm or less. Further, the variable capacitor according to the present invention is composed of Pt, Au or a solid solution thereof in which the lower electrode layer is oriented on the (111) plane on the substrate on which the dielectric layer is formed.

Thus, the variable capacitor has a dielectric layer with less lattice defects of oxygen and a small dielectric loss, and a variable capacitor capable of obtaining a predetermined capacitance by applying a control voltage from the outside. .

In addition, the present invention provides a method of manufacturing a variable capacitor having a dielectric layer with less oxygen lattice defects in a short time and at low cost without requiring a long heat treatment.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A variable capacitor according to the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows a cross section of a variable capacitor according to the present invention, and FIG. 2 is a plan view of a main part.

In FIG. 1, reference numeral 1 denotes a support substrate;
Reference numeral 22 denotes a lower electrode layer (in FIG. 1, simply denoted by reference numeral 2), reference numeral 23 denotes a lower terminal electrode layer, reference numerals 31 and 32 denote dielectric layers (referred to simply as reference numeral 3 in FIG. 1), 42
Denotes an upper electrode layer (in FIG. 1, simply denoted by reference numeral 4),
5 is a protective layer, and 6 and 7 are external terminals. As shown in FIG. 2, the capacitance generating region is an opposing portion where the dielectric layer 31 is sandwiched between the lower electrode layer 21 and the upper electrode layer 41, and the dielectric layer 32 is a lower electrode layer 22 and an upper electrode layer. This is an opposing portion sandwiched between the layers 42. In the figure, there are two capacitance generation areas a and b.

The support substrate 1 is a ceramic substrate such as alumina, a single crystal substrate such as sapphire, and the like, and has lower electrode layers 21 and 22 and a lower terminal electrode layer 23 formed on the surface thereof. In particular, the lower electrode layer forming the capacitance generating regions a and b
21 and 22 are made of Pt, Au or a solid solution thereof oriented to the (111) plane. Further, the substrate 11 and the lower electrode layers 21 and 22
And an adhesion layer such as Ti or TiO ₂ may be interposed between them. The film thickness of the lower electrode layers 21 and 22 and the lower terminal electrode layer 23 is 1 μm or more, and preferably 3 μm or more in order to reduce the loss due to the lower electrode layers 21 and 22. For example, as the lower electrode layer, a sapphire R single crystal substrate is used as the support substrate 1 so that the (111) plane of Pt is preferentially oriented, and the lower electrode layer 21 made of Pt at 150 to 600 ° C. 22 is formed by a sputtering method. Dielectric layers 31 and 32 are formed on the lower electrode layers 21 and 22, respectively.

The dielectric layers 31, 32 are made of at least Ba, Sr,
It is made of perovskite-type oxide crystal particles containing Ti and is formed in a random orientation. This dielectric layer 3
By applying an external control voltage to the dielectric layers 1 and 32, the dielectric constants of the dielectric layers 31 and 32 themselves can be variably controlled.

The crystal grains of the dielectric layers 31 and 32 are at 200 ° C.
An amorphous dielectric layer is formed by the following low-temperature sputtering, and is crystallized by a subsequent heat treatment. The perovskite-type oxide particles after crystallization have a random orientation (a state in which the dielectric crystal particles constituting the dielectric layer are not oriented on a specific crystal plane).

In the perovskite-type oxide constituting the dielectric layers 31 and 32, the range of x in (Ba _x Sr _{1 -x} ) TiO ₃ is 0.4 to 0.6. Here, when the range of x is 0.4 or less, the influence of SrTiO ₃ increases and the capacity change rate decreases, and when it is 0.6 or more, the effect of BaTiO ₃ increases and the temperature characteristics deteriorate.

The thickness of each of the dielectric layers 31 and 32 is set to 1 μm or less, and the average diameter of the dielectric crystal grains constituting the dielectric layer is set to 0.5 μm or less.

The reason why the thickness of the dielectric layers 31 and 32 is set to 1 μm or less is that if the thickness is larger than 1 μm, the time required for sputtering for forming a thin film becomes longer. This is because the applied voltage for changing the capacitance increases.

The reason why the average particle size of the crystal grains is set to 0.5 μm or less is that the dielectric constant of the dielectric increases depending on the particle size, and the loss is proportional to the dielectric constant for the same material. This is because, as the particle size increases, the dielectric constant increases, and as a result, the loss increases.

The dielectric layers 31 and 32 are manufactured, for example, as follows. A sintered body composed of perovskite-type oxide crystal particles containing at least Ba, Sr, and Ti is used as a sputtering target. The sputtering apparatus uses RF sputtering to sputter an insulating oxide sintered body. First, an amorphous dielectric layer having the same composition as the perovskite oxide is formed. In order to perform sputtering, the target and the support substrate 1 are set in a chamber of a sputtering apparatus. After evacuation, the support substrate 1 is heated by a heater on the back surface of the substrate. When performing sputtering at room temperature, the substrate may be water-cooled during sputtering without heating by a heater. In order to prevent desorption of oxygen from a film deposited on the substrate during sputtering, a reactive sputtering method using a mixed gas of argon and oxygen is used as a sputtering atmosphere. After the sputtering, the substrate is taken out of the chamber. As a result, an amorphous dielectric layer is obtained. Then, heat treatment is performed in an atmosphere furnace at 700 ° C. to 1000 ° C. for several tens of seconds to about one hour. By this heat treatment, the amorphous dielectric layer is crystallized, and a dielectric layer composed of a perovskite oxide not oriented in a specific plane direction is obtained. Incidentally, in the perovskite oxide constituting the dielectric layers 31 and 32, the range of x in (Ba _x Sr _1-x ) TiO ₃ is 0.4 to 0.6. Here, when the range of x is 0.4 or less, SrTi
The influence of O ₃ increases, and the rate of change of the dielectric constant when the above-described external control voltage is applied decreases. Also, at 0.6 or more
This is because the effect of BaTiO ₃ increases and the temperature characteristics deteriorate.

The thickness of the dielectric layers 31 and 32 is preferably 1 μm or less, and the average grain size of the dielectric crystal particles constituting the dielectric layers 31 and 32 in the film surface direction is 0.5 μm or less.

The reason why the thickness of the dielectric layers 31 and 32 is set to 1 μm or less is that if the thickness is larger than 1 μm, the time required for sputtering for forming a thin film becomes longer. This is because the applied voltage for changing the capacitance increases.

The upper electrode layers 41 and 42 and the upper terminal electrode layer 43 are formed over the upper surfaces of the dielectric layers 31 and 32 and the support substrate 1. The upper electrode layers 41 and 42 and the upper terminal electrode layer 43 are made of Pt, Au or a solid solution thereof. Further, an adhesion layer such as Ti or TiO ₂ may be interposed between the substrate 11 and the upper electrode layers 41, 42 and 43. The thickness of the upper electrode layers 41 and 42 is preferably 1 μm or more, and more preferably 3 μm or more in order to further reduce conductor loss.

In addition, the protective film 5 includes a lower terminal electrode layer 23,
The upper terminal electrode 43 is formed so as to expose a part thereof. As the protective film, SiO ₂ , SiN, BCB (benzocyclobutene), polyimide or the like is preferable. This protective film 5 protects not only mechanical shock from the outside but also
It plays a role in preventing deterioration due to humidity, contamination of chemicals, oxidation and the like.

The external terminals 6 and 7 can be exemplified by solder balls and metal bumps. Specifically, for example, a solder ball is formed on a portion where the lower terminal electrode layer 23 and the upper terminal electrode layer 24 are exposed, or a first bonding of a metal wire is performed, and a predetermined length is cut. A bump such as gold may be formed. In order to form solder balls as the external terminals 6 and 7, a thin film of Ni or Cr for preventing solder erosion may be formed on exposed portions of the lower terminal electrode layer 23 and the upper terminal electrode layer 43. . If it is assumed that soldering is performed only at the time of mounting, a thin film of Ni or Cr for preventing the above-mentioned solder erosion may be used as the external terminal.

In FIG. 2, the variable capacitance capacitor according to the present invention comprises a plurality of, for example, two capacitance generating regions a and b. That is, the capacitance generation area a is the lower electrode 2
1, a dielectric layer 31 and an upper electrode layer 41 are sequentially laminated, and the capacitance generating region b is composed of a lower electrode 22, a dielectric layer 3
2. The upper electrode layer 42 is formed of a sequentially laminated portion. Further, the capacitance generation region a and the capacitance generation region b are connected in parallel with each other. That is, the lower electrode layers 21 and 22
The lower terminal electrode layer 23 extending from the second terminal electrode layer is commonly used. Further, the upper terminal electrode layer 43 extending from the upper electrode layers 41 and 42 is commonly used. Therefore, from the terminal electrodes of the external terminals 6 and 7, a combined capacitance in which the capacitances of the two capacitance generating regions a and b are arranged in parallel can be obtained. Then, by applying a predetermined potential to the dielectric material of the dielectric layers 31 and 32 by applying an external control voltage, the dielectric layers 31 and 3 are applied.
2 can be variably controlled. That is, the dielectric constants of the dielectric layers 31 and 32 in the capacitance generating regions a and b are changed by the external control voltages supplied to the external terminals 6 and 7 described above. Then, the capacitance generation region is divided, and the area of a single capacitance generation region is reduced. That is, when an external control voltage is applied, the potential applied to the capacitance generating regions a and b has a smaller distribution in the regions, the voltage drop generated in the upper electrode layers 41 and 42 can be reduced, and the dielectric layer 31 , 32 can be applied with a stable and uniform external control voltage.

Such an operation is because the dielectric layers 31 and 32 are dielectric layers having few oxygen lattice defects as described above.

[0036]

EXAMPLE A sapphire R substrate was used as the support substrate 1, and Pt was used as the lower electrode layers 21, 22 (2). And
On the support substrate 1 on which the lower electrode layer 2 is formed, (Ba S
r) Sputtering using TiO ₃ target
A BST amorphous dielectric layer was deposited. In this sputtering method, the substrate was not heated by the heater. Therefore, the substrate temperature was room temperature, and the film formation time was 44 minutes to form the amorphous dielectric layer. After being taken out of the sputtering apparatus, a heat treatment was performed in the air at 900 ° C. for 1 minute to 600 minutes. As a result, the amorphous dielectric layer was crystallized to form a dielectric layer 3 (31, 32) made of perovskite-type oxide not oriented in a specific plane direction. Further, on the dielectric layer 3, upper electrode layers 41 and 42 (4) made of Au.
Was formed to form a capacitor. The lower terminal electrode layer 23 was formed at the same time when the lower electrode layer was formed, and the upper terminal electrode layer 43 was formed at the time of forming the upper electrode layer.

And such a variable capacitor is
The orientation of the lower electrode layer 2 made of Pt and the dielectric layer 3 was examined by X-ray diffraction. Further, the film thickness of the dielectric layer was measured by cross-sectional SEM and cross-sectional TEM observation, and the average particle diameter of the perovskite particles was measured. The measurement of the dielectric properties was performed using an impedance analyzer. Loss is 100MHz
Are shown in Table 1. The rate of change of the dielectric constant was measured when 10 V was applied.

[0038]

[Table 1]

As a comparative example, a BST thin film formed by sputtering at 400 ° C. and heat-treated was evaluated (Sample No. 4).
~ 6). The lower electrode layer 2 was oriented in the (111) plane in all samples.

The BST thin film which was formed by sputtering at room temperature and subjected to the heat treatment was not oriented on a specific surface (Sample Nos. 1 and 2). In the case where the film is formed by sputtering at 400 ° C. and subjected to heat treatment, the dielectric layer is oriented in the (110) plane. When the heat treatment time is as long as 600 minutes (sample No. 3), the BST dielectric layer is (11
1) Orient to the plane.

The BST thin film formed by sputtering at room temperature and subjected to heat treatment had a crystal grain size of 0.5 μm or less when subjected to a short-time heat treatment.
When the heat treatment is performed for a long time as described above, the thickness becomes 0.5 μm or more due to the growth of crystal grains.

The samples subjected to heat treatment at 400 ° C. and subjected to heat treatment (Sample Nos. 4 to 6) have columnar crystals that are long in the film thickness direction, and the crystal grains in the film surface direction are short. It was 0.5 μm or less when heat treatment was performed for a long time, but was 0.5 μm or more when heat treatment was performed for a long time. The dielectric loss was obtained by performing sputter deposition at room temperature and performing a short-time heat treatment (sample numbers 1 and 2).
Was less than 1%, but a film formed by sputtering at room temperature and subjected to a heat treatment for a long time (processing coronal number 3) or 40%
Films formed by sputtering at 0 ° C (Sample Nos. 4 to 6)
Was 1% or more. This is because, when the crystal grains grow due to the heat treatment for a long time, the dielectric constant increases, and conversely, the dielectric loss increases. In the case where a film was formed by sputtering at 400 ° C. and heat treatment was performed for a short time, the lattice defects of oxygen did not decrease and the dielectric loss did not decrease. An external control voltage was applied to the dielectric layer, and the amount of change in the dielectric constant showed a high value of 20% or more regardless of the manufacturing conditions.

As described above, the dielectric layer 3 (31, 32) constituting the variable capacitor of the present invention is composed of the lower electrode layer 2 (21, 21) made of Pt, Au or their solid solution oriented on the (111) plane. 22) On the other hand, the dielectric layer 3 in which the deterioration of the dielectric loss due to oxygen lattice defects or the generation itself of oxygen lattice defects is suppressed can be obtained by short-time treatment.

Further, a large amount of variable capacitance capacitors can be efficiently used without requiring a long heat treatment conventionally required.
It can be manufactured at low cost. In the above-described embodiment,
Although the description has been made by taking the variable capacitance capacitor having a structure in which the capacitance generation region is divided into a plurality as an example, the present invention is not limited to this structure, and all structures having a lower electrode layer, a dielectric layer, and an upper electrode layer are variable. It can be applied to capacitance capacitors.

[0045]

As described above in detail, in the variable capacitor according to the present invention, the dielectric layer is composed of Pt with (111) orientation,
Sputtering at a low temperature to form an amorphous dielectric layer on the lower electrode layer made of Au or their solid solution, then forming a dielectric layer that is crystallized by a short heat treatment but is not oriented in a specific plane orientation I do. Therefore, it is possible to suppress the deterioration of the dielectric loss due to the oxygen lattice defect or the generation itself of the oxygen lattice defect. Moreover, a large amount of variable capacitance capacitors can be efficiently and inexpensively manufactured without requiring long-time heat treatment.

[Brief description of the drawings]

FIG. 1 is a sectional view of a variable capacitor according to the present invention.

FIG. 2 is a plan view of a main part of a variable capacitor according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Support substrate 21, 22, 2 ... Lower electrode layer 31, 32, 3 ... Dielectric layer 41, 42, 4 ... Upper electrode layer 5 ... Protective film 6, 7, ...・ External terminal

Claims (5)

[Claims] 1. A variable capacitor comprising a lower electrode layer, a dielectric layer having a dielectric constant changed by application of a voltage, and an upper electrode layer sequentially deposited on a supporting substrate, wherein the dielectric layer comprises at least Ba, Sr And a perovskite oxide crystal particle containing Ti, wherein the crystal particles are randomly oriented. 2. The perovskite-type oxide constituting the dielectric layer, wherein _x in (Ba _x Sr _{1 -x} ) TiO ₃ ranges from 0.4 to 0.6. Variable capacitor. 3. The dielectric layer according to claim 1, wherein said dielectric layer has a thickness of 1 μm or less, said dielectric crystal particles constituting said dielectric layer are equiaxed, and said crystal particles have an average particle size of 0.5 μm or less. 3. The variable capacitor according to claim 1, wherein the variable capacitor is provided. 4. The variable capacitor according to claim 1, wherein the lower electrode layer is made of Pt, Au or a solid solution thereof oriented on the (111) plane on the substrate on which the dielectric layer is formed. 5. A method according to claim 1, wherein a P-oriented (111) plane is formed on a supporting substrate.
t, forming a lower electrode layer made of Au or a solid solution thereof, then depositing an amorphous dielectric layer on the lower electrode layer, and crystallizing the amorphous dielectric layer by heat treatment. Forming a dielectric layer in which crystal grains are randomly oriented, and forming an upper electrode layer on the dielectric layer.