JP2002319685A - Semiconductor device and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which is capable of relaxing the stresses applied to it, when a wire bonding operation is carried out and superior in breakdown voltage stability, and to provide a manufacturing method therefor. SOLUTION: P<+> -anode layers 2 are selectively formed on the main surface layer of an n-type semiconductor substrate 100, an interlayer film 7 is formed on each surface of the p<+> -anode layers 2, and an anode electrode 5 of aluminum- silicon film is formed on the interlayer films 7 and the n-type semiconductor substrate 100; a Schottky junction 4 is formed on an interface between the surface of the n-type semiconductor substrate 100, sandwiched between the p<+> -anode layers 2 and the anode electrode 5; the height 21 of the surface of the anode electrode 5 on the p<+> -anode layers 2 is set higher than the height 22 of the surface of the anode electrode 5 on the Schottky junction 4; and a force applied to the anode electrode 5 on the Schottky junction 4 by a bonding wire 14 when a bonding operation is carried out can be reduced. Therefore, a leakage current is restrained from increasing at a Schottky junction 4, and the breakdown voltage of this semiconductor device can be prevented from decreasing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as a diode used for a power converter.

[0002]

2. Description of the Related Art Power semiconductor devices are used in various applications such as inverters, and their applications are expanding. In recent years, switching elements such as IGBTs (insulated gate bipolar transistors), which have a high withstand voltage, a large current capacity, and can operate at a high frequency, have been developed. As a result, even power diodes can operate at a high frequency and generate little loss. High-speed reverse recovery characteristics are required. As a diode that achieves a fast reverse recovery characteristic, for example, an MPS (Merg PiN Schottk) shown in FIG.
y) The diode and the SFD (Sof
t and Fast Recovery Diode
Diodes such as e) have been improved in reverse recovery characteristics. Hereinafter, the SFD is referred to as an SFD diode.

FIGS. 18 and 19 are views showing bonding of wires in a schematic sectional structure of an active region of an MPS diode and an SFD diode, respectively. For a widely used PiN diode (not shown), FIG.
Is characterized in that the p ⁺ anode layer 52 is selectively formed on one main surface of the semiconductor substrate 200. The contact portion between the region where the p ⁺ anode layer 52 is not formed and the anode electrode 55 becomes the Schottky junction region 54, and since the injection of holes does not occur at the time of forward bias, the reverse recovery peak current (Irp) can be suppressed small. And high speed reverse recovery characteristics can be achieved.

On the other hand, the SFD diode of FIG. 19 has a lower impurity concentration and a shallower diffusion depth than the p ⁺ anode layer 52 on the surface of the semiconductor substrate 200 on the side where the p ⁺ anode layer 52 of the MPS diode is formed. A p ^- layer 61 is formed. At the time of forward bias, injection of holes from the p ⁻ layer 61 is suppressed, so that the reverse recovery peak current (Irp) can be suppressed small, and high-speed reverse recovery characteristics can be achieved. Also, p
^{Since the} layer 61 is provided, the leakage current can be reduced as compared with the MPS diode.

[0005]

In the above-described MPS diode and SFD diode, a wire 64 for obtaining electrical contact is bonded on the anode electrode 55. Due to the impact at the time of bonding the wire 64, the portion A, which is the Schottky junction region 54 of the MPS diode, or the portion B, which is the shallow diffusion p ⁻ layer 61 of the SFD diode.
A defect is likely to occur in the portion, and a defect such as deterioration in withstand voltage is likely to occur.

The cause is that when bonding a wire to an electrode, pressure is applied between the electrode and the wire, and this pressure causes a defect at the interface between the electrode and the n ⁻ layer. The defect forms a recombination center, and electrons in the conduction band flow into the defect to increase leakage current. In particular, when a reverse bias state occurs and the electric field applied to the interface between the electrode and the n ⁻ layer increases,
The width of the Schottky barrier is reduced. Therefore, the probability of electrons passing through the Schottky barrier and transiting to the recombination center increases. As this probability increases, the donnel current flowing through the recombination center increases. It is considered that since the tunnel current becomes a part of the leakage current, the leakage current increases, and as a result, the breakdown voltage decreases.

Also, in the case of the SFD diode, if a defect occurs at the interface of the p ⁻ layer due to pressure, a phenomenon similar to that in the case of the MPS diode occurs, and the leakage current increases and the breakdown voltage decreases. Can be SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor device which solves the above-mentioned problems, alleviates an impact at the time of wire bonding, and has excellent withstand voltage stability, and a method of manufacturing the same.

[0008]

In order to achieve the above object, an electrode layer formed from one surface of a semiconductor substrate of the first conductivity type and a surface layer selectively formed on one surface layer of the semiconductor substrate. Semiconductor device, comprising: a first region of the second conductivity type, formed in the first region, and a second region forming a Schottky junction with the electrode layer formed on the surface layer of the semiconductor substrate sandwiched between the first regions. Wherein the surface height of the electrode layer on the first region is higher than the surface height of the electrode layer on the second region.

Further, by forming an interlayer film between the first region and the electrode layer, the surface height of the electrode layer on the first region can be made higher than the surface height on the second region. I do. In addition, the hardness of the interlayer film is greater than the hardness of the electrode layer. Further, the surface height of the first region is higher than the surface height of the second region. Further, the first region and the second region have the same surface height, and the surface height of the electrode layer on the first region is higher than the surface height of the electrode layer on the second region.

An electrode layer formed on one surface of a semiconductor substrate of the first conductivity type; a first region of a second conductivity type selectively formed on one surface layer of the semiconductor substrate; A second region forming a Schottky junction with the electrode layer formed on a surface layer of the semiconductor substrate sandwiched between one region, wherein the electrode layer is formed on the first region. The first electrode layer formed on the second region and the second electrode layer formed on the second region, the hardness of the member forming the first electrode layer is the hardness of the member forming the second electrode layer. The first electrode layer and the second electrode layer have the same surface height.

A first region of a second conductivity type selectively formed on one surface layer of the semiconductor substrate of the first conductivity type;
A third region of a second conductivity type that is thinner than a first region formed in a surface layer of the semiconductor substrate and that is smaller than an impurity concentration of the first region, between the first region and the third region; A semiconductor device comprising an electrode layer formed on
The surface height of the electrode layer on the first region is higher than the surface height of the electrode layer on the second region.

[0012] Further, an interlayer film is formed between the first region and the electrode layer, so that the surface height of the electrode layer on the first region is reduced to the surface of the electrode layer on the second region. Higher than the height. In addition, the hardness of the interlayer film is greater than the hardness of the electrode layer. Also, the surface height of the first region is:
The height is higher than the surface height of the third region.

The first region and the third region have the same surface height, and the electrode layer on the first region has a surface height of:
The height is higher than the surface height of the electrode layer on the third region. A first region which is a second conductivity type semiconductor region formed on one surface layer of the first conductivity type semiconductor substrate; and a first region having a thickness of the first region formed on the surface layer of the semiconductor substrate sandwiched between the first regions. A third region, which is a second conductive semiconductor region that is thinner and smaller than the impurity concentration of the first region, a first main electrode formed on the first region, and a second main electrode formed on the third region. Wherein the hardness of the member forming the first main electrode is greater than the hardness of the member forming the second main electrode, and the surface height of the first main electrode and the second main electrode is higher. Make the same.

Further, for each of the plurality of first regions separated from each other, the surface height of the electrode layer formed on the first region is increased.
An electrode layer formed from one surface of the first conductivity type semiconductor substrate; a second conductivity type first region selectively formed on one surface layer of the semiconductor substrate; A method of manufacturing a semiconductor device, comprising: a second region for forming a Schottky junction with the electrode layer formed on a surface layer of the semiconductor substrate sandwiched therebetween, wherein an interlayer film is formed on the first region And forming the electrode layer on the entire surface, so that the surface height of the electrode layer on the first region is higher than the surface height of the main electrode on the second region. .

An electrode layer formed on one surface of the semiconductor substrate of the first conductivity type; a first region of the second conductivity type selectively formed on one surface layer of the semiconductor substrate; A method of manufacturing a semiconductor device, comprising: a second region for forming a Schottky junction with the electrode layer formed on a surface layer of the semiconductor substrate sandwiched between one region; Selectively forming, a step of selectively oxidizing using the nitride film as a mask, a step of removing the nitride film and forming a first region by ion implantation, and removing the selective oxide film. Forming the concave portion of the semiconductor substrate at the position where the selective oxide film is formed, and forming an electrode layer on the entire surface, thereby reducing the surface height of the electrode layer on the first region;
Making the electrode layer higher than the surface height of the electrode layer on the second region.

An electrode layer formed on one surface of a semiconductor substrate of the first conductivity type; a first region of a second conductivity type selectively formed on one surface layer of the semiconductor substrate; A second region for forming a Schottky junction with the electrode layer formed on a surface layer of the semiconductor substrate sandwiched between the first region and a second region for forming a Schottky junction; Forming a main electrode film having the same thickness on the two regions, and removing a surface layer of the electrode film on the second region, thereby forming a surface height of the electrode layer on the first region. Making the height higher than the surface height of the electrode layer on the second region.

An electrode layer formed on one surface of the semiconductor substrate of the first conductivity type; a first region of the second conductivity type selectively formed on one surface layer of the semiconductor substrate; A method of manufacturing a semiconductor device, comprising: a second region forming a Schottky junction with the electrode layer formed on a surface layer of the semiconductor substrate sandwiched between one region; Forming a first interlayer film to be a first electrode layer having a high hardness, forming an electrode film to be a second electrode layer over the entire surface, and removing the electrode film until the second electrode layer is exposed. And making the surface heights of the first electrode layer and the second electrode layer the same.

A first region of the second conductivity type selectively formed on one surface layer of the semiconductor substrate of the first conductivity type, and a first region of the semiconductor substrate sandwiched between the first regions. A method of manufacturing a semiconductor device, comprising: a third region of a second conductivity type, which is thinner than a thickness of a region and smaller than an impurity concentration of a first region; and a main electrode formed on the first region and the third region. Forming an interlayer film on the first region and forming a main electrode on the entire surface, thereby reducing the surface height of the main electrode on the first region to the surface height of the main electrode on the third region. And a step of increasing the height.

A first region of the second conductivity type selectively formed on one surface layer of the semiconductor substrate of the first conductivity type, and a first region of the semiconductor substrate sandwiched between the first regions. A method of manufacturing a semiconductor device, comprising: a third region of a second conductivity type, which is thinner than a thickness of a region and smaller than an impurity concentration of a first region; and a main electrode formed on the first region and the third region. And selectively forming a nitride film on the semiconductor substrate,
Selectively oxidizing the nitride film as a mask, removing the nitride film, and forming a first region by ion implantation;
Removing the selective oxide film to form a concave portion of the semiconductor substrate where the selective oxide film is formed; and forming a main electrode over the entire surface, thereby increasing the surface height of the main electrode on the first region. Making the height higher than the surface height of the main electrode on the second region.

A second region of the second conductivity type selectively formed on one surface layer of the semiconductor substrate of the first conductivity type, and a first region of the semiconductor substrate sandwiched between the first regions is formed on the first layer. A method of manufacturing a semiconductor device, comprising: a third region of a second conductivity type, which is thinner than a thickness of a region and smaller than an impurity concentration of a first region; and a main electrode formed on the first region and the third region. Forming an electrode film serving as a main electrode having the same thickness on the first region and the second region; and removing a surface layer of the electrode film on the second region, thereby forming the first region. Making the surface height of the upper main electrode higher than the surface height of the main electrode on the second region.

A first region of the second conductivity type selectively formed on one surface layer of the semiconductor substrate of the first conductivity type, and a first region of the semiconductor substrate sandwiched between the first regions. A method of manufacturing a semiconductor device, comprising: a third region of a second conductivity type, which is thinner than a thickness of a region and smaller than an impurity concentration of a first region; and a main electrode formed on the first region and the third region. Forming a first interlayer film serving as a first main electrode having a high hardness of the member on the first region; forming an electrode film serving as a second main electrode on the entire surface; Removing the main electrode until it is exposed, and making the surface heights of the first main electrode and the second main electrode the same.

The main electrode or the first main electrode and the second main electrode may be formed by coating an aluminum / silicon film and annealing at a low temperature. As described above, the surface height of the main electrode (the anode electrode 5 described later) on the first region (the p ⁺ anode layer 2 described later) is changed to the second region and the third region (the Schottky junction portion 4 described later). By making the surface height of the main electrode on the p ⁻ layer 11) higher, the impact at the time of wire bonding is less likely to be transmitted to the Schottky junction and the p ⁻ layer,
The rate of withstand voltage deterioration can be reduced.

The first main electrode on the first region is made harder than the second main electrode on the second and third regions, so that the first
Even if the surface heights of the main electrode and the second main electrode are the same, the impact during wire bonding is less likely to be transmitted to the Schottky junction and the p ⁻ layer, and the rate of breakdown voltage degradation can be reduced.

[0024]

FIG. 1 is a sectional view of a main part of a semiconductor device according to a first embodiment of the present invention. This semiconductor device is M
This is the case of the PS diode. A plurality of p ⁺ anode layers 2 are selectively formed on a surface layer of one main surface of n semiconductor substrate 100, an interlayer film 7 is formed on p ⁺ anode layer 2, and an upper surface of interlayer film 7 and n semiconductor substrate 100 are formed. The anode electrode 5 is formed thereon with an aluminum / silicon film. A Schottky junction 4 is formed at the interface between the surface of n semiconductor substrate 100 sandwiched between p ⁺ anode layers 2 and anode electrode 5. An n ⁺ cathode layer 3 is formed on the surface layer on the other main surface of n semiconductor substrate 100, and a cathode electrode 6 is formed on n ⁺ cathode layer 3.
Note that n sandwiched between the p ⁺ anode layer 2 and the n ⁺ cathode layer 3
The semiconductor substrate is the n ⁻ drift layer 1.

By forming the interlayer film 7, the surface height 21 of the anode electrode 5 on the p ⁺ anode layer 2 can be made higher than the surface height 22 of the anode electrode 5 on the Schottky junction 4. As a result, as shown in FIG.
When bonding is performed, the force for pressing the recess 24 of the anode electrode 5 on the Schottky junction 4 with the wire 14 is
Even when the wire 14 and the recess 24 come into contact with each other, the stress is relaxed, and the increase in the leakage current at the Schottky junction 4 is suppressed.
A decrease in withstand voltage can be prevented.

The width 27 at the bottom of the interlayer film 7 depends on the pressing force (shock) applied to the Schottky junction 4 during bonding.
In order to alleviate this, the width 26 of the surface of the p ⁺ anode layer 2 is
Make it narrower. The interlayer film 7 is made of PSG (Phosph).
An insulating film or a metal film such as an or solicited glass film.

This interlayer film 7 may be made of the same material as that of the anode electrode 5. However, if it is made of a material harder than the material of the anode electrode 5, the projections 23 of the anode electrode 5 may be subjected to pressure (impact) during bonding. Since the rate of deformation is smaller than in the case of the same material, it is more effective. Also, in the figure, the case where the interlayer films 7 are provided on all the p ⁺ anode layers 2 is shown.
May be provided. The interval between the interlayer films 7 is preferably formed in a range of about 1 μm to 100 μm. This is 1μ
When the pitch is less than m, the width 27 of the interlayer film 7 becomes too narrow, so that the anode electrode 5 on the p ⁺ anode layer 2 is easily crushed at the time of bonding, and the concave portion 24 of the anode electrode 5 on the Schottky junction 4 is removed. , And pressurized by a wire (not shown). On the other hand, if it exceeds 100 μm, the interlayer film 7
Of the anode electrode 5 on the Schottky junction 4 sandwiched between the interlayer films 7 during bonding.
Is to be pressed with a wire. In addition, it is preferable that this range is from 10 μm to 30 μm, since the above-mentioned problem hardly occurs.

Also, p⁺Anode electrode on anode layer 2
5 and an anodization on the Schottky junction 4
Difference in surface height 22 of gate electrode 5 (thickness 27 of interlayer film 7)
Is p ⁺1 when the pitch of the anode layer 2 is as narrow as several μm.
μm, and 5 if the pitch is as wide as several tens μm or more.
It is good to be about μm or less. Note that the above n⁺Cathode layer
6 and p⁺N within the n semiconductor substrate 100 between the anode layers 2
⁺In contact with the cathode layer 3, n⁺From the concentration of the cathode layer 3
An n buffer layer that is low and higher than the concentration of the n semiconductor substrate 100
It is of course also possible to use an MPS diode provided with.

The pitch of the p ⁺ anode layer 2 constituting the MPS diode is in the range of 1 μm to 30 μm.
The diffusion depth is about 3 μm to 4 μm. Also, the Schottky ratio [(total surface area of the Schottky junction)] ÷
(Total surface area including the Schottky junction and the p ⁺ anode layer) is about 20% to 70%. Although not shown, the interlayer film 7 is harder than the anode electrode 7,
It is formed of a conductive member, and this interlayer film 7 is exposed and used as a part of the anode electrode, and the anode electrode 7 is etched so that the thickness of the anode electrode 5 becomes smaller than the thickness of the interlayer film 7. Thus, even when a step is provided, the same effect as described above can be obtained.

FIGS. 2A to 2C show a method of manufacturing a semiconductor device according to a second embodiment of the present invention. FIGS. 2A to 2C are cross-sectional views of main steps in the order of steps. This manufacturing method is a method for manufacturing the semiconductor device of FIG. n semiconductor substrate 100
The n ⁺ cathode layer 3 is formed on the back side of the substrate. A plurality of p ⁺ anode layers 2 are formed by selectively ion-implanting p-type impurities such as boron and BF ₂ into the surface side of the n-semiconductor substrate 100 and performing heat treatment. n where p ⁺ anode layer 2 is not formed
The semiconductor substrate 100 becomes the n ⁻ drift layer 1 (FIG. 3A).

Next, an interlayer film 7 which is a metal film is formed on the p ⁺ anode layer 2. This interlayer film 7 may be an insulating film such as a PSG film (FIG. 4B). Next, p
^An anode electrode 5 is formed on the ⁺ anode layer 2 and the n ^- drift layer 1. The anode electrode 5 is formed by sputtering or vapor-depositing an aluminum silicon (aluminum containing silicon of about 1 to 3 wt%) film by sputtering or vapor deposition.
Anneal at a low temperature of about 00 ° C. The annealing time is about 30 minutes to 2 hours. By this low temperature annealing, n ⁻
A Schottky junction 4 is formed at the interface between the drift layer 1 and the anode electrode 5. If the annealing temperature exceeds 500, the Schottky junction 4 is not formed, and a p ⁻ layer is formed on the surface layer of the n ⁻ drift layer 1. Also, 350
If the temperature is lower than 100 ° C., the aluminum / silicon film and the n semiconductor substrate 100
Is not good. Next, a cathode electrode 6 is formed on the n ⁺ cathode layer 3 (FIG. 3C).

As described with reference to FIG. 1, this interlayer film 7 is
If a metal (for example, molybdenum, tungsten, or the like) harder than the aluminum / silicon film forming the anode electrode 5, the protrusions 23 of the anode electrode 5 are less likely to be crushed. FIG.
FIG. 9 is a sectional view of a main part of a semiconductor device according to a third embodiment of the present invention. This semiconductor device is an MPS diode.

A plurality of recesses 24 are formed on one main surface of n semiconductor substrate 100, and a plurality of protrusions 2 on which no recess 24 is formed are formed.
The p ⁺ anode layer 2 is formed on each of the three surface layers, and the anode electrode 5 is formed on the p ⁺ anode layer 2 and the recess 24. Concave portion 2 sandwiched between p ⁺ anode layer 2
The Schottky junction 4 is formed at the interface between the surface of the n-type semiconductor substrate 100 and the anode electrode 5. An n ⁺ cathode layer 3 is formed on the surface layer on the other main surface of n semiconductor substrate 100, and a cathode electrode 6 is formed on n ⁺ cathode layer 3.

Due to the formation of the recess 24, the surface height 21 of the anode electrode 5 on the p ⁺ anode layer 2 formed on the projection 23 is reduced by the anode electrode on the Schottky junction 4 formed on the recess 24. 5 can be higher than the surface height 22.
Here, the reference of the surface height was the surface of the n-semiconductor substrate 100 where no concave portion was formed. As a result, as described above,
When wire bonding is performed, the force of pressing the concave portion 24 of the anode electrode 5 on the Schottky junction 4 with a wire (not shown) is reduced, and an increase in leakage current at the Schottky junction 4 is suppressed, thereby preventing a reduction in withstand voltage. it can.

The pitch of the projections 23 is the same as the pitch of the p ⁺ anode layer 2. The depth of the concave portion 24 (that is, the step between the convex portion 23 and the concave portion 24) is 0.8 μm.
To 5 μm. This depends on the thickness of the selective oxide film as described with reference to FIG. 4A to 4C show a method of manufacturing a semiconductor device according to a fourth embodiment of the present invention. FIGS. 4A to 4C are cross-sectional views of main steps in the order of steps. This manufacturing method is a method for manufacturing the semiconductor device of FIG.

On the back side of the semiconductor substrate 100, n⁺Casor
A layer 3 is formed. a nitride film 8 on the surface side of the n semiconductor substrate
After patterning and oxidation, the nitride film 8 is not formed.
The thick selective oxide film 9 (LOCOS: Local)
 Oxidation of Silicon
(FIG. 7A). Next, after the nitride film 8 is removed,
Boron or BF using the selective oxide film 9 as a mask _TwoSuch as p-type
Impurity is ion-implanted and ion activation heat treatment is performed.⁺
The anode layer 2 is formed. This ion activation heat treatment
It does not matter even after the removal of the selective oxide film in the next step.
(B)).

Next, the selective oxide film 9 is removed, a concave portion 26 is formed on the surface of the n semiconductor substrate 100 on the anode side, and then the anode electrode 5 and the cathode electrode 6 are formed on both surfaces of the n semiconductor substrate 100, respectively. . This anode electrode 5
Is formed by sputtering or evaporating the above-mentioned aluminum / silicon film and annealing it at a low temperature. As described above, the Schottky junction 4 is formed at the interface between the n ⁻ drift layer 1 and the anode electrode 2 by the low-temperature annealing (FIG. 3C).

As described above, by removing the selective oxide film 9,
The surface of the Schottky junction 4 becomes a concave portion 26, and the surface of the p ⁺ anode layer 2 becomes a convex portion 25. In order to form the anode electrode 5 on the surface of the unevenness, the surface of the anode electrode 5 on the p ⁺ anode layer 2 becomes a projection 23 and the surface of the anode electrode 5 on the Schottky junction 4 becomes a depression 24. .

As a result, the surface height 21 of the anode electrode 5 on the p ⁺ anode layer 2 can be made higher than the surface height 22 of the anode electrode 5 on the Schottky junction 4. FIG.
FIG. 14 is a sectional view of a main part of a semiconductor device according to a fifth embodiment of the present invention. This semiconductor device is an MPS diode.
A plurality of p ⁺ anode layers 2 are selectively formed on the surface layer of one main surface of n semiconductor substrate 100, and anode electrode 5 is formed of an aluminum / silicon film on p ⁺ anode layer 2 and n semiconductor substrate 100. Form. A Schottky junction 4 is formed at the interface between the surface of n semiconductor substrate 100 sandwiched between p ⁺ anode layers 2 and anode electrode 5. Schottky joint 4
A recess 24 is formed in the upper anode electrode 5. An n ⁺ cathode layer 3 is formed on the surface layer on the other main surface of n semiconductor substrate 100, and a cathode electrode 6 is formed on n ⁺ cathode layer 3.
Note that n sandwiched between the p ⁺ anode layer 2 and the n ⁺ cathode layer 3
The semiconductor substrate is the n ⁻ drift layer 1.

By the formation of the recess 24, the surface height 21 of the anode electrode 5 on the p ⁺ anode layer 2 can be made higher than the surface height 22 of the anode electrode 5 on the Schottky junction 4. It is preferable that the concave portion 24 be formed wider than the Schottky junction 4 so as to cover the p ⁺ anode layer 2 because the convex portion 23 is formed in the p ⁺ anode layer 2.

If the dimensions of the projections 23 are the same as those in FIG. 1, the same effects as in FIG. 1 can be obtained. 6A to 6C show a method of manufacturing a semiconductor device according to a sixth embodiment of the present invention. FIGS. 6A to 6C are cross-sectional views showing main steps in the order of steps. This manufacturing method is a method for manufacturing the semiconductor device of FIG.

The n ⁺ cathode layer 3 is formed on the back surface of the n semiconductor substrate 100. p-type impurities such as boron and BF ₂ are selectively ion-implanted into the surface side of the n-semiconductor substrate 100;
Heat treatment is performed to form a plurality of p ⁺ anode layers 2. p
^The n-semiconductor substrate 100 sandwiched between the ⁺ anode layer 2 and the n ⁺ cathode layer 3 becomes the n ⁻ drift layer 1 (FIG. 3A).

Next, an anode electrode 5 is formed on the p ⁺ anode layer 2 and the n ⁻ drift layer 1. Anode electrode 2
Is formed by forming the above-described aluminum / silicon film by sputtering or vapor deposition and performing the above-described low-temperature annealing.
As described above, the Schottky junction 4 is formed at the interface between the n ⁻ drift layer 1 and the anode electrode 2 by the low-temperature annealing. Next, a resist 10 is formed on the anode electrode 5 on the p ⁺ anode layer 2 (FIG. 2B).

Next, using the resist 10 as a mask, the anode electrode 5 is removed by etching so as not to reach the n ⁻ drift layer 1, and a recess 24 is formed in the anode electrode 5 on the Schottky junction 4. The resist 10 is removed, and n ⁺
The cathode electrode 6 is formed on the cathode layer 3. (Figure (c)). The low-temperature annealing may be performed after the resist 10 is removed.

Anode electrode 5 on Schottky junction 4
By forming the concave portion 24 in the anode, the surface height 21 of the anode electrode 5 on the p ⁺ anode layer 2 is
It can be higher than the surface height 22 of the upper anode electrode 5. FIG. 7 is a sectional view showing a main part of a semiconductor device according to a seventh embodiment of the present invention. This semiconductor device is an MPS diode.

[0046] The p ⁺ anode layer 2 selectively plurality formed in the surface layer of the one main surface of n semiconductor substrate 100, the first anode electrode 5a on the p ⁺ anode layer 2, p ⁺ anode layer 2
A second anode electrode 5b is formed on n semiconductor substrate 100 (n ⁻ drift layer 1) sandwiched between them so as to have a flat surface. A Schottky junction 4 is formed at the interface between the surface of n ⁻ drift layer 1 sandwiched between p ⁺ anode layers 2 and second anode electrode 5b. An n ⁺ cathode layer 3 is formed on the surface layer on the other main surface of n semiconductor substrate 100, and a cathode electrode 6 is formed on n ⁺ cathode layer 3.

The first anode electrode 5a formed on the p ⁺ anode layer 2 has a higher hardness (harder member) than the second anode electrode 5b formed on the Schottky junction 4. When a wire (not shown) is bonded, the first anode electrode 5a having a hard pressure applied to the wire.
And the pressing force of the Schottky joint 4 can be reduced. The member of the first anode electrode 5a is preferably made of molybdenum or tungsten, and the member of the second anode electrode 5b is preferably made of aluminum or silicon.

FIGS. 8A to 8C show a method of manufacturing a semiconductor device according to an eighth embodiment of the present invention. FIGS. 8A to 8C are cross-sectional views showing main steps in the order of steps. This manufacturing method is shown in FIG.
-It is a manufacturing method of the semiconductor device of FIG. n semiconductor substrate 1
The n ⁺ cathode layer 3 is formed on the back side of the layer No. 00. A plurality of p ⁺ anode layers 2 are formed by selectively ion-implanting p-type impurities such as boron and BF ₂ into the surface side of the n-semiconductor substrate 100 and performing heat treatment. The n semiconductor substrate sandwiched between the p ⁺ anode layer 2 and the n ⁺ cathode layer 3 becomes the n ⁻ drift layer 1 (FIG. 3A).

Next, on the p ⁺ anode layer 2, aluminum
A second anode electrode 5a harder than molybdenum or tungsten harder than silicon is formed. Next, a soft second anode electrode 5 b is formed on the p ⁺ anode layer 2 and the n ⁻ drift layer 1. The second anode electrode 5b is formed by depositing the above-mentioned aluminum / silicon film by vapor deposition and annealing it at a low temperature. Under these annealing conditions, n ⁻
A Schottky junction 4 is formed at the interface between the drift layer 1 and the second anode electrode 5b (FIG. 2B).

Next, the second anode electrode 5b is flattened until the first anode electrode 5a is exposed. n ⁺
A cathode electrode 6 is formed on the cathode layer 3 (FIG. 3C). As described above, even if the surface heights of the hard first anode electrode 5a and the soft second anode electrode 5b are the same, the pressing force at the time of bonding is strongly transmitted to the hard first anode electrode 5a, and the soft second anode electrode 5a is soft. Anode electrode 5
The pressing force transmitted from b to the Schottky joint 4 can be reduced.

FIG. 9 is a sectional view showing a main part of a semiconductor device according to a ninth embodiment of the present invention. This semiconductor device is an SFD diode. The difference from FIG. 1 is that a thin p ⁻ layer 11 is formed at a position corresponding to the Schottky junction 4. By forming the same interlayer film 7 as in FIG. 1, the same effect as in FIG. 1 can be obtained. The impurity concentration of this p ^- layer 11 is
It is lower than the impurity concentration of the p ⁺ anode layer 2 and higher than the concentration of the n semiconductor substrate 100 (n ⁻ drift layer 1). Further, the depth of p ⁻ layer 11 is made shallower than that of p ⁺ anode layer 2.

FIGS. 10A to 10C show a method of manufacturing a semiconductor device according to a tenth embodiment of the present invention. FIGS. 10A to 10C are cross-sectional views of main steps in the order of steps. This manufacturing method is a method for manufacturing the semiconductor device of FIG. The difference from FIG.
The p ⁺ anode layer 2 is formed on the surface layer on the anode side in FIG.
The point is that a shallower p ⁻ layer 11 is formed on the entire surface. Other steps are the same as in the second embodiment. In this case, p ^- layer 1
1 does not form a Schottky junction even when the aluminum / silicon film is annealed at a low temperature.

The formation of the p ⁻ layer 11 is performed by forming a p ^- layer 11 such as BF _2.
This is performed by ion-implanting a mold impurity into the entire surface and performing a heat treatment.
When the anode electrode 5 is formed by depositing an aluminum / silicon film and performing high-temperature annealing exceeding 500 ° C. instead of low-temperature annealing, a p ⁻ layer is formed. The injection does not have to be performed.

FIG. 11 is a sectional view showing a main part of a semiconductor device according to an eleventh embodiment of the present invention. This semiconductor device is an SFD diode. The difference from FIG. 3 is that a thin p ⁻ layer 11 is formed at a position corresponding to the Schottky junction 4. By forming the same interlayer film as in FIG. 3, the same effect as in FIG. 3 can be obtained.

FIGS. 12A to 12C show a method of manufacturing a semiconductor device according to a twelfth embodiment of the present invention. FIGS. 12A to 12C are cross-sectional views showing main steps in the order of steps. This manufacturing method is a method for manufacturing the semiconductor device of FIG. The difference from FIG. 4 is that a p ⁻ layer 11 shallower than the p ⁺ anode layer 2 is formed on the entire surface of the anode-side surface layer in FIG. 4C. Other steps are the same as in the fourth embodiment. This p ^- layer 11
Is the same as in the case of FIG.

FIG. 13 is a sectional view showing a main part of a semiconductor device according to a thirteenth embodiment of the present invention. This semiconductor device is an SFD diode. The difference from FIG. 5 is that a thin p ⁻ layer 11 is formed at a position corresponding to the Schottky junction 4. By forming the same interlayer film as in FIG. 5, the same effect as in FIG. 5 can be obtained.

FIGS. 14A to 14C show a method of manufacturing a semiconductor device according to a fourteenth embodiment of the present invention. FIGS. 14A to 14C are sectional views showing main steps in the order of steps. This manufacturing method is a method for manufacturing the semiconductor device of FIG. The difference from FIG. 6 is that ap ⁻ layer 11 shallower than the p ⁺ anode layer 2 is formed on the entire surface of the surface layer on the anode side in FIG. Other steps are the same as in the sixth embodiment. This p ^- layer 11
Is the same as in the case of FIG.

FIG. 15 is a sectional view showing a main part of a semiconductor device according to a fifteenth embodiment of the present invention. This semiconductor device is an SFD diode. The difference from FIG. 7 is that a thin p ⁻ layer 11 is formed at a position corresponding to the Schottky junction 4. By forming the same interlayer film as in FIG. 7, the same effect as in FIG. 7 can be obtained.

FIGS. 16A to 16C show a method of manufacturing a semiconductor device according to a sixteenth embodiment of the present invention. FIGS. 16A to 16C are cross-sectional views showing main steps in the order of steps. This manufacturing method is a method for manufacturing the semiconductor device of FIG. The difference from FIG. 8 is that ap ⁻ layer 11 shallower than the p ⁺ anode layer 2 is formed on the entire surface of the surface layer on the anode side in FIG. Other steps are the same as in the eighth embodiment. This p ^- layer 11
Is the same as in the case of FIG.

[0060]

According to the present invention, the surface height of the anode electrode formed on the p ⁺ anode layer is made higher than the surface height of the anode electrode formed in the other region, so that the wire is removed from the wire during bonding. The pressure applied to the Schottky junction and the p ⁻ layer is reduced, so that an increase in leakage current can be suppressed and a decrease in breakdown voltage can be prevented.

Further, by making the anode electrode formed on the p ⁺ anode layer a material harder than the anode electrodes formed in other regions, even when the anode electrode is flat over the entire surface, it is possible to form a wire during bonding. The pressure applied to the Schottky junction and the p ^- layer is reduced,
An increase in leakage current can be suppressed, and a decrease in breakdown voltage can be prevented.

[Brief description of the drawings]

FIG. 1 is a sectional view of a main part of a semiconductor device according to a first embodiment of the present invention;

FIGS. 2A to 2C are cross-sectional views of a main step in the order of steps, showing a method of manufacturing a semiconductor device according to a second embodiment of the present invention; FIGS.

FIG. 3 is a sectional view of a main part of a semiconductor device according to a third embodiment of the present invention;

FIGS. 4A to 4C are cross-sectional views of a main part process in the order of steps, showing a method of manufacturing a semiconductor device according to a fourth embodiment of the present invention; FIGS.

FIG. 5 is a sectional view of a main part of a semiconductor device according to a fifth embodiment of the present invention;

6 (a) to 6 (c) are cross-sectional views of a main part process shown in the order of steps, showing a method of manufacturing a semiconductor device according to a sixth embodiment of the present invention.

FIG. 7 is a sectional view of a main part of a semiconductor device according to a seventh embodiment of the present invention;

FIGS. 8A to 8C are cross-sectional views of a main part process in the order of steps, showing a method of manufacturing a semiconductor device according to an eighth embodiment of the present invention; FIGS.

FIG. 9 is a sectional view of a main part of a semiconductor device according to a ninth embodiment of the present invention;

FIGS. 10A to 10C are cross-sectional views of a main part process in the order of steps, showing a method of manufacturing a semiconductor device according to a tenth embodiment of the present invention; FIGS.

FIG. 11 is a sectional view showing a main part of a semiconductor device according to an eleventh embodiment of the present invention;

FIGS. 12A to 12C are cross-sectional views of a main part process in the order of steps, showing a method of manufacturing a semiconductor device according to a twelfth embodiment of the present invention; FIGS.

FIG. 13 is a sectional view of a main part of a semiconductor device according to a thirteenth embodiment of the present invention;

14A to 14C are cross-sectional views of a main part process shown in the order of steps, showing a method of manufacturing a semiconductor device according to a fourteenth embodiment of the present invention;

FIG. 15 is a sectional view showing a main part of a semiconductor device according to a fifteenth embodiment of the present invention;

16 (a) to 16 (c) are cross-sectional views of main steps in the order of steps, illustrating a method of manufacturing a semiconductor device according to a fourteenth embodiment of the present invention;

FIG. 17 is a view of bonding to an anode electrode.

FIG. 18 is a sectional view of a main part of a conventional MPS diode bonded.

FIG. 19 is a sectional view of a main part of a conventional SFD diode bonded.

[Explanation of symbols]

Reference Signs List 1 n ⁻ drift layer 2 p ⁺ anode layer 3 n ⁺ cathode layer 4 Schottky junction 5 anode electrode 5 a first anode electrode (hard) 5 b second anode electrode (soft) 6 cathode electrode 7 interlayer film 8 nitride film 9 selection Oxide film 10 Resist 11 P ^- layer 14 Wire 21, 22 Surface height 23, 25 Convex part 24, 26 Concave part 27 Thickness 100 n Semiconductor substrate

Claims (22)

[Claims] An electrode layer formed on one surface of a semiconductor substrate of a first conductivity type; a first region of a second conductivity type selectively formed on one surface layer of the semiconductor substrate; A second region forming a Schottky junction with the electrode layer formed on a surface layer of the semiconductor substrate sandwiched between the first region; and a second region forming an Schottky junction. A semiconductor device, wherein a surface height is higher than a surface height of the electrode layer on the second region. 2. An interlayer film is formed between the first region and the electrode layer, so that the surface height of the electrode layer on the first region is higher than the surface height on the second region. The semiconductor device according to claim 1, wherein: 3. The semiconductor device according to claim 2, wherein the hardness of said interlayer film is greater than the hardness of said electrode layer. 4. The semiconductor device according to claim 1, wherein a surface height of said first region is higher than a surface height of said second region. 5. The surface height of the first region and the second region is the same, and the surface height of the electrode layer on the first region is higher than the surface height of the electrode layer on the second region. The semiconductor device according to claim 1, wherein: 6. An electrode layer formed from one surface of a semiconductor substrate of a first conductivity type, a first region of a second conductivity type selectively formed on one surface layer of the semiconductor substrate, A semiconductor device comprising: an electrode layer formed on a surface layer of the semiconductor substrate sandwiched by one region; and a second region forming a Schottky junction, wherein the electrode layer is formed on the first region. The first electrode layer formed on the second region and the second electrode layer formed on the second region, the hardness of the member forming the first electrode layer is the hardness of the member forming the second electrode layer. A semiconductor device, wherein the first electrode layer and the second electrode layer have the same surface height. 7. A second conductivity type first region selectively formed on one surface layer of a first conductivity type semiconductor substrate, and a second conductivity type first region formed on the surface layer of the semiconductor substrate sandwiched between the first regions. The second region, which is thinner than the thickness of the first region and smaller than the impurity concentration of the first region.
A semiconductor device comprising: a conductivity type third region; and an electrode layer formed on the first region and the third region, wherein a surface height of the electrode layer on the first region is the second height. A semiconductor device having a height higher than a surface height of an electrode layer on a region. 8. An electrode film is formed between the first region and the electrode layer, so that the surface height of the electrode layer on the first region is reduced to the surface of the electrode layer on the second region. The semiconductor device according to claim 7, wherein the height is higher than the height. 9. The semiconductor device according to claim 8, wherein the hardness of the interlayer film is higher than the hardness of the electrode layer. 10. The semiconductor device according to claim 7, wherein a surface height of said first region is higher than a surface height of said third region. 11. The surface height of the first region and the third region is the same, and the surface height of the electrode layer on the first region is higher than the surface height of the electrode layer on the third region. The semiconductor device according to claim 7, wherein: 12. A first region, which is a second conductivity type semiconductor region formed on one surface layer of a first conductivity type semiconductor substrate, and a first region formed on the surface layer of the semiconductor substrate sandwiched between the first regions. A second region which is thinner than the thickness of the region and smaller than the impurity concentration of the first region;
A semiconductor device comprising: a third region that is a conductive semiconductor region; a first main electrode formed on the first region; and a second main electrode formed on a third region. A semiconductor device, wherein the hardness of a member forming an electrode is greater than the hardness of a member forming the second main electrode, and the surface heights of the first main electrode and the second main electrode are the same. 13. The method according to claim 1, further comprising:
12. The semiconductor device according to claim 1, wherein a surface height of an electrode layer formed on the region is high. 14. An electrode layer formed from one surface of a semiconductor substrate of a first conductivity type, a first region of a second conductivity type selectively formed on one surface layer of the semiconductor substrate, A second region forming a Schottky junction with the electrode layer formed on a surface layer of the semiconductor substrate sandwiched between the first region and a second region forming a Schottky junction; Forming a film, and forming an electrode layer on the entire surface to make the surface height of the electrode layer on the first region higher than the surface height of the main electrode on the second region. A method for manufacturing a semiconductor device, comprising: 15. An electrode layer formed from one surface of a semiconductor substrate of a first conductivity type, a first region of a second conductivity type selectively formed on one surface layer of the semiconductor substrate; A method for manufacturing a semiconductor device, comprising: a second region forming a Schottky junction with the electrode layer formed on a surface layer of the semiconductor substrate sandwiched between one region; and a nitride film formed on the semiconductor substrate. Selectively forming, a step of selectively oxidizing using the nitride film as a mask, a step of removing the nitride film and forming a first region by ion implantation, and removing the selective oxide film. A step of forming the semiconductor substrate at a position where the selective oxide film is formed in a concave shape, and forming an electrode layer on the entire surface, thereby lowering the surface height of the electrode layer on the first region to the electrode on the second region. Making the surface higher than the surface height of the layer. A method for manufacturing a semiconductor device. 16. An electrode layer formed on one surface of a semiconductor substrate of a first conductivity type, a first region of a second conductivity type selectively formed on one surface layer of the semiconductor substrate, and A method for manufacturing a semiconductor device, comprising: a second region forming a Schottky junction with the electrode layer formed on a surface layer of the semiconductor substrate sandwiched between one region; Forming a main electrode film having the same thickness on the two regions, and removing a surface layer of the electrode film on the second region, thereby forming a surface height of the electrode layer on the first region. The height of the electrode layer above the surface of the electrode layer on the second region. 17. An electrode layer formed on one surface of a semiconductor substrate of a first conductivity type, a first region of a second conductivity type selectively formed on one surface layer of the semiconductor substrate, and A method for manufacturing a semiconductor device, comprising: a second region for forming a Schottky junction with the electrode layer formed on a surface layer of the semiconductor substrate sandwiched between one region; The first electrode layer having a high hardness of the first electrode layer
Forming an interlayer film, forming an electrode film to be a second electrode layer on the entire surface, removing the electrode film until the second electrode layer is exposed, and removing the surfaces of the first and second electrode layers. A method of manufacturing a semiconductor device, comprising: 18. A first region of a second conductivity type selectively formed on one surface layer of a semiconductor substrate of a first conductivity type and a first region of the semiconductor substrate sandwiched between the first regions. A method of manufacturing a semiconductor device, comprising: a third region of a second conductivity type, which is thinner than a thickness of a region and lower than an impurity concentration of a first region; and a main electrode formed on the first region and the third region. Forming an interlayer film on the first region and forming a main electrode on the entire surface, thereby reducing the surface height of the main electrode on the first region to the surface height of the main electrode on the third region. A method of manufacturing the semiconductor device. 19. A first region of a second conductivity type selectively formed on one surface layer of a semiconductor substrate of a first conductivity type, and a first region of the semiconductor substrate sandwiched between the first regions. A method of manufacturing a semiconductor device, comprising: a third region of a second conductivity type, which is thinner than a thickness of a region and lower than an impurity concentration of a first region; and a main electrode formed on the first region and the third region. Selectively forming a nitride film on a semiconductor substrate; selectively oxidizing the nitride film using the nitride film as a mask; removing the nitride film and forming a first region by ion implantation; Removing the oxide film to form a concave portion of the semiconductor substrate where the selective oxide film is formed, and forming a main electrode over the entire surface to reduce the surface height of the main electrode on the first region. Making the height higher than the surface height of the main electrode on the second region. A method for manufacturing a semiconductor device. 20. A first region of a second conductivity type selectively formed on one surface layer of a semiconductor substrate of a first conductivity type, and a first region of the semiconductor substrate sandwiched between the first regions. A method of manufacturing a semiconductor device, comprising: a third region of a second conductivity type, which is thinner than a thickness of a region and lower than an impurity concentration of a first region; and a main electrode formed on the first region and the third region. Forming an electrode film serving as a main electrode having the same thickness on the first region and the second region, and removing the surface layer of the electrode film on the second region to form the first region. Making the surface height of the upper main electrode higher than the surface height of the main electrode on the second region. 21. A first region of a second conductivity type selectively formed on one surface layer of a semiconductor substrate of a first conductivity type, and a first region of the semiconductor substrate sandwiched between the first regions. A method of manufacturing a semiconductor device, comprising: a third region of a second conductivity type, which is thinner than a thickness of a region and lower than an impurity concentration of a first region; and a main electrode formed on the first region and the third region. The first main electrode having a high hardness of the member on the first region;
Forming an interlayer film, forming an electrode film to be a second main electrode on the entire surface, removing the electrode film until the second main electrode is exposed, and removing the surface of the first main electrode and the second main electrode. A method of manufacturing a semiconductor device, comprising: 22. The method according to claim 1, wherein the main electrode or the first main electrode and the second main electrode are formed by coating an aluminum / silicon film and annealing at a low temperature.
And a method for manufacturing a semiconductor device according to any one of 13 to 17.