JP2002373921A - Adhesive material sheet for semiconductor device and component and semiconductor device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To industrially provide an adhesive material sheet for a semiconductor device with excellent reflow resistance and workability and to improve the reliability of the semiconductor device for surface mounting. SOLUTION: The adhesive material sheet for the semiconductor device is composed of at least one organic insulation film layer and an adhesive material layer, and at least one surface of the adhesive material layer is roughened.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an adhesive sheet for a semiconductor device constituting a substrate (interposer) for connecting a semiconductor integrated circuit used for mounting and packaging a semiconductor integrated circuit. More specifically, a ball grid array (BGA) and a land grid array (L
GA), a wiring board layer composed of an insulator layer and a conductor pattern constituting a substrate for connecting a semiconductor integrated circuit used in a pin grid array (PGA) method, and a conductor pattern such as a metal reinforcing plate (stiffener) are formed. The present invention relates to an adhesive sheet for a semiconductor device having a function of adhering layers that are not present and having a function of relaxing thermal stress generated between the phases due to a temperature difference.

[0002]

2. Description of the Related Art Conventionally, as a semiconductor integrated circuit (IC) package, a dual in-line package (DIP),
Package forms such as a small outline package (SOP) and a quad flat package (QFP) have been used. However, with the increase in the number of pins of the IC and the miniaturization of the package, the limit of the QFP that can increase the number of pins is approaching its limit. This is due to the difficulty in maintaining the flatness of the leads and the difficulty in obtaining solder printing accuracy on the printed circuit board, particularly when mounting on a printed circuit board.
Therefore, in recent years, BGA method, LGA method, PGA method and the like have been put to practical use as means for increasing the number of pins and reducing the size.
Above all, the BGA method has attracted attention because of its low cost, light weight, and thinness due to the use of plastic materials.

FIG. 1 shows an example of the BGA system. A layer 7 on which no conductor pattern is formed, such as an insulator layer 3 and a conductor pattern 5 for connecting the IC 1, a wiring board layer made of an adhesive 4, a reinforcing plate (stiffener), a radiator plate (heat spreader), a shield plate, and the like. , And at least one adhesive layer 6 for laminating them, and further has a gold bump 2, a solder resist 8,
As an external connection portion of the semiconductor integrated circuit connection substrate to which the IC 1 is connected, solder balls 9 substantially corresponding to the number of pins of the IC are provided in a grid (grid array). The connection to the printed circuit board is performed by placing the solder ball surface on the conductor pattern 5 of the printed circuit board on which the solder is already printed, and melting the solder by reflow. The greatest feature is that since the surface of the substrate for connecting a semiconductor integrated circuit can be used, more terminals can be arranged in a smaller space as compared with a package that can be used only around a QFP or the like. A chip scale package (CSP) is one that has further advanced this miniaturization function, and is sometimes called a micro BGA (μ-BGA) because of its similarity. The present invention relates to a CSP having these BGA structures.
Also applicable to

On the other hand, the BGA method has the following problems. (A) maintaining the flatness of the surface of the solder ball; (b) improving the heat radiation; (c) mitigating the thermal stress applied to the solder ball during temperature cycling and reflow; (d) increasing the number of reflows. Requires high reflow resistance. As a method to improve these, reinforcement for the substrate for connecting semiconductor integrated circuits,
A method of laminating a material such as a metal plate for the purpose of heat radiation and electromagnetic shielding is generally used. In particular, the wiring board layer composed of an insulator layer and a conductor pattern for connecting an IC has a T
This is important when an AB tape or a flexible printed board is used. For this reason, the substrate for connecting a semiconductor integrated circuit is
As illustrated in FIG. 2, a wiring board layer (FIG. 3) including an insulator layer 11 and a conductor pattern 13 for connecting an IC and an adhesive layer 12 (FIG. 3), a reinforcing plate (stiffener), a heat sink (heat spreader), It is configured to have at least one or more layers 15 such as a shield plate on which no conductor pattern is formed, an adhesive layer 14 for laminating these layers, and a solder resist 16. Note that FIG.
The wiring board layer (pattern tape) illustrated in FIG. 1 has a sprocket hole 19 for transport and a device hole 20 for connecting a semiconductor to the flexible insulating layer 17.
A conductor pattern 21 and a conductor portion 22 for external connection are laminated thereon with an adhesive layer 18 interposed therebetween. These semiconductor integrated circuit connection substrates are prepared by laminating or applying the adhesive composition in a semi-cured state on any of a wiring board layer, a layer on which a conductor pattern is not formed, or a metal plate such as a reinforcing plate in advance, and drying. In general, a product is prepared by pasting, bonding together in a process before connecting ICs, curing by heating, and molding.

[0005] Finally, the adhesive layer 14 remains inside the package. From the above points, the following points can be cited as characteristics required of the adhesive layer 14. (A) easy workability,
(B) reflow resistance, (c) stress absorption (low stress) generated between different kinds of materials such as a wiring board layer and a reinforcing plate during temperature cycling or reflow, (d) when laminated on wiring. Insulation and the like can be mentioned.

[0006] Among them, important requirements are reflow resistance and workability. In a mounting method in which the entire package is heated to a high temperature of 210 to 270 ° C., such as solder bath immersion, heating with a saturated vapor of an inert gas (paper phase method), or infrared reflow, the adhesive layer is peeled off. Is to lower the reliability. It is said that the occurrence of peeling in the reflow process is caused by explosive vaporization and expansion of the moisture absorbed during the time from heating after the adhesive layer is cured until during the mounting process,
As a countermeasure, a method has been used in which a cured package is stored in a completely dried and sealed container and shipped.

[0007] Easy workability is a characteristic required for improving reflow resistance, and is intended to suppress the incorporation of foreign matter and air bubbles, which generate and accumulate moisture, between the adhesive layer and an adherend such as a metal plate. Therefore, low drawbacks and workability in a short time are required. In particular, the step of punching the adhesive sheet and the step of bonding the metal sheet are important because it is necessary to prevent unnecessary protrusion of the adhesive and air bubbles during bonding.

[0008]

The above-mentioned substrate for connecting a semiconductor integrated circuit is formed by forming an intermediate product in which an adhesive layer is formed on either a wiring board layer or a layer on which no conductor pattern is formed. In general, it is formed by bonding a wiring board layer and a layer on which a conductor pattern is not formed in a process before connecting an IC, and curing and molding the adhesive layer by heating. Furthermore, in this case, the layer on which the conductor pattern is not formed usually emphasizes planarity,
In many cases, a relatively thick metal plate is used, and it is difficult to continuously perform a bonding step with a wiring board layer supplied as a continuous tape using a TAB tape or a flexible printed board. Therefore, it is more common that these are punched into a sheet having a size close to the final semiconductor device (BGA package) and bonded to a continuous tape-shaped wiring board layer. That is, the following steps are exemplified.

(1) A coating solution obtained by dissolving an adhesive composition in a solvent is applied on a film and dried to prepare a semi-cured adhesive sheet. This is adhered to either the wiring board layer (long) or the layer (sheet) on which the conductor pattern is not formed by heating and pressing to form an adhesive layer. In the former case, the layer where the conductor pattern is not formed, and in the latter case, the wiring board layer is bonded by heating and pressing,
A substrate for connecting a semiconductor integrated circuit is prepared.

(2) The adhesive composition is melted at an appropriate temperature, applied on a film and dried to prepare an adhesive sheet in a semi-cured state. The following is the same as (1). (3) A coating solution obtained by dissolving the adhesive composition in a solvent is directly applied to either a wiring board layer (long) or a layer where no conductor pattern is formed (sheet-to-sheet), dried and semi-cured. Form an adhesive layer. The following is the same as (1). (4) The adhesive composition is melted at an appropriate temperature, applied directly to either a wiring board layer (long) or a layer without a conductor pattern (sheet-to-sheet), dried, and cured in a semi-cured state. Form an adhesive layer. The following is the same as (1).

Among them, the method of interposing the adhesive sheet of (1) or (2) has a higher degree of freedom in the processing process as compared with the method of forming the direct adhesive layer of (3) or (4). This is an advantageous method.

In the method of using an adhesive sheet, as described in (1) above, in the step of applying heat and pressure to either a wiring board layer or a layer on which no conductor pattern is formed, a rubber roll or a metal roll is used. Laminate by heating lamination with rolls. At this time, since the flexible adhesive sheet is continuously bonded, if the adhesive sheet has high tackiness, once the air bubbles are trapped, there is a problem that it is difficult to remove the air bubbles even if the lamination pressure is increased. .

[0013] Therefore, it is required to reduce the adhesiveness of the adhesive sheet and improve the escape of air bubbles. As a technique, it is necessary to reduce the adhesiveness by polymerizing the resin component or adding inorganic particles. Conceivable. However, when the tackiness is reduced, heating and pressing exceeding the softening point of the resin are required in order to obtain the adhesiveness, and there is a concern that the load on the wiring board layer may be increased. Thus, it is difficult to achieve both high adhesive strength after heat curing and low tackiness.

An object of the present invention is to solve the above-mentioned problems in laminating an adhesive sheet for a semiconductor, and to provide an adhesive sheet for a semiconductor device which is excellent in bubble defects and easy processing due to the adhesive sheet. Further, by using the semiconductor adhesive sheet of the present invention, a semiconductor device component and a semiconductor device having high reliability, high adhesive strength, and excellent reflow resistance are obtained.

[0015]

That is, the present invention relates to an adhesive sheet for a semiconductor device comprising at least one organic insulating film layer and an adhesive layer, wherein at least one surface of the adhesive layer is roughened. It is an adhesive sheet for apparatus.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail.
The semiconductor integrated circuit connection substrate of the present invention is a device for connecting separated semiconductor integrated circuits (bare chips) after an element is formed on a semiconductor substrate such as silicon,
The shape, material, and manufacturing method may be any one having at least one of (A) a wiring board layer including an insulator layer and a conductor pattern, (B) a layer on which no conductor pattern is formed, and (C) at least one adhesive layer. Is not particularly limited. Therefore, the most basic structure is A / C / B, but this also includes a multilayer structure such as A / C / B / C / B.

The semiconductor device according to the present invention means a device using the substrate for connecting a semiconductor integrated circuit according to the present invention.
The shape and structure are not particularly limited as long as the package is a GA type or LGA type package. Substrate for connecting semiconductor integrated circuit and I
The connection method of C may be any of TAB gang bonding and single point bonding, wire bonding used for a lead frame, resin sealing by flip chip mounting, anisotropic conductive film connection, and the like. Further, a package called a CSP is also included in the semiconductor device of the present invention.

The adhesive layer (C) in the present invention is characterized in that at least one surface and, if necessary, the surface layers of both surfaces are roughened. Even if the adhesive layer itself has high adhesiveness, the surface layer is roughened to disperse the contacts to the object to be bonded, so that the adhesiveness is reduced. As a result, entrapment of air bubbles into the bonded interface can be avoided, and the adhesive can flow and be buried if pressed, and high adhesive strength can be obtained. That is, the laminating processability can be improved without impairing the inherent properties of the adhesive.

The method for roughening the surface layer of the adhesive is not particularly limited, but the following examples are given. A coating solution obtained by dissolving an adhesive composition in a solvent is applied on a film and dried to form an adhesive sheet in a semi-cured state. In the case of sand mat processing or the like, the irregularities are transferred to the surface of the adhesive sheet. Further, when a film having irregularities is used as a protective film for the produced adhesive sheet and the laminate is laminated, the irregularities are similarly transferred to the surface of the adhesive sheet. However, since the adhesive is buried in the unevenness of the film surface, in actual use, the film may be difficult to peel off. Therefore, a film used particularly preferably in the present invention is excellent in adjusting the releasability. , Silicone or a fluorine-containing compound. In addition, the surface of the surface layer of the adhesive sheet can be roughened by a rubber roll having irregularities.

The depth of the unevenness of the roughened surface layer of the adhesive is preferably 5% to less than 50% of the thickness of the adhesive layer, and more preferably 5% to less than 30%. I have. When the depth of the unevenness is less than 5%, the effect of reducing the adhesiveness is small, and bubbles are entrapped. On the other hand, if it is 50% or more, the unevenness is too deep, so that when the adhesive is bonded, the bonding due to the flow of the adhesive is insufficient, and the bonding is performed while enclosing bubbles, which is not preferable.

Further, by combining a method of lowering the tackiness by thinly laminating a low-adhesive adhesive layer on the surface layer of a normal adhesive layer and surface roughening, a lower-adhesive adhesive sheet can be obtained. it can. Specific examples of the low-adhesive adhesive layer include an adhesive having a composition in which the amount of inorganic particles is increased, and a thin adhesive sheet whose adhesiveness is controlled by heat aging.

The (A) wiring board layer comprising an insulator layer and a conductor pattern of the present invention is a layer having a conductor pattern for connecting an electrode pad of a semiconductor element to the outside of a package (such as a printed board). A conductor pattern is formed on one or both sides of the body layer.

The insulator layer referred to here is made of a plastic such as polyimide, polyester, polyphenylene sulfide, polyether sulfone, polyether ether ketone, aramid, polycarbonate, polyarylate or a composite material such as glass cloth impregnated with epoxy resin. A flexible insulating film having a thickness of 10 to 125 μm, a ceramic substrate made of alumina, zirconia, soda glass, quartz glass, or the like is suitable, and a plurality of layers selected therefrom may be used by lamination. If necessary, hydrolysis, corona discharge, low-temperature plasma,
Surface treatment such as physical roughening and easy adhesion coating treatment can be performed.

The formation of the conductor pattern is generally performed by either the subtractive method or the additive method, but any of them may be used in the present invention.

In the subtractive method, a metal plate such as a copper foil is adhered to the insulator layer with an insulating adhesive, or a precursor of the insulator layer is laminated on the metal plate, and the insulator layer is formed by heat treatment or the like. A pattern is formed by etching the material created by the forming method by chemical treatment. Specific examples of the material include a rigid or flexible printed circuit board copper bonding material and a TAB tape. Among them, a copper paste material for flexible printed circuit boards or a TAB tape using at least one or more polyimide films as an insulator layer and a copper foil as a conductor pattern is preferably used.

In the additive method, a conductor pattern is directly formed on an insulator layer by electroless plating, electrolytic plating, sputtering, or the like. In any case, the formed conductor may be plated with a metal having high corrosion resistance to prevent corrosion. Also, via holes may be formed in the wiring board layer as necessary, and conductive patterns formed on both sides may be connected by plating.

In the present invention, (B) the layer on which the conductor pattern is not formed is substantially a uniform layer independent of (A) a wiring board layer comprising an insulating layer and a conductor pattern or (C) an adhesive layer. Yes, reinforcement and dimensional stabilization of a substrate for connecting a semiconductor integrated circuit (referred to as a reinforcing plate or stiffener), electromagnetic shielding between the outside and IC, heat radiation of IC (referred to as heat spreader, heat sink), semiconductor integration It has functions such as imparting flame retardancy to a circuit connection substrate and imparting discriminability based on the shape of a substrate for connecting a semiconductor integrated circuit. Accordingly, the shape may be not only a layer shape but also a fin structure for heat dissipation, for example. As long as it has the above function, it may be an insulator or a conductor, and the material is not particularly limited.
Metals include copper, iron, aluminum, gold, silver, nickel, titanium, and the like; inorganic materials include alumina, zirconia, soda glass, quartz glass, and carbon; and organic materials include polyimide, polyamide, polyester, and vinyl. And phenolic and epoxy-based polymer materials. Further, a composite material obtained by combining these can also be used. For example, those having a shape in which a thin metal plating is applied on a polyimide film, those having conductivity by kneading carbon into a polymer, those having a metal plate coated with an organic insulating polymer, and the like are mentioned. Further, it is not limited that various surface treatments are performed as in the case of the insulator layer included in (A) the wiring board layer.

The adhesive composition constituting the adhesive layer of the present invention comprises at least one thermoplastic resin and at least one thermosetting resin.
It is more preferable to include more than one kind from the viewpoint of reflow resistance, but the kind is not particularly limited. Thermoplastic resin has functions such as adhesion, flexibility, relaxation of thermal stress, and improvement of insulation due to low water absorption. Thermosetting resin has heat resistance, insulation at high temperatures, chemical resistance, and adhesion. This is important for achieving the balance of the strength and the like of the agent layer.

As the thermoplastic resin, acrylonitrile-butadiene copolymer (NBR), acrylonitrile-
Butadiene rubber-styrene resin (ABS), polybutadiene, styrene-butadiene-ethylene resin (SEB
S), acrylic, polyvinyl butyral, polyamide,
Known materials such as polyester, polyimide, polyamideimide, and polyurethane are exemplified. Further, these thermoplastic resins may have a functional group capable of reacting with a thermosetting resin described below. Specific examples include an amino group, a carboxyl group, an epoxy group, a hydroxyl group, a methylol group, an isocyanate group, a vinyl group, and a silanol group. These functional groups are preferable because the bond with the thermosetting resin is strengthened and the heat resistance is improved. As the thermoplastic resin, (B) a copolymer containing butadiene as an essential copolymer component is particularly preferred from the viewpoint of adhesiveness to the material of the layer where the conductor pattern is not formed, flexibility, and the effect of reducing thermal stress. Can be used. Particularly, acrylonitrile-butadiene copolymer (N
BR), styrene-butadiene-ethylene resin (SEB)
S), styrene-butadiene resin (SBS) and the like are preferred. Further, a copolymer containing butadiene as an essential copolymer component and having a carboxyl group is more preferable.
BR (NBR-C) and SEBS (SEBS-C),
SBS (SBS-C) and the like. As NBR-C, for example, acrylonitrile and butadiene
Carboxylated end groups of a copolymer rubber copolymerized in a molar ratio of 90 to 50/50, or terpolymerization of acrylonitrile, butadiene and a carboxyl group-containing polymerizable monomer such as acrylic acid or maleic acid. Rubber and the like. Specifically, PNR-1H (manufactured by Nippon Synthetic Rubber Co., Ltd.), "Nipol" 1072J, "Nipol"
DN612, "Nipol" DN631 (all manufactured by Zeon Corporation), "Hiker" CTBN (manufactured by BF Goodrich) and the like. Moreover, MX-0 is used as SEBS-C.
73 (manufactured by Asahi Kasei Corp.) is D13 as SBS-C.
00X (manufactured by Shell Japan Co., Ltd.).

Examples of the thermosetting resin include known resins such as an epoxy resin, a phenol resin, a melamine resin, a xylene resin, a furan resin, and a cyanate ester resin. Particularly, epoxy resin and phenol resin are preferable because of their excellent insulating properties.

The epoxy resin is not particularly limited as long as it has two or more epoxy groups in one molecule, and is a diglycidyl ether such as bisphenol F, bisphenol A, bisphenol S, resorcinol, dihydroxynaphthalene, dicyclopentadiene diphenol and the like. Epoxidized phenol novolak, epoxidized cresol novolak, epoxidized trisphenylolmethane, epoxidized tetraphenylolethane, epoxidized metaxylenediamine, alicyclic epoxy such as cyclohexaneepoxide, and the like. Further, it is effective to use a halogenated epoxy resin, particularly a brominated epoxy resin, for imparting flame retardancy. At this time, although the use of only the brominated epoxy resin can impart flame retardancy, the heat resistance of the adhesive is greatly reduced, so that it is more effective to use a mixed system with a non-brominated epoxy resin. Examples of brominated epoxy resins include copolymerized epoxy resins of tetrabromobisphenol A and bisphenol A, or "BRE
N "-S (manufactured by Nippon Kayaku Co., Ltd.), and the like. Brominated phenol novolak type epoxy resins. These brominated epoxy resins may be mixed even if two or more kinds are mixed in consideration of bromine content and epoxy equivalent. good.

As the phenol resin, any known phenol resin such as a novolak phenol resin and a resol phenol resin can be used. For example, alkyl-substituted phenols such as phenol, cresol, pt-butylphenol, nonylphenol and p-phenylphenol; cyclic alkyl-modified phenols such as terpene and dicyclopentadiene; and heterocyclic compounds such as nitro group, halogen group, cyano group and amino group. Those having a functional group containing atoms, naphthalene, those having a skeleton such as anthracene,
Examples of resins include polyfunctional phenols such as bisphenol F, bisphenol A, bisphenol S, resorcinol, and pyrogallol.

The addition amount of the thermosetting resin is 10
5-400 parts by weight, preferably 50-400 parts by weight per 0 parts by weight
200 parts by weight. When the addition amount of the thermosetting resin is less than 5 parts by weight, the elastic modulus at a high temperature is remarkably reduced, and the semiconductor integrated circuit connection substrate is deformed during use of the device on which the semiconductor device is mounted, and is handled in a processing step. This is not preferable because of lack of workability. If the addition amount of the thermosetting resin exceeds 400 parts by weight, the modulus of elasticity is high, the coefficient of thermal expansion is small, and the effect of relaxing the thermal stress is small.

The addition of a curing agent and a curing accelerator for epoxy resin and phenol resin to the adhesive layer of the present invention is not limited at all. For example, triethylamine, benzyldimethylamine, α-methylbenzyldimethylamine, 2- (dimethylaminomethyl) phenol,
Tertiary amine compounds such as 4,6-tris (dimethylaminomethyl) phenol and 1,8-diazabicyclo (5,4,0) undecene-7; 3,3′5,5′-tetramethyl-4,4 ′ -Diaminodiphenylmethane, 3,
3'5,5'-tetraethyl-4,4'-diaminodiphenylmethane, 3,3'-dimethyl-5,5'-diethyl-4,4'-diaminodiphenylmethane, 3,3'-
Dichloro-4,4'-diaminodiphenylmethane, 2,
2'3,3'-tetrachloro-4,4'-diaminodiphenylmethane, 4,4'-diaminodiphenylsulfide, 3,3'-diaminobenzophenone, 3,3'-diaminodiphenylsulfone, 4,4'-diamino Diphenylsulfone, 3,4'-diaminodiphenylsulfone, 4,4'-diaminobenzophenone, 3,4,4 '
Aromatic amines such as triaminodiphenylsulfone; amine complexes of boron trifluoride such as triethylamine boron trifluoride; imidazole derivatives such as 2-alkyl-4-methylimidazole and 2-phenyl-4-alkylimidazole; Phthalic acid, organic acids such as trimellitic anhydride, dicyandiamide, triphenylphosphine, trimethylphosphine, triethylphosphine,
Known compounds such as organic phosphine compounds such as tributylphosphine, tri (p-methylphenyl) phosphine and tri (nonylphenyl) phosphine can be used.
These may be used alone or in combination of two or more. The addition amount is preferably 0.1 to 50 parts by weight based on 100 parts by weight of the adhesive composition.

In addition to the above components, addition of organic or inorganic components such as antioxidants and ion scavengers is not limited as long as the properties of the adhesive are not impaired. Examples of fine inorganic components include aluminum hydroxide, magnesium hydroxide, metal hydroxides such as calcium aluminate hydrate, silica, alumina, zirconium oxide, zinc oxide, antimony trioxide, antimony pentoxide, and magnesium oxide. Titanium oxide, iron oxide, cobalt oxide, chromium oxide, metal oxides such as talc, inorganic salts such as calcium carbonate, aluminum, gold, silver, nickel, iron, metal fine particles such as, or carbon black, glass, Examples of the organic component include crosslinked polymers such as styrene, NBR rubber, acrylic rubber, polyamide, polyimide, and silicone. These may be used alone or in combination of two or more. The average particle diameter of the fine component is preferably 0.2 to 5 μm in consideration of dispersion stability. Also,
The compounding amount is suitably 2 to 50 parts by weight of the whole adhesive composition.

The components (hereinafter referred to as components) of the substrate for connecting a semiconductor integrated circuit of the present invention are materials in an intermediate processing stage used for producing a substrate for a semiconductor integrated circuit and a semiconductor device. This component uses a flexible printed circuit board or a TAB tape as a wiring board layer composed of an insulator layer and a conductor pattern, and has a silicone protective polyester film on one or both sides thereof.
A wiring board with an adhesive laminated with an adhesive layer of a stage or a metal plate of copper, stainless steel, 42 alloy or the like as a layer on which no conductor pattern is formed, and having a protective film on one or both surfaces in the same manner as described above A metal plate with an adhesive (such as a stiffener with an adhesive) in which an adhesive layer of a stage is laminated corresponds to the component of the present invention. A so-called adhesive obtained by laminating a B-stage adhesive layer having a protective film on the outermost layer, even when each of the wiring board layer including the insulator layer and the conductor pattern and one or more layers on which the conductor pattern is not formed are provided. The present invention also includes a substrate for connecting a semiconductor integrated circuit.

The semiconductor device referred to in the present invention means a device produced using the semiconductor device adhesive sheet of the present invention.
For example, the shape and structure are not particularly limited as long as the package is a BGA type or LGA type package. The connection method between the semiconductor integrated circuit connection substrate and the IC can be any of TAB gang bonding and single point bonding, wire bonding used for a lead frame, resin sealing by flip chip mounting, anisotropic conductive film connection, etc. Good. Further, a package called a CSP is also included in the semiconductor device of the present invention.

The adhesive sheet of the present invention may be provided with a protective film layer which can be easily peeled off on one side or both sides of the adhesive layer for easy handling. Regarding the material of the protective film layer, before bonding the adhesive layer to a wiring board layer (such as a TAB tape) composed of an insulator layer and a conductor pattern or a layer where a conductor pattern is not formed (such as a stiffener or a heat spreader), It is not particularly limited as long as it can be peeled off without impairing the form and function of the adhesive layer, and specific examples thereof include polyester, polyolefin, polyphenylene sulfide, polyvinyl chloride,
Plastic films such as polytetrafluoroethylene, polyvinyl fluoride, polyvinyl butyral, polyvinyl acetate, polyvinyl alcohol, polycarbonate, polyamide, polyimide, and polymethyl methacrylate; and silicone, alkyd-based resins, polyolefin-based resins, and fluorine-containing compounds. Films coated with a release agent, paper laminated with these films, laminates of these films, paper impregnated with or coated with a release resin, and the like can be mentioned. Among these protective films, those which are particularly preferably used in the present invention are films that have been subjected to a release treatment of silicone or a fluorine-containing compound, etc., which is excellent in control of the release property. More preferably, the polyester film subjected to the release treatment described above is excellent in heat resistance.

Further, the protective film may be colored with a pigment so as to have good visibility during processing. Thereby, the protective film on the side to be peeled off can be easily recognized, so that erroneous use can be avoided.

Next, examples of the semiconductor adhesive sheet of the present invention, a component using the same, and a method of manufacturing a semiconductor device will be described. (1) Preparation of an adhesive sheet for a semiconductor device: A coating obtained by dissolving the adhesive composition of the present invention in a solvent is applied on a polyester film having releasability and dried. It is preferable to apply the adhesive layer so that the film thickness is 10 to 100 μm. Drying conditions are 100 to 200 ° C. for 1 to 5 minutes.
The solvent is not particularly limited, but aromatic solvents such as toluene, xylene, and chlorobenzene; ketones such as methyl ethyl ketone and methyl ethyl isobutyl ketone (MIBK); A single polar solvent or a mixture thereof is preferred.

A polyester or polyolefin-based protective film having higher releasability is laminated on the coated and dried adhesive layer to obtain the adhesive sheet of the present invention.

According to the present invention, the film to be coated with the adhesive paint and the protective film to be laminated on the prepared adhesive sheet after drying the paint are arbitrarily bonded by using a film having irregularities on one or both of the protective films. The surface roughening of the agent can be selected.

When the thickness of the adhesive is further increased, the adhesive sheet may be laminated plural times. In some cases, after lamination, aging is performed at 40 to 100 ° C. for about 1 to 200 hours to adjust the degree of curing. Is also good. FIG. 4 illustrates the shape of the adhesive sheet for a semiconductor device obtained by the present invention.

(2) Preparation of a component (stiffener with adhesive) of a substrate for connecting a semiconductor integrated circuit: thickness 0.05 to
A 0.5 mm copper plate or a stainless steel plate is degreased with acetone, and the protective film on one side of the adhesive sheet for a semiconductor device prepared in the above (1) is peeled off and then laminated. A lamination temperature of 20 to 200 ° C. and a pressure of 0.1 to 3 MPa are preferred. Finally, punching and cutting are performed as appropriate depending on the shape of the semiconductor device. FIG.
The components of the present invention are exemplified below. (3) Preparation of a substrate for connecting a semiconductor integrated circuit: The component (stiffener with adhesive) obtained in (2) is punched out with a die, for example, a rectangular adhesive having a square hole in the center. With stiffener. Peel off the protective film from the stiffener with adhesive. A three-layer TAB tape in which an adhesive layer and a protective film layer are laminated on a polyimide film is processed by the following steps (a) to (d). (A) perforation of sprocket and device holes,
(B) heat lamination with a copper foil, and (c) tin or gold plating. On the polyimide film surface of the conductor pattern surface or the back surface of the wiring board layer obtained as described above,
The center hole of the stiffener with the adhesive is aligned with the device hole of the wiring board and bonded. The bonding conditions are preferably a temperature of 20 to 200 ° C. and a pressure of 0.1 to 3 MPa. Finally, post-curing is performed at 80 to 200 ° C. for about 15 to 180 minutes for heating and curing the adhesive layer in a hot air oven.

FIG. 2 shows an example of the substrate for connecting a semiconductor integrated circuit described above. (4) Preparation of semiconductor device: The inner lead portion of the substrate for connecting a semiconductor integrated circuit of (3) is thermocompression-bonded (inner lead bonding) to the gold bump of the IC, and the IC is mounted.
Next, a semiconductor device is manufactured through a sealing step using a sealing resin. FIG. 1 is a cross-sectional view of one embodiment of a semiconductor device.

[0046]

The present invention will be described more specifically with reference to the following examples. First, the evaluation methods used in the examples and comparative examples will be described. Laminating processability On a 30 mm square, 0.25 mm thick SUS304, a 50 µm thick adhesive sheet cut in the same shape is superposed at room temperature, and roll-laminated at 60 ° C, 1 MPa, 1 m / min. Conductor width 100μ on adhesive sheet
m, a simulated pattern having a distance between conductors of 100 μm was formed 3
A semiconductor connection substrate of 0 mm square is mounted at 150 ° C., 5 MPa, and 1 MPa.
Roll lamination was performed under the condition of m / min. The presence or absence of air bubbles on the bonding surface was observed using an ultrasonic short wound machine.

The condition for strengthening the bonding is SU
At 120 ° C, 3MPa, 0.5m /
Minutes, and bonding to the substrate for semiconductor connection at 160 ° C.
The conditions were 10 MPa and 0.5 m / min, and the presence or absence of air bubbles was similarly examined.

Adhesive force An adhesive sheet was placed on a 0.35 mm thick SUS304
Lamination was performed under the conditions of 1 ° C. and 1 ° C. Thereafter, a polyimide film (75 μm: “UPILEX 75S” manufactured by Ube Industries, Ltd.) was further laminated on the surface of the adhesive sheet laminated on SUS at 130 ° C. and 1 MPa, and then 100 ° C. in an air oven. One hour, one
A heat treatment was performed sequentially at 50 ° C. for 1 hour to prepare a sample for evaluation. After slitting the polyimide film to a width of 5 mm, the polyimide film having a width of 5 mm was peeled off at a rate of 50 mm / min in a 90 ° direction, and the adhesive force at that time was measured.

Reflow Resistance A 50-μm-thick adhesive sheet cut in the same shape is superimposed on a 30-mm-square 0.25 mm-thick SUS304 at room temperature, and roll-laminated at 60 ° C., 1 MPa, and 1 m / min. And then a conductor width of 100 μm on the adhesive sheet.
m, a simulated pattern having a distance between conductors of 100 μm was formed 3
A semiconductor connection substrate of 0 mm square is mounted at 150 ° C., 5 MPa, and 1 MPa.
Roll lamination was performed under the condition of m / min. Then 150
The composition was cured at 2 ° C. for 2 hours to prepare a sample for evaluating reflow resistance. 85 ° C / 85 for 30mm □ samples
% RH for 12 hours. 23
The film was subjected to IR reflow at 0 ° C. for 10 seconds, and the peeled state was observed with an ultrasonic short wound machine.

Example 1 The following thermoplastic resin, epoxy resin and other additives were blended so as to have the composition ratios shown in Table 1, respectively.
The mixture was stirred and dissolved in a DMF / monochlorobenzene / MIBK mixed solvent at 40 ° C. so as to have a concentration of 28% by weight to prepare an adhesive solution.

A. Epoxy resin 1. o-cresol novolak type epoxy resin (epoxy equivalent: 200) Bisphenol A type epoxy resin (epoxy equivalent:
186) B.I. C. Thermoplastic resin SEBS-C (MX-073, manufactured by Asahi Kasei Corporation) D. Inorganic filler Aluminum hydroxide (average particle size: 2 μm) P. phenol resin phenol novolak resin (hydroxyl equivalent: 107) Additives 1,4,4'-diaminodiphenylsulfone 2.2-heptadecylimidazole.

These adhesive solutions were applied to a 75 μm-thick silicated polyester film 1 with a bar coater to a dry thickness of about 25 μm.
It was dried at 0 ° C., 1 minute and 150 ° C. for 5 minutes to prepare an adhesive sheet. On the other hand, an adhesive solution is similarly applied to a polyester film 2 having a lower peeling force than the polyester film 1 so as to have a thickness of about 25 μm, and then dried on a roll while laminating the adhesive sheet and the adhesive surface. After winding, an adhesive sheet having a thickness of 50 μm was prepared.
The polyester films 1 and 2 at that time were embossed to form irregularities of the adhesive.

Examples 2 to 4 and Comparative Examples 1 to 5 Adhesives having the compositions shown in Table 1 were prepared in the same manner as in Example 1, and adhesive sheets were prepared in the same manner as in Example 1.

[0054]

[Table 1]

[0055]

[Table 2]

As is clear from the results shown in Table 2, the adhesive sheet for a semiconductor device obtained according to the present invention is excellent in laminating processability, adhesive strength and reflow resistance. On the other hand, Comparative Examples 1 to 5 of the present invention, which have not been subjected to surface roughening, contain air bubbles at the time of bonding, and therefore,
It can be seen that foaming occurs during reflow.

[0057]

Industrial Applicability The present invention is to industrially provide an adhesive sheet for a semiconductor device excellent in laminating processability and reflow resistance. The adhesive composition for a semiconductor device according to the present invention is suitable for surface mounting. The reliability of the semiconductor device can be improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of one embodiment of a BGA semiconductor device processed using an adhesive sheet for a semiconductor device of the present invention.

FIG. 2 is a cross-sectional view of one embodiment of a semiconductor integrated circuit connection substrate before being connected to a semiconductor integrated circuit, which is processed using the semiconductor device adhesive sheet of the present invention.

FIG. 3 is a perspective view of one embodiment of a pattern tape (TAB tape) constituting a substrate for connecting a semiconductor integrated circuit.

FIG. 4 is a cross-sectional view of one embodiment of the adhesive sheet for a semiconductor device of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Semiconductor integrated circuit 2 Gold bump 3,11,17 Flexible insulating layer 4,12,18 Adhesive layer which comprises substrate layer on which wiring was mounted 5,13,21 Conductor for connecting semiconductor integrated circuit 6,14,23 Adhesive layer composed of the adhesive composition of the present invention 7,15 Layer without conductor pattern 8,16 Solder resist 9 Solder ball 10 Sealing resin 19 Sprocket hole 20 Device hole 22 Solder Conductor part for ball connection 24 Protective film layer constituting adhesive sheet of the present invention

Continued on the front page F term (reference) 4J004 AA05 AA08 AA12 AA13 AA14 AA15 AA16 AB01 AB05 BA02 BA04 BA05 EA06 FA05 FA08 5F044 MM08 MM11 RR10

Claims (4)

[Claims] 1. An adhesive sheet for a semiconductor device comprising at least one organic insulating film layer and an adhesive layer,
An adhesive sheet for a semiconductor device, wherein at least one surface of the adhesive layer is roughened, and the depth of the unevenness is 5% or more and less than 50% of the thickness of the adhesive layer. 2. The adhesive sheet for a semiconductor device according to claim 1, wherein the adhesive constituting the adhesive sheet contains at least one of a thermoplastic resin and a thermosetting resin as essential components. 3. A substrate for connecting a semiconductor integrated circuit having (A) a wiring board layer comprising an insulator layer and a conductor pattern, (B) one or more layers each having no conductor pattern and (C) an adhesive layer. A substrate for connecting a semiconductor integrated circuit, wherein the adhesive sheet for a semiconductor device according to claim 1 is used. 4. A semiconductor device using the substrate for connecting a semiconductor integrated circuit according to claim 3.