JP2002357843A - Liquid crystal display panel - Google Patents
Liquid crystal display panelInfo
- Publication number
- JP2002357843A JP2002357843A JP2001167783A JP2001167783A JP2002357843A JP 2002357843 A JP2002357843 A JP 2002357843A JP 2001167783 A JP2001167783 A JP 2001167783A JP 2001167783 A JP2001167783 A JP 2001167783A JP 2002357843 A JP2002357843 A JP 2002357843A
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- metal film
- transparent metal
- display panel
- crystal display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、液晶表示パネルに
係り、特に、アレイ基板に対向して貼り合わされる共通
電極基板(カラーフィルタ基板に一致する)に関するも
のである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display panel, and more particularly to a common electrode substrate (corresponding to a color filter substrate) bonded to an array substrate.
【0002】[0002]
【従来の技術】従来のこの種の液晶表示パネルの一例に
ついて、図4および図5を用いて説明する。図4は、液
晶表示パネルの有効画面内での共通電極基板1を示した
ものであり、ガラス基板2上にブラックマトリクス(以
下BMと略称する)層3Aが形成されている。3Bは開
口部で、BM層を形成せずに光を透過させる部分であ
る。その後顔料樹脂を主成分とする赤の色層4A、緑の
色層4B、青の色層4Cからなる色層4が、開口部3B
上及び各色層4のパターンの一部がBM層3A上にかか
るように積層して順次形成される。次いでITOからな
る透明金属膜層5Aが、BM層3A及び開口部3B上の
全面一様に積層形成される。透明金属膜層5Aは共通電
極を構成している。また、図5は、共通電極基板1の平
面図を示したもので(但し色層4のパターンは省略して
いる)、開口部3BはXYマトリクス状に行列配置され
ている。2. Description of the Related Art An example of a conventional liquid crystal display panel of this type will be described with reference to FIGS. FIG. 4 shows the common electrode substrate 1 within the effective screen of the liquid crystal display panel. A black matrix (hereinafter abbreviated as BM) layer 3A is formed on a glass substrate 2. Reference numeral 3B denotes an opening which transmits light without forming a BM layer. Thereafter, a color layer 4 composed of a red color layer 4A, a green color layer 4B, and a blue color layer 4C mainly containing a pigment resin is formed in the opening 3B.
The upper part and a part of the pattern of each color layer 4 are sequentially laminated and formed so as to cover the BM layer 3A. Next, a transparent metal film layer 5A made of ITO is uniformly formed on the entire surface of the BM layer 3A and the opening 3B. The transparent metal film layer 5A constitutes a common electrode. FIG. 5 shows a plan view of the common electrode substrate 1 (however, the pattern of the color layer 4 is omitted), and the openings 3B are arranged in an XY matrix.
【0003】この共通電極基板1を用いた液晶表示パネ
ルでは、単数若しくは複数のアレイチップが形成された
アレイ基板と、アレイチップに対向するように開口部3
Bが形成された共通電極基板1に対し、それぞれ基板表
面にポリイミド等からなる配向膜を塗布して加熱・硬化
させ、一般的にラビング法で前記配向膜の表面に配向処
理が施される。In a liquid crystal display panel using the common electrode substrate 1, an array substrate on which one or a plurality of array chips are formed and an opening 3 facing the array chip.
On the common electrode substrate 1 on which B is formed, an alignment film made of polyimide or the like is applied to the substrate surface, heated and cured, and the surface of the alignment film is generally subjected to an alignment treatment by a rubbing method.
【0004】ここでいうアレイチップを図6に示す。X
Yマトリクス状に配置されたゲート信号線6群とソース
信号線7群、これに電気的に接続された薄膜トランジス
タ8群、および個々の薄膜トランジスタ8にはそれぞれ
画素電極9が形成され、画素電極9群は行列配置されて
いる。FIG. 6 shows an array chip referred to here. X
A pixel electrode 9 is formed on each of the group of gate signal lines 6 and the group of source signal lines 7 arranged in a Y matrix, the group of thin film transistors 8 electrically connected thereto, and the individual thin film transistors 8. Are arranged in a matrix.
【0005】配向処理後、前記2種類の基板のうちどち
らか一方の基板表面に、ギャップ形成のための一定粒子
径のビーズスペーサを分散塗布し、スペーサを含有する
シール材をアレイチップ周辺部に塗布して、2種類の基
板を図7のように、画素電極9と開口部3Bとが相対向
するように位置合わせして貼り合わせる。その後、割断
することで単一パネル化し、パネル対向間隙に液晶材料
を注入して液晶表示パネルが完成する。ここで、アレイ
チップ上の個々の薄膜トランジスタ8が駆動素子となっ
て、個々の画素電極9と、相対向する開口部3B上の透
明金属膜層5A(共通電極)との間隙内で、液晶を動作
させることができる。After the alignment treatment, a bead spacer having a constant particle diameter for forming a gap is dispersed and applied to one of the two types of substrates, and a sealing material containing the spacer is applied to the periphery of the array chip. After application, the two types of substrates are aligned and bonded such that the pixel electrode 9 and the opening 3B face each other as shown in FIG. Thereafter, the panel is cut into a single panel, and a liquid crystal material is injected into the gap between the panels to complete the liquid crystal display panel. Here, each thin film transistor 8 on the array chip serves as a driving element, and liquid crystal is formed in a gap between each pixel electrode 9 and the transparent metal film layer 5A (common electrode) on the opposing opening 3B. Can work.
【0006】[0006]
【発明が解決しようとする課題】.しかしながら、図
4、図5に示したように、透明金属膜層5Aが有効画面
内で全面に形成されたものでは、貼り合わせるまでの工
程で金属異物が混入し、図7の10Aや10Bのよう
に、ゲート信号線6あるいはソース信号線7上にこの異
物が付着すると、対向する透明金属膜層5Aと各信号線
6,7とがショート(電気的に導通)してしまう。する
と、信号線に正規の信号電圧が印加されなくなり、そし
て薄膜トランジスタへ供給されなくなるため、ゲート線
欠陥やソース線欠陥となる対向ショートといった重欠陥
不良になり、歩留まりが低下するという問題があった。However, as shown in FIGS. 4 and 5, in the case where the transparent metal film layer 5A is formed on the entire surface within the effective screen, metal foreign matter is not produced until the step of bonding. When this foreign matter is mixed and adheres to the gate signal line 6 or the source signal line 7 as shown in 10A or 10B in FIG. 7, the opposing transparent metal film layer 5A and each of the signal lines 6 and 7 are short-circuited (electrical). Conduction). Then, a normal signal voltage is not applied to the signal line, and the signal voltage is not supplied to the thin film transistor. As a result, a heavy defect such as a facing short which becomes a gate line defect or a source line defect is caused, and the yield is reduced.
【0007】また、上述の金属異物10A,10Bの高
さが基板間のギャップより少し小さい場合等は、液晶表
示パネル完成時点では各信号線と透明金属膜層間ではシ
ョートしておらず良品として出荷される。しかし、ギャ
ップの経時変動によりショートすると、線欠陥という重
欠陥不良を、市場で発生させてしまうという問題もあっ
た。When the height of the metal foreign substances 10A and 10B is slightly smaller than the gap between the substrates, the signal lines are not short-circuited between the transparent metal film layers when the liquid crystal display panel is completed, and are shipped as non-defective products. Is done. However, there is also a problem that when a short circuit occurs due to a temporal change of the gap, a heavy defect defect called a line defect occurs in the market.
【0008】本発明は、従来の問題点を解決するもので
あり、金属異物による線欠陥を減少させ、信頼性の高い
液晶表示パネルを提供することを目的とする。An object of the present invention is to solve the conventional problems, and an object of the present invention is to provide a highly reliable liquid crystal display panel by reducing line defects due to metal foreign matter.
【0009】[0009]
【課題を解決するための手段】上記目的を達成するため
に、本発明の液晶表示パネルは、透明基板の1主面上に
透明金属膜層が形成された第1の基板と、透明基板の1
主面上にX方向Y方向の信号線群を持つアレイチップが
形成された第2の基板とが、液晶を挟んで対向して貼り
合わされ、表示領域を有効画面とする液晶表示パネルお
いて、前記第1の基板に形成された透明金属膜層におけ
る前記有効画面内に、透明金属膜が存在しない任意形状
の領域を複数設けたことを特徴とするものである。In order to achieve the above object, a liquid crystal display panel according to the present invention comprises: a first substrate having a transparent metal film layer formed on one principal surface of a transparent substrate; 1
In a liquid crystal display panel in which an array chip having a signal line group in the X direction and the Y direction is formed on a main surface and opposed to each other with a liquid crystal interposed therebetween, and a display area is an effective screen, The transparent metal film layer formed on the first substrate is provided with a plurality of arbitrarily-shaped regions in which no transparent metal film exists within the effective screen.
【0010】そして、透明金属膜層における透明金属膜
が存在しない領域は、前記アレイチップのX方向信号
線、あるいはY方向信号線に沿った細長い領域とする。The region of the transparent metal film layer where the transparent metal film does not exist is an elongated region along the X direction signal line or the Y direction signal line of the array chip.
【0011】このような構成にすることにより、金属異
物がゲート信号線あるいはソース信号線上に付着して
も、それに相対向する透明金属膜が存在しないため、シ
ョートすることがなく、したがって、対向ショート不良
は激減し、歩留まり、市場品質の向上が可能となる。With such a configuration, even if metal foreign matter adheres to the gate signal line or the source signal line, there is no short circuit because there is no transparent metal film opposed to the foreign matter. The number of defects is drastically reduced, and the yield and market quality can be improved.
【0012】[0012]
【発明の実施の形態】以下、発明の実施の形態につい
て、図面を参照しながら詳細に説明する。図1は、本発
明の一実施の形態における透明金属膜層が形成された共
通電極基板を示したものであり、3BはBM層の開口
部、5Aは透明金属膜層、5Bは透明金属膜層5Aのう
ち、透明金属膜が存在しない領域である。Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows a common electrode substrate on which a transparent metal film layer is formed according to an embodiment of the present invention, wherein 3B is an opening of a BM layer, 5A is a transparent metal film layer, and 5B is a transparent metal film. This is a region where the transparent metal film does not exist in the layer 5A.
【0013】図4に示したように、ガラス基板2の1主
面上に、厚さ約1000×10-10m(または1000
オングストローム)のBM層3Aと開口部3Bをパター
ン形成し、その後厚さ約2×10-6m(または2μm)
で顔料樹脂からなる赤,緑,青の色層4A,4B,4C
をフォトリソグラフィ法により形成する。次いで厚さ約
1500×10-10m(または1500オングストロー
ム)のITO透明金属膜層5Aを、フォトリソグラフィ
法により形成して設け、共通電極基板を形成する。As shown in FIG. 4, a thickness of about 1000 × 10 −10 m (or 1000
(Angstrom) BM layer 3A and opening 3B are patterned and then about 2 × 10 −6 m (or 2 μm) thick
Red, green and blue color layers 4A, 4B and 4C made of pigment resin
Is formed by a photolithography method. Next, an ITO transparent metal film layer 5A having a thickness of about 1500 × 10 −10 m (or 1500 angstroms) is formed by photolithography to form a common electrode substrate.
【0014】この時、ITO透明金属膜5Aは、図1に
示すように、アレイチップと貼り合わせた時のゲート信
号線及びソース信号線の相対向する部分に、透明金属膜
が存在しない領域5Bをパターンとして設けるように形
成する。At this time, as shown in FIG. 1, the ITO transparent metal film 5A is formed in a region 5B where the transparent metal film does not exist in the opposing portions of the gate signal line and the source signal line when bonded to the array chip. Is formed so as to be provided as a pattern.
【0015】なお、ITO透明金属膜が存在しない領域
は、図2の5C、図3の5Dのように、それぞれゲート
信号線やソース信号線に沿った細長い領域だけでもよ
い。The region where the ITO transparent metal film does not exist may be only an elongated region along the gate signal line and the source signal line as shown in 5C in FIG. 2 and 5D in FIG.
【0016】また、BM層,色層,ITO透明金属膜層
の厚みは、必要とする光学特性により、この値に限定さ
れるものではない。The thicknesses of the BM layer, the color layer, and the ITO transparent metal film layer are not limited to these values depending on required optical characteristics.
【0017】また、ITO透明金属膜層はフォトリソグ
ラフィ法以外の方法で形成されて得られるものも使用可
能である。The ITO transparent metal film layer may be formed by a method other than the photolithography method.
【0018】また、ITO透明金属膜層のパターン形成
する部分は、表示する有効画面の内側のみに限定しても
良い。The pattern-forming portion of the ITO transparent metal film layer may be limited only to the inside of the effective screen to be displayed.
【0019】また、色層形成後にアクリル樹脂又はポリ
イミド樹脂からなる透明樹脂層を形成して層上を平坦化
し、次いでITO透明金属膜層を形成しても使用可能で
ある。It is also possible to use a transparent resin layer made of an acrylic resin or a polyimide resin after forming the color layer, flattening the layer, and then forming an ITO transparent metal film layer.
【0020】また、透明金属膜層はITO金属以外で
も、必要とする光学特性により、この透明金属に限定さ
れるものではない。The transparent metal film layer is not limited to the ITO metal, but is not limited to the transparent metal depending on the required optical characteristics.
【0021】[0021]
【発明の効果】以上説明したように、本発明によれば、
ゲート信号線やソース信号線上に金属異物が付着して
も、相対向する共通電極基板上の透明金属膜層の対応す
る部分には、ほぼ透明金属膜が存在しない領域となって
いるため、ゲート線欠陥やソース線欠陥が発生しにくい
液晶表示パネルとなる。As described above, according to the present invention,
Even if metal foreign matter adheres to the gate signal line or the source signal line, the corresponding portion of the transparent metal film layer on the opposed common electrode substrate is a region where the transparent metal film does not substantially exist. A liquid crystal display panel in which line defects and source line defects hardly occur is obtained.
【0022】このため、従来のようにゲート信号線やソ
ース信号線上に金属異物が付着して液晶表示パネル完成
時に線欠陥不良となって歩留まりを悪化させるというよ
うなことが激減する。あるいは、液晶表示パネル出荷後
にギャップの経時変動が起こっても、対向ショート(上
述の線欠陥不良)が激減すため、歩留まり面,市場品質
面の向上が図れ、実用的に極めて有効である。For this reason, it is greatly reduced that a metal foreign matter adheres to a gate signal line or a source signal line and causes a line defect at the time of completion of a liquid crystal display panel to deteriorate the yield as in the related art. Alternatively, even if the gap fluctuates with time after shipment of the liquid crystal display panel, the opposing short-circuit (the above-described line defect failure) is drastically reduced, so that the yield surface and the market quality can be improved, which is extremely effective practically.
【図1】本発明の一実施の形態における透明金属膜層が
形成された共通電極基板の要部平面図FIG. 1 is a plan view of a main part of a common electrode substrate on which a transparent metal film layer is formed according to an embodiment of the present invention.
【図2】本発明の他の実施の形態における透明金属膜層
が形成された共通電極基板の要部平面図FIG. 2 is a plan view of a main part of a common electrode substrate on which a transparent metal film layer is formed according to another embodiment of the present invention.
【図3】本発明のさらに他の実施の形態における透明金
属膜層が形成された共通電極基板の要部平面図FIG. 3 is a plan view of a main part of a common electrode substrate on which a transparent metal film layer is formed according to still another embodiment of the present invention.
【図4】従来例における透明金属膜が全面に形成された
共通電極基板の断面図。FIG. 4 is a cross-sectional view of a common electrode substrate having a transparent metal film formed on the entire surface in a conventional example.
【図5】図4の共通電極基板の要部平面図FIG. 5 is a plan view of a main part of the common electrode substrate of FIG. 4;
【図6】従来例におけるアレイ基板の平面図FIG. 6 is a plan view of an array substrate in a conventional example.
【図7】従来例における図5の共通電極基板と図6のア
レイ基板とを貼り合わせた状態の要部平面図FIG. 7 is a plan view of a main part of a conventional example in which the common electrode substrate of FIG. 5 and the array substrate of FIG. 6 are bonded together;
1 共通電極基板 2 ガラス基板 3A BM(ブラックマトリクス)層 3B 開口部 4 色層 4A,4B,4C 赤,緑,青の色層 5A 透明金属膜層 5B,5C,5D 透明金属膜が存在しない領域 6 ゲート信号線 7 ソース信号線 8 薄膜トランジスタ 9 画素電極 10A,10B 信号線上に付着した金属異物 REFERENCE SIGNS LIST 1 common electrode substrate 2 glass substrate 3A BM (black matrix) layer 3B opening 4 color layer 4A, 4B, 4C red, green, blue color layer 5A transparent metal film layer 5B, 5C, 5D Region where no transparent metal film exists Reference Signs List 6 Gate signal line 7 Source signal line 8 Thin film transistor 9 Pixel electrode 10A, 10B Metallic foreign matter adhering on signal line
Claims (7)
成された第1の基板と、透明基板の1主面上にX方向Y
方向の信号線群を持つアレイチップが形成された第2の
基板とが、液晶を挟んで対向して貼り合わされ、表示領
域を有効画面とする液晶表示パネルおいて、前記第1の
基板に形成された透明金属膜層における前記有効画面内
に、透明金属膜が存在しない任意形状の領域を複数設け
たことを特徴とする液晶表示パネル。1. A first substrate having a transparent metal film layer formed on one main surface of a transparent substrate, and a first substrate having a transparent metal film layer formed on one main surface of the transparent substrate.
And a second substrate on which an array chip having signal lines in different directions is formed, which are bonded to each other with a liquid crystal interposed therebetween, and formed on the first substrate in a liquid crystal display panel having a display area as an effective screen. A liquid crystal display panel, wherein a plurality of arbitrarily-shaped regions in which no transparent metal film exists are provided in the effective screen of the transparent metal film layer.
しない領域は、アレイチップのX方向信号線に沿った細
長い領域であることを特徴とする請求項1記載の液晶表
示パネル。2. The liquid crystal display panel according to claim 1, wherein the area of the transparent metal film layer where the transparent metal film does not exist is an elongated area along the X-direction signal line of the array chip.
しない領域は、アレイチップのY方向信号線に沿った細
長い領域であることを特徴とする請求項1記載の液晶表
示パネル。3. The liquid crystal display panel according to claim 1, wherein the region of the transparent metal film layer where the transparent metal film does not exist is an elongated region along the signal line in the Y direction of the array chip.
しない領域は、フォトリソグラフィ法により形成された
ことを特徴とする請求項1〜3のいずれか1項に記載の
液晶表示パネル。4. The liquid crystal display panel according to claim 1, wherein a region of the transparent metal film layer where no transparent metal film exists is formed by a photolithography method.
特徴とする請求項1〜4のいずれか1項に記載の液晶表
示パネル。5. The liquid crystal display panel according to claim 1, wherein the transparent metal film layer is made of ITO.
することを特徴とする請求項1記載の液晶表示パネル。6. The liquid crystal display panel according to claim 1, wherein the array chip has a thin film transistor.
ic)型液晶であることを特徴とする請求項1記載の液
晶表示パネル。7. The liquid crystal is TN (Twist Nemat).
2. The liquid crystal display panel according to claim 1, wherein the liquid crystal display panel is an ic) type liquid crystal.
Priority Applications (1)
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JP2001167783A JP2002357843A (en) | 2001-06-04 | 2001-06-04 | Liquid crystal display panel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001167783A JP2002357843A (en) | 2001-06-04 | 2001-06-04 | Liquid crystal display panel |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2002357843A true JP2002357843A (en) | 2002-12-13 |
Family
ID=19010121
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2001167783A Pending JP2002357843A (en) | 2001-06-04 | 2001-06-04 | Liquid crystal display panel |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004348131A (en) * | 2003-05-20 | 2004-12-09 | Samsung Electronics Co Ltd | Liquid crystal display and thin film transistor display panel therefor |
JP2009230011A (en) * | 2008-03-25 | 2009-10-08 | Nikon Corp | Liquid crystal panel, display device, and projector |
JP2009230010A (en) * | 2008-03-25 | 2009-10-08 | Nikon Corp | Liquid crystal panel, display device, and projector |
US8446350B2 (en) | 2008-03-25 | 2013-05-21 | Nikon Corporation | Liquid crystal panel, liquid crystal panel device, display device, and projector |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5699383A (en) * | 1980-01-11 | 1981-08-10 | Citizen Watch Co Ltd | Display panel |
JPS5955787A (en) * | 1982-09-24 | 1984-03-30 | Fukubi Kagaku Kogyo Kk | Transfer printing method of thermoplastic synthetic resin extrusion molded product |
JPS6280626A (en) * | 1985-10-04 | 1987-04-14 | Hosiden Electronics Co Ltd | Liquid crystal display element |
JPS6425133A (en) * | 1987-07-22 | 1989-01-27 | Nec Corp | Thin film transistor array type liquid crystal display device |
JPH023022A (en) * | 1988-06-20 | 1990-01-08 | Fujitsu Ltd | Liquid crystal display device |
JPH02136233A (en) * | 1988-09-30 | 1990-05-24 | Ciba Geigy Ag | Electric conductive support material and polymer film and manufacture thereof |
JPH06118447A (en) * | 1992-10-06 | 1994-04-28 | Sony Corp | Liquid crystal panel |
JPH06281959A (en) * | 1993-03-29 | 1994-10-07 | Casio Comput Co Ltd | Active matrix liquid crystal display device |
JPH0915619A (en) * | 1995-06-28 | 1997-01-17 | Toshiba Corp | Active matrix type liquid crystal display device |
-
2001
- 2001-06-04 JP JP2001167783A patent/JP2002357843A/en active Pending
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5699383A (en) * | 1980-01-11 | 1981-08-10 | Citizen Watch Co Ltd | Display panel |
JPS5955787A (en) * | 1982-09-24 | 1984-03-30 | Fukubi Kagaku Kogyo Kk | Transfer printing method of thermoplastic synthetic resin extrusion molded product |
JPS6280626A (en) * | 1985-10-04 | 1987-04-14 | Hosiden Electronics Co Ltd | Liquid crystal display element |
JPS6425133A (en) * | 1987-07-22 | 1989-01-27 | Nec Corp | Thin film transistor array type liquid crystal display device |
JPH023022A (en) * | 1988-06-20 | 1990-01-08 | Fujitsu Ltd | Liquid crystal display device |
JPH02136233A (en) * | 1988-09-30 | 1990-05-24 | Ciba Geigy Ag | Electric conductive support material and polymer film and manufacture thereof |
JPH06118447A (en) * | 1992-10-06 | 1994-04-28 | Sony Corp | Liquid crystal panel |
JPH06281959A (en) * | 1993-03-29 | 1994-10-07 | Casio Comput Co Ltd | Active matrix liquid crystal display device |
JPH0915619A (en) * | 1995-06-28 | 1997-01-17 | Toshiba Corp | Active matrix type liquid crystal display device |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004348131A (en) * | 2003-05-20 | 2004-12-09 | Samsung Electronics Co Ltd | Liquid crystal display and thin film transistor display panel therefor |
US8334958B2 (en) | 2003-05-20 | 2012-12-18 | Samsung Display Co., Ltd. | Liquid crystal display and thin film transistor array panel therefor |
JP2009230011A (en) * | 2008-03-25 | 2009-10-08 | Nikon Corp | Liquid crystal panel, display device, and projector |
JP2009230010A (en) * | 2008-03-25 | 2009-10-08 | Nikon Corp | Liquid crystal panel, display device, and projector |
US8446350B2 (en) | 2008-03-25 | 2013-05-21 | Nikon Corporation | Liquid crystal panel, liquid crystal panel device, display device, and projector |
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