JP2002289662A - Failure cause searching program and failure cause searching system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a failure cause searching program that can automatically perform commonality analysis by using coordinate distribution and can be applied even for a large item small volume production line. SOLUTION: Search/acquisition processing 11 of test data, binary two-dimensional map group making processing 12 of the test data, and search/acquisition processing 13 of a processing history are executed. Then, grouping processing 15 of a binary two-dimensional map group at every processing position, group- average map making processing 16, and map comparison analyzing processing 17 among groups are executed repeatedly at every process. Failure cause candidate extracting processing 19 is executed based on the result of the map comparison analysis among groups of each process.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor integrated circuit,
A program that searches for the cause of defects in products that manufacture multiple products such as thin-film magnetic heads and optical devices with one product,
And a device or system for executing the program.

[0002]

2. Description of the Related Art The prior art will be described below by taking the manufacture of a semiconductor integrated circuit as an example. 2. Description of the Related Art Generally, a semiconductor integrated circuit (hereinafter referred to as an LSI) has a multi-layered circuit pattern and other layers on a silicon wafer, and a pre-process for manufacturing a plurality of chips (elements), and separates each chip to complete an individual product. It is divided into post-process. Most of the defects that occur during manufacturing occur in long and long pre-processes involving fine processing, and improving yield in the pre-process is an important issue for low-cost production. Here, the yield in the previous process refers to the ratio of non-defective chips determined by the result of the electrical inspection, which is the final test in the previous process, that is, the ratio of non-defective chips to the total number of chips on the wafer.

[0003] Pre-process failures can be broadly classified into functional failures and parametric failures. A functional defect is a defect in which a circuit is not normally operated due to a foreign matter or a pattern defect (hereinafter, collectively referred to as a defect) generated during manufacturing, which mainly causes a disconnection or short circuit of a circuit pattern. On the other hand, a parametric defect is a defect in which the operating speed of a transistor does not satisfy the design specifications due to subtle process variations such as processing dimensions and oxide film thickness.

In general, a defect inspection apparatus is used in a pre-process manufacturing line for the purpose of detecting a defect that causes a malfunction. In addition, a dimension measuring device or a film thickness measuring device is used for measuring a processing dimension or an oxide film thickness which is a cause of the parametric failure.

[0005] The search for the cause of the defect is performed by detecting the above defect inspection apparatus, the measurement result of the dimension measuring apparatus, the measurement result of the film thickness measuring apparatus, and the result of the electric inspection for judging a good or defective LSI chip. Is used. For example, the detection result of the defect inspection apparatus is further analyzed by observation with an electron microscope, elemental analysis, and the like, and analyzed in detail to determine the source of the defect.

As a means for searching for the cause of a defect, there is a method called commonality analysis. The commonality analysis is a method of specifying a common apparatus or a chamber in the apparatus that processes a wafer in which defective products frequently occur. For example, when there are two film forming apparatuses on a production line, the yield of wafers processed by the first film forming apparatus tends to be low, and the yield of wafers processed by the second film forming apparatus tends to be high. To find out.

Conventionally, the commonality analysis is based on the experience of a technician, limiting the process, visually judging the difference from the yield transition diagram for each processing device, and comparing the difference from the coordinate distribution of defects for each processing device. Was visually determined. An example of a method for displaying the coordinate distribution of defects for each processing apparatus is described in Japanese Patent Application Laid-Open No. H11-45919.

Japanese Patent Application Laid-Open No. 2000-12640 discloses an example of a method of automatically performing commonality analysis from numerical data such as the yield and the number of defects for each processing device. In this method, first, numerical data such as yield and the number of defects are grouped for each processing device for each process, and variance analysis is performed between groups. As a result of analysis of variance, differences in numerical data between groups are quantified, and steps having a large difference are extracted.

[0009] In addition, a method of prioritizing each process in a similar manner and automatically creating a decision tree based on a group is searched for a cause of failure, which is described in the Proceedings of International Conference held in 2000. the ninth international sympo
sium on semiconductor manufacturing ”pp.249-252
Paper “Yield analysis and improvement by reducing
manufacturing fluctuation noise "etc. Several defect search programs that automatically create similar decision trees are commercially available from several companies.

[0010]

The use of the coordinate distribution of non-defective products and defective products output from the electrical inspection apparatus and the coordinate distribution of defects output from the defect inspection for the search for the cause of the defect is difficult.
It has been known to be effective. However, the conventional defect cause search program that automatically performs commonality analysis is limited to one that handles simple numerical data such as yield and the number of defects.

The present invention provides a failure cause search program for automatically performing commonality analysis using a coordinate distribution.
The present invention provides a program that can be used even in a production line for high-mix low-volume production.

[0012]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and is directed to a semiconductor integrated circuit such as a wafer.
A program for searching for a cause of a defect in a product that forms a plurality of products on one substrate, the process history information having processing position information for each process of manufacturing the plurality of substrates,
An input function of inputting inspection result information of the plurality of substrates corresponding to the processing history information, and a coordinate distribution map for each of the substrates based on the inspection result information of the plurality of substrates input by the input function; , The coordinate distribution map for each substrate is divided into groups by processing position information for each process, an average map of the coordinate distribution map is created for each group, and a candidate for a defective cause process is determined from the average map for each group. Calculation function to extract,
An output function of outputting a candidate of a cause-of-failure process extracted by the calculation function is provided.

[0013]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an L to which the program of the present invention is applied.
FIG. 1 is an embodiment showing a block diagram of a system used in a manufacturing process of an SI wafer.

In FIG. 1, reference numeral 31 denotes the first film forming apparatus,
32 is the second film forming device, 33 is the first coating device, 3
4 is the second coating apparatus, 41 is the first exposure apparatus, 42
Is the second exposure apparatus, 43 is the third exposure apparatus, 44 is the fourth exposure apparatus, 51 is the first etching apparatus, 5
2 is the second etching device, 53 is the third etching device, 61 is the diffusion heat treatment device, 62 is the first cleaning device, 63 is the second cleaning device, 71 is the electrical inspection device (tester), and 72 is the defect. Inspection device, 73 is a dimension measuring device, 7
4 is a film thickness measuring device, 80 is a local area network, 81 is a processing history database, 82 is an inspection result database, and 90 is a defect cause searching device.

Film forming devices 31 to 32, coating devices 33 to 3
4, exposure devices 41 to 44, etching devices 51 to 53,
Manufacturing apparatuses such as a diffusion heat treatment apparatus 61 and cleaning apparatuses 62 to 63 are connected to a processing history database 81 via a local area network 80, and each time a wafer is processed, a wafer ID, a manufacturing apparatus code number, a manufacturing apparatus The code number of the processing position in the process history database 8
Send to 1. The processing history database 81 receives the ID of the wafer, the code number of the manufacturing apparatus, and the code number of the processing position in the manufacturing apparatus transmitted from each manufacturing apparatus, and stores them in the database.

On the other hand, the electric inspection device 71 and the defect inspection device 7
2. Inspection devices such as a dimension measurement device 73 and a film thickness measurement device 74 are connected to an inspection result database 82 via a local area network 80. Each time a wafer is inspected, the ID of the wafer and the code number of the inspection device are used. The inspection result is transmitted to the inspection result database 82. The inspection result database 82 receives the ID of the wafer, the code number of the inspection device, and the inspection result transmitted from each inspection device,
Store in database.

The program of the present invention is provided in a defect cause searching device 90. The defect cause searching device 90 is connected to the processing history database 8 via the local area network 80.
1 and an inspection result database 82, and collects data stored in each database from a data input unit 91. The failure cause searching device 90 processes the collected data by a calculation process in the calculation unit 92 and outputs the result of the failure cause search in the result output unit 93. Failure cause searching device 90
Is a computer such as a personal computer and a workstation. The data input unit 91 is a communication device with the local area network 80, a keyboard or mouse device for manual input, a magnetic disk, an optical disk, or the like, and is not necessarily an input unit via the local area network 80. The result output unit 93 is a computer display, a printer, a magnetic disk, an optical disk, or the like.

FIG. 2 shows an embodiment of a procedure for searching for the cause of a defect that has occurred in the course of manufacturing an LSI wafer by using the program of the present invention.

In FIG. 2, first, in process 11, search and acquisition of inspection data are performed. Inspection data includes defect inspection to detect foreign substances and pattern defects generated in the LSI wafer manufacturing process, electrical inspection to determine good and bad products of each LSI chip in the final process of the LSI wafer, and circuits formed on the LSI wafer. It refers to dimension measurement for measuring the exposure or etching state of a pattern, film thickness measurement for measuring the film formation state on an LSI wafer, and the like.

For example, reference numeral 101 in FIG. 3 shows an example of the results of the determination of a good product and a defective product in the electrical inspection. A round frame represents a wafer, and a square frame represents each LSI chip in the wafer. “P” in the square frame is a pass, that is, a good chip, and “F” is a fail, that is, a defective chip.
Also, reference numeral 111 in FIG. 4 is another example of the result of the electrical inspection as in FIG. Here, “A”, “B”, and “C” are the mode classification results output by the electrical inspection device. 101 in FIG.
The output at “F” or “P” as shown in FIG. 4 or the output at “A”, “B” or “C” as shown at 111 in FIG. Dependent, "F",
The definitions of “P”, “A”, “B”, and “C” are stored in the inspection result database 82.

3 and 111 in FIG. 4 are stored in the inspection result database 82 together with the type name, the inspection date and time, and the wafer ID. Then, the information is collected by the defect cause searching device 90.

Next, in FIG. 2, in a process 12, a binary two-dimensional map group of all collected inspection data is created. The binary two-dimensional map is obtained by dividing inspection data into a grid at coordinate positions in a wafer and setting the value to 1 or 0.

For example, reference numeral 103 in FIG.
1 is an example of a binary two-dimensional map of 1; Inspection data 101
Is the coordinate of one chip and the coordinate of the lower left chip is x =
Inspection data 102 is obtained when 1, 1 = 1. 2
The value two-dimensional map 103 is obtained by setting “P” of the inspection data 102 to 0 and “F” to 1.

4 shows the inspection data 111.
3 is an example of a binary two-dimensional map. The inspection data 111 is defined as one coordinate per chip, and the coordinate of the lower left chip is x = 1,
The inspection data 112 is obtained when y = 1. Binary 2
The dimension map 113 is obtained by setting “A” and “B” of the inspection data 112 to 0 and “C” to 1. 1 is given to the search target of the cause of occurrence. In this example, the cause of occurrence of “C” is searched.

FIG. 5 shows an example of the result of creating a binary two-dimensional map group. In FIG. 5, the inspection data of the twelve wafers are converted into binary two-dimensional maps 121 to 132.

Next, in FIG. 2, in process 13, search and acquisition of the processing history of the wafer are performed. 12 shown in FIG.
Using the wafer IDs of the two binary two-dimensional maps 121 to 132 as search conditions, processing history data of 12 wafers is collected from the processing history database 81 via the local area network 80.

FIG. 6 shows an example of the processing history data. The processing history data 161 is data of a wafer for the binary two-dimensional map 121, and the processing history data 162 is
9 shows wafer data for the binary two-dimensional map 122. The processing history data 161 and 162 are excerpts from Steps 242 to 249, and although there are long processing steps before and after this, they are omitted. Processing history data 161 is
In step 242, processing is performed at the position of processing position number 57003,
In step 243, processing is performed at the processing position number 48001,
In step 244, processing is performed at the position of the processing position number 32401,
In step 245, processing is performed at the position of the processing position number 33403,
In step 246, processing is performed at the position of processing position number 60001,
In step 247, processing is performed at the processing position number 72002,
In step 248, processing is performed at the processing position number 60003.
Step 249 means that processing was performed at the position of processing position number 48003.

The processing position numbers are defined in a processing position number correspondence table 170 shown in FIG. In the example of FIG.
The chamber A of the first film-forming apparatus 31 indicated by the mark is the processing position number 48001, the chamber B of the same apparatus is the processing position number 48002, the chamber A of the second film-forming apparatus 32 is the processing position number 48003, and Chamber B has a processing position number 48004, and a processing position number is registered for each chamber of the apparatus. Also, the coating device No. 33 shown in FIG.
Reference numeral 4 denotes a processing position device 32402 and an exposure device No. 41
Is the processing position number 33401, the second exposure apparatus is the processing position number 33402, the third exposure apparatus is the processing position number 33403, and the fourth exposure apparatus is the processing position number 3340.
4. The first etching equipment has a processing position number of 6000
1, Etching equipment No.2, processing position number 6000
2.Etching equipment No.3, processing position number 6000
3. The first cleaning apparatus has a processing position number 72001, and the second cleaning apparatus has a processing position number 72002, and a processing position number is registered for each apparatus. The position A in the furnace of the diffusion heat treatment apparatus is processing position number 57001, the position B in the furnace of the diffusion heat treatment apparatus is processing position number 57002, and the position C in the furnace of the diffusion heat treatment apparatus is processing position number 57003. A processing position number is registered for each location in the body. As described above, in the embodiment of the present invention, the processing position is represented by a unit of a chamber, a unit of an apparatus, a unit of a predetermined position range in a furnace, and the like.

FIG. 8 shows an example of the position in the furnace of the diffusion heat treatment apparatus. A rectangle 171 is a schematic diagram of the furnace body, and a rectangular mouth is an entrance of the furnace body. One of the 172 line segments is 1
Represents one wafer. In the example of FIG. 8, the inside of the furnace is divided into three equal parts, positions A, B, and C are defined from near the entrance, and the processing position number correspondence table 170 shown in FIG. 7 is registered.

The processing position number correspondence table 170 shown in FIG. 7 is stored in the processing history database 81, and is collected simultaneously with the processing history data shown in FIG.

Next, in FIG.
During this period, the processing is repeated by the number of processing steps of the collected processing history data. Processes 14 and 18 are performed based on the process position number of each process in the order of processes from the top of the process history data.

In FIG. 2, in process 15, grouping of a binary two-dimensional map group is performed for each processing position. The grouping of the two-dimensional two-dimensional map group means that the two-dimensional two-dimensional map group as shown in FIG. 5 is classified based on the processing position number of each process of the processing history data of each wafer. As a result, the grouping is performed based on the processing positions (units, units, etc.) constituting the manufacturing line.

In step 16, an average map is created for each group based on the grouping result of step 15. For example, FIGS. 9 and 10 show examples of the average map creation result.

FIG. 9 shows the result of creating an average map in step 244. Step 244 is a coating step, and the processing history data includes the first coating apparatus (processing position number 3240).
1) or the second coating device (processing position number 3240)
Either of 2) is described. Here, five process history data processes 244 for the binary two-dimensional maps 121 to 125 in FIG.
A description will be given assuming that a process position number 32402 is a process position 244 of seven process history data for the binary two-dimensional maps 126 to 132. In this case, the process 15 is divided into two groups of two-dimensional two-dimensional maps 121 to 125 and two groups of two-dimensional two-dimensional maps 126 to 132.

In FIG. 9, an average map 141 of the two-dimensional two-dimensional map is an average map of the two-dimensional two-dimensional maps 121 to 125 corresponding to the processing position number 32401 of the process 244. 142 is a two-dimensional two-dimensional map 126-1 having the processing position number 32402
It is an average map of 32. The average map is obtained by calculating an average value for each coordinate of the binary two-dimensional map of the same group. For example, coordinates x = 3, y of the average map 141
= 1 is the average value of the values of the coordinates x = 3, y = 1 in the two-dimensional two-dimensional maps 121 to 125 in FIG.

FIG. 10 shows the result of creating an average map in step 246. Step 246 is an etching step.
One of the first etching apparatus (processing position number 60001), the second etching apparatus (processing position number 60002), and the third etching apparatus (processing position number 60003) are described in the processing history data. Here, the binary two-dimensional maps 121, 124, 127, and 130 of FIG.
Is the process position number 60001 and the two-dimensional two-dimensional maps 122, 1
The process 246 of the four process history data for 25, 128, and 131 is the process position number 60002,
4 for the dimension maps 123, 126, 129, 132
The process 246 of the two pieces of processing history data has the processing position number 60
003 is an example. In this case, processing 1
5, the binary two-dimensional maps 121, 124, 127, 1
30 groups, binary two-dimensional maps 122, 125, 1
28, 131 groups, binary two-dimensional map 123, 1
26, 129 and 132.

In FIG. 10, the average map 151 of the binary two-dimensional map is a process position number 60001 of the process 246.
Binary two-dimensional maps 121, 124, 127, 1
30 is an average map, and the binary two-dimensional map 152 is
Binary two-dimensional map 12 having processing position number 60002
The two-dimensional two-dimensional map 153 is an average map of the two-dimensional two-dimensional maps 123, 126, 129, and 132 having the processing position number 60003.

Next, in FIG. 2, in a process 17, an average map comparison analysis between groups is performed. For example, in the average map comparison analysis of the average maps 141 and 142 in FIG. 9, first, the absolute value of the difference between the values of the same coordinates of the average maps 141 and 142 is calculated. For coordinates x = 2, y = 1, one-seventh is subtracted from one-fifth, and the absolute value is 0.0571. For coordinates x = 3, y = 1, 0.1143, coordinate x = 1. , Y
When = 2, it is calculated as 0.1143. Next, the maximum value calculated at each coordinate is obtained. The maximum value is x =
2, y = 2, which is 0.2857. This value is used in step 244.
And the result of Here, the calculated maximum value means the variation of the frequency of occurrence of defects between the two coating devices used in the coating process (process 244) as viewed on a chip-by-chip basis. It can be said that there is a high possibility that there is a certain cause of failure in the coating apparatus. In the present embodiment, the method of calculating the maximum value based on the difference between the average values has been described. However, as long as it is a method of quantitatively calculating the degree of variation in the frequency of occurrence of defects, other methods have the same effect,
It is within the scope of the present invention. In addition, the method is not limited to the case of calculating from the average value of the chip unit (one coordinate), but may be a method using the average value of several chip units.

In the average map comparison analysis of the average maps 151 to 153 in FIG. 10, the absolute value of the difference between the values of the same coordinates of the average maps 151 and 152 is calculated, and the maximum value is obtained.
The maximum value is 0.75 when x = 3 and y = 1. Similarly,
Average maps 151 and 153, Average maps 152 and 153
But do the same calculation to find the maximum value. Average map 151
And 153, the maximum value 0.25, the average map 152 and 1
At 53, the maximum value is 1. The maximum value of 0.75, 0.25, and 1 is taken as the result of step 246. here,
The calculated maximum value indicates a variation in the frequency of occurrence of defects among the three etching devices used in the etching process (process 246) on a chip basis, and the larger the variation, the more one or two of the three devices. It can be said that there is a high possibility that there is a certain cause of failure in the coating apparatus. In the present embodiment, the method of calculating the maximum value based on the difference between the average values has been described. Similar effects are provided and are within the scope of the present invention. In addition, the method is not limited to the case of calculating from the average value of the chip unit (one coordinate), but may be a method of using the average value of several chip units.

Here, in FIG. 9, the average map 141
Analysis of variance using the values of the coordinates of the coordinates 142 and 142 is one method, but is often ineffective. In the present invention, it is necessary to extract a difference limited to a certain coordinate or a few coordinates, instead of extracting a difference in overall tendency between the average maps 141 and 142. If a difference is extracted based on the overall tendency, the result is almost the same as the conventional analysis of variance of numerical data using the yield and the number of defects without using an average map. As described above, by extracting the maximum value, a difference limited to one coordinate or several coordinates can be extracted. However, when it is difficult to use the method in combination with the conventional method, analysis of variance may be used.

Next, in FIG. 2, in a process 19, a defect cause candidate is extracted between the processes 14 and 18 based on the average map comparison analysis result repeatedly calculated for each process. Based on the results of the average map comparison analysis, the processes are aligned based on the maximum absolute value of the difference between the same coordinates in each process. As a result of the sorting, the process having the largest maximum value can be extracted as the largest candidate of the defect causing process which is most likely to cause a defect. Further, among a plurality of processing apparatuses constituting the defect cause process or a plurality of processing positions (chambers and the like) constituting an apparatus used for the defect cause process, a processing apparatus or a processing position having a high possibility of having a defect cause Can be extracted,
The time required for dealing with defects can be reduced.

FIG. 11 shows an example of the result output section 93 of the failure cause searching device 90 in FIG. 210 is an example of displaying the result on the display of the computer. 21
1 is a list of defect cause candidate processes arranged in the order of candidates based on the average map comparison analysis results. Here, when the part 212 is selected with the mouse, 213 is output. 213 is the average map 1 of the selected process 246
51, 152, and 153 are displayed on the screen. In this example, numerical values are displayed. However, if a gray scale value or coloring according to the value is used instead of the numerical value, it is easy for the analyst who is the user to understand and effective. Reference numeral 214 denotes a bold frame of a chip which is the basis for calculating that this process is the cause of the defect. By giving this chip a different color, the analyst who is a user can easily understand the display result.

In the above embodiment, an example has been described in which the processing history data and the inspection data are acquired from the processing history database 81 and the inspection result database 82 and the cause of the defect is searched. However, it is also effective not to acquire data from the database, but to manually input the data or create the data by another means and perform only the processes 15 to 17 in FIG.

In the above embodiment, the L
This is an example for an SI wafer. The implementation of the present invention, as shown in FIG.
The use of a larger number of data makes it possible to search for the cause of the defect with higher accuracy. However, it is difficult to use a large number of data of the same type in an LSI of a large variety and small production such as a system LSI. LSIs of different types have different chip sizes.

Therefore, an embodiment of a method for searching for a cause of a defect in a plurality of types of LSI wafers having different chip sizes according to the present invention will be described.

FIG. 12 shows an example of a method for creating a binary two-dimensional map from a plurality of types of LSI wafers having different chip sizes. Reference numeral 181 denotes an electrical inspection result of the first type, and reference numeral 182 denotes a binary two-dimensional map created by the above-described method. On the other hand, reference numeral 184 denotes an electrical inspection result of the second type, and reference numeral 185 denotes the binary two-dimensional map. Binary 2
Dimension maps 182 and 185 have different coordinate systems. That is, the two-dimensional two-dimensional map 182 has a coordinate system in which the diameter of the wafer is approximately divided into four, and the two-dimensional two-dimensional map 185 has a coordinate system in which the diameter of the wafer is approximately divided into eight. Therefore, when the least common multiple of 4 and 8 is obtained for the purpose of creating an average map, the least common multiple is 8. The binary two-dimensional map 182 is converted into a binary two-dimensional map 183 based on the least common multiple. In the present embodiment, one coordinate (one chip) of the two-dimensional two-dimensional map 182 is divided into four and the same numerical value is set for each, but one coordinate (one chip) of the two-dimensional two-dimensional map 182 is set. If there is detailed failure data corresponding to the division position in the above, the data may be used.

Here, comparing the shapes of the two-dimensional two-dimensional map 183 and the two-dimensional two-dimensional map 185, the shaded portions of the two-dimensional two-dimensional map 186 are different. In the binary two-dimensional map 183, the hatched portion 186 does not exist. When there is a discrepancy in the area where the chips are present, data for comparing the average values cannot be obtained from the map 183, and thus the data on the chips in the hatched portion of the map 186 is unnecessary for this analysis. . Therefore, the shape is adjusted to 183 having a small number of chips. Using the unified two-dimensional two-dimensional map, the processing steps having a high possibility of having a defect cause are extracted in the same procedure as the above-described defect search of the same kind, and the processing position having a high possibility of having a defect cause is also added. Extract.

In the present embodiment, the coordinate system is set by the least common multiple of the number of chips viewed in the direction of a certain coordinate system. However, the present invention is not limited to this, and it is also effective to set a coordinate system finer than the above example. It is.

The above is an example showing an embodiment of a failure cause search program using the result of the electrical inspection and its apparatus. The present invention can utilize not only the results of the electrical inspection but also other inspection results as well. As an example, an example of an embodiment of a failure cause searching device using inspection data of a defect inspection will be described.

FIG. 13 shows an example of a method for creating a binary two-dimensional map from inspection data for defect inspection. 190 is
The inspection data (defect coordinates) of the defect inspection is represented as a wafer map. A round frame indicates a wafer, a square frame indicates a chip, and black dots 201 to 208 indicate the positions of defects. In this example, eight defects 201 to 208 exist. This is converted to a binary two-dimensional map.
92. The binary two-dimensional map 192 is the defect map 1
From 90, a chip having a defect in each chip is set to 1 and a chip having no defect is set to 0.

When a binary two-dimensional map is created from a defect map, the number of defects existing in each chip is basically not considered, and only the presence or absence of a defect is considered. The reason will be described with reference to FIG. 193 corresponds to 1 in FIG.
As in the case of 90, the inspection data (defect coordinates) of the defect inspection is represented as a wafer map. 190
The difference is that the scratch 194 exists. Wound 194
Is generally detected in a defect inspection as if a large number of defects exist in a local area. This is represented as 195 in the binary two-dimensional map, and the value of the coordinates (x = 4, y = 1) is set to 1 even if there is a flaw 194. Suppose that binary 2
If a multi-valued two-dimensional map according to the number of defects is used instead of a dimensional map, the value of the coordinates of x = 4, y = 1 will be 7 from the number of defects included in the scratch 194. However, if a multi-valued two-dimensional map is used, the values of the average map shown in FIGS. 9 and 10 will be large even if only one wafer is damaged. As a result, it is not possible to search for another cause of the defect by the scratch generated on only one wafer. Therefore, a two-dimensional two-dimensional map is used instead of a multi-value two-dimensional map.

The binary two-dimensional map 192 shown in FIG.
In the binary two-dimensional map 195, an example of one chip and one coordinate is shown. This is because in FIGS. 13 and 14, the number of chips having a defect has been described as eight. In practice, the number of defects is generally higher. Therefore, the coordinate system of the binary two-dimensional map is preferably finer than the chip unit.

FIG. 15 shows an example in which a coordinate system is made finer than a chip unit when a binary two-dimensional map is created from inspection data of a defect inspection. Reference numeral 196 denotes inspection data (defect coordinates) of the defect inspection as a wafer map. In this case, many defects exist on all chips. If a two-dimensional two-dimensional map is created in a coordinate system of one chip and one coordinate, the value becomes 1 in all coordinates as in 197, and it becomes impossible to search for the cause of a defect. Therefore, by making a finer coordinate system like 198,
A two-dimensional two-dimensional map effective for searching for the cause of a defect can be created.

[0055]

As described above, according to the present invention,
It is possible to provide an apparatus for searching for a cause of a defect in a case where a plurality of products are manufactured by one product, such as a semiconductor integrated circuit wafer. The present invention has a feature of searching for a cause of a defect by combining a coordinate distribution of an electric inspection device or a defect inspection device with processing history data. In addition, by having an analysis means that takes into account differences in product size, it has the advantage that it can be used in production lines for high-mix low-volume production.

[Brief description of the drawings]

FIG. 1 is an example of a block diagram of a system used in a manufacturing process of an LSI wafer to which a program of the present invention is applied.

FIG. 2 is an example of a procedure for searching for a cause of an LSI wafer defect using the program of the present invention.

FIG. 3 is an example of a binary two-dimensional map created from the results of an electrical inspection.

FIG. 4 is an example of a binary two-dimensional map created from the results of an electrical inspection.

FIG. 5 is an example of a binary two-dimensional map group;

FIG. 6 is an example of processing history data.

FIG. 7 is an example of a processing position number correspondence table.

FIG. 8 is an example of a schematic view of a furnace body of a diffusion heat treatment apparatus.

FIG. 9 is an example of an average map of a group of binary two-dimensional maps.

FIG. 10 is an example of an average map of a group of binary two-dimensional maps.

FIG. 11 is an example of a screen displaying a failure cause search result.

FIG. 12 is an example of a binary two-dimensional map for mixed analysis of a plurality of types.

FIG. 13 is an example of a binary two-dimensional map created from the result of a defect inspection.

FIG. 14 is an example of a binary two-dimensional map created from the result of a defect inspection.

FIG. 15 is an example of a binary two-dimensional map created from the result of a defect inspection.

[Explanation of symbols]

11: Inspection data search / acquisition processing, 12: Binary two-dimensional map group creation processing of inspection data, 13: Processing history search / acquisition processing, 14: Start of loop based on the number of processing steps,
15: Grouping processing of a binary two-dimensional map group for each processing position, 16: Average map creation processing for each group, 17 ...
Analysis of map comparison between groups, 18: End of loop based on the number of processing steps, 19: Failure cause candidate extraction processing, 3
DESCRIPTION OF SYMBOLS 1 ... Film-forming apparatus 1st, 32 ... Film-forming apparatus 2nd, 33 ... Coating apparatus 1st, 34 ... Coating apparatus 2nd, 41 ... Exposure apparatus 1st, 42 ... Exposure apparatus 2nd, 43 ... Exposure apparatus 3rd Exposure unit No. 4, 51 Etching unit No. 1, 52 Etching unit No. 2, 53 Etching unit No. 3, 61 Diffusion heat treatment unit, 62 Cleaning unit No. 1, 63 Cleaning unit No. 2, 71 ... Electrical inspection equipment, 72
... Defect inspection device, 73 ... Dimension measuring device, 74 ... Film thickness measuring device, 80 ... Local area network, 81 ... Processing history database, 82 ... Inspection result database, 90
... Defect cause searching device, 91 ... Data input unit, 92 ... Calculation unit, 93 ... Result output unit, 101 ... Result of electrical inspection, 10
2 ... During the creation of a two-dimensional two-dimensional map, 103 ... A two-dimensional two-dimensional map, 111 ... Result of the electrical inspection, 112 ... During the creation of a two-dimensional two-dimensional map, 113 ...
32 ... two-dimensional two-dimensional map, 141-142 ... average map, 151-153 ... average map, 161-162 ... processing history data, 170 ... processing position number correspondence table, 171 ...
Schematic diagram of the furnace body of the diffusion heat treatment apparatus, 172: Wafer in the furnace body, 181: Results of electrical inspection, 182: Binary two-dimensional map for each chip, 183 ... Binary two-dimensional map for mixed analysis of different types, 184 ... electric inspection result, 185 ...
Two-dimensional two-dimensional map per chip, 186... Two-dimensional two-dimensional map for mixed analysis of plural types, 190... Result of defect inspection, 192... Two-dimensional two-dimensional map, 193. Result, 195 ... binary two-dimensional map, 196 ...
Defect inspection result, 197: two-dimensional two-dimensional map in chip units, 198, two-dimensional two-dimensional map, 210: defect result search result screen, 211: defect result candidate process display result, 2
12 ... Selection process, 213 ... Display of average map of selection process, 214 ... Display of defective chips

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Koichi Nakura 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture F-term in Hitachi, Ltd. Production Engineering Research Laboratory F-term (reference) 4M106 AA01 DA15 DH60 DJ21 DJ26

Claims (18)

[Claims] 1. A program for searching for a cause of a defect in a product that forms a plurality of products on one substrate, comprising: processing history information having processing position information for each process of manufacturing the plurality of substrates; An input step of receiving an input of a plurality of inspection result information of the substrates corresponding to the processing history information, and a processing of the arithmetic processing means for creating a coordinate distribution map for each substrate from the inspection result information for each substrate; The coordinate distribution map for each substrate is grouped by processing position information for each process,
A calculating step of creating an average map of the coordinate distribution map for each group, extracting candidate defective process steps from the average map of each group, and outputting the defective candidate process candidates extracted in the calculating step And a step of executing the steps. 2. The failure cause search program according to claim 1, wherein the processing history information is a correspondence table between a manufacturing process for each substrate and processing position information. 3. The defect according to claim 1, wherein the processing position information is an apparatus number for manufacturing processing, a part number in the apparatus for manufacturing processing, or a processing coordinate in the apparatus for manufacturing processing. Cause search program. 4. The apparatus according to claim 3, wherein the processing coordinates in the apparatus for performing the manufacturing process are a position number for each of the divided areas of the furnace body of the apparatus having the furnace body. The failure cause search program described. 5. The failure cause search program according to claim 1, wherein the inspection result information is data of a good product and a defective product in an electrical inspection. 6. The failure cause search program according to claim 1, wherein the inspection result information is defect coordinate data in a defect inspection. 7. The failure cause search program according to claim 1, wherein the coordinate distribution map created from the inspection result information is a two-dimensional two-dimensional map composed of values 1 and 0. 8. The defect cause search according to claim 7, wherein the binary two-dimensional map is a map created in a coordinate system based on the positions of a plurality of products existing on a substrate. program. 9. The non-transitory computer-readable storage medium according to claim 7, wherein the binary two-dimensional map is a map created in a coordinate system finely divided from a plurality of products existing on a substrate. 10. The method according to claim 7, wherein the binary two-dimensional map is a map created from a binary two-dimensional map of a product of a plurality of types using only a common area between the types. The failure cause search program described. 11. The defect cause search program according to claim 1, wherein in the calculating step, a method of extracting a candidate for a defect cause step from an average map for each group is provided.
A defect cause search program which calculates an absolute value of a difference between values of coordinates of an average map for each group and uses the maximum value. 12. The defect cause searching program according to claim 1, wherein in the calculating step, a method of extracting a candidate for a defect cause step from an average map for each group is provided.
A defect cause search program characterized by using a test value obtained by performing an analysis of variance from the values of each coordinate of an average map for each group. 13. The output step outputs a list of manufacturing processing steps in which the results are arranged based on the result of extracting candidates for the defective cause step from the average map for each group in the calculating step. The defect cause search program according to claim 1. 14. The non-transitory computer-readable storage medium according to claim 1, wherein the output step outputs the average map created in the calculation step. 15. A program for searching for a cause of a defect in a product that forms a plurality of products on one substrate, wherein the furnace of a device for manufacturing and processing the plurality of substrates is divided into finite regions, and the divided regions are divided. An input step of receiving input of processing history information having a position number of each area as processing position information, and inspection result information of a plurality of substrates corresponding to the processing history information; A calculating step of inputting the plurality of inspection result information for each of the substrates into a group of the inspection result information based on processing position information for each process, and extracting a candidate for a defect cause process from the inspection result information for each group; An output step of outputting a candidate for a defect cause process extracted by the calculation function. 16. A program for searching for a cause of a defect in a product that forms a plurality of products on one substrate, comprising: an input step of receiving input of inspection result information of the plurality of substrates;
The arithmetic processing means creates a two-dimensional two-dimensional map composed of values 1 and 0 for each board from the inspection result information for each of the plurality of boards input in the input step, and A defect cause search program for executing a calculation step of creating an average map from a two-dimensional map and an output step of outputting the average map calculated in the calculation step. 17. A storage medium for storing a program for searching for a cause of a defect in a product that forms a plurality of products on one substrate, wherein the program is processed for each process of manufacturing the plurality of substrates. Processing history information having location information;
An input step of receiving an input of a plurality of inspection result information of the substrates corresponding to the processing history information, and a processing of the arithmetic processing means for creating a coordinate distribution map for each substrate from the inspection result information for each substrate; The coordinate distribution map for each substrate is divided into groups based on processing position information for each process, an average map of the coordinate distribution map is created for each group, and a candidate for a defective cause process is determined from the average map for each group. A recording medium characterized by being a failure cause search program for executing a calculation step to be extracted and an output step to output a candidate for a failure cause step extracted in the calculation step. 18. A system for searching for a cause of a defect in a product in which a plurality of products are formed on one substrate, comprising: processing history information having processing position information for each process of manufacturing the plurality of substrates; Storage means for receiving and storing a plurality of inspection result information of the substrates corresponding to the processing history information; and a coordinate distribution map for each substrate based on the inspection result information for each substrate; Calculation for performing a grouping process on a coordinate distribution map based on processing position information for each process, creating an average map of the coordinate distribution map for each group, and extracting a candidate for a defective cause process from the average map for each group A defect cause search system, comprising: processing means; and output means for outputting a candidate for a defect cause step extracted by the arithmetic processing means.