JP2002110995A - Active matrix substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce power consumption and to enhance electrostatic countermeasure effect, related to an active matrix substrate where the electrostatic break of a switching element comprising a thin-film transistor is prevented, using an electrostatic protective element comprising two thin-film transistors connected in series. SOLUTION: A common source electrode 48, of two thin-film transistors 37A and 37B constituting an electrostatic protection element 37, is separated into a plurality of pieces. Drain electrodes 50 and 53 are comb-shaped, and the number of teeth parts 50a and 53a is equal to the number of the common source electrodes 48.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix substrate, and more particularly, to an active matrix substrate in which a switching element comprising a thin film transistor is prevented from being destroyed by an electrostatic protection element comprising a plurality of thin film transistors connected in series. About.

[0002]

2. Description of the Related Art FIG. 7 is a plan view of an equivalent circuit of a part of such a conventional active matrix substrate. This active matrix substrate has a glass substrate 1. On a glass substrate 1, a plurality of pixel electrodes 2 arranged in a matrix, a switching element 3 composed of a thin film transistor connected to each of these pixel electrodes 2, a scanning element 3 extending in the row direction, A plurality of scanning lines 4 for supplying signals, a plurality of data lines 5 extending in the column direction and supplying data signals to the switching elements 3, and a short circuit disposed around the plurality of pixel electrodes 2. A ring 6, an electrostatic protection element 7 composed of two thin film transistors connected in series to the short-circuit ring 6 and the scanning line 4 on the outside of the left and right sides of the short-circuit ring 6, respectively; On the outside of the upper side and the lower side, an electrostatic protection element 8 composed of two thin film transistors each connected in series to the short-circuit ring 6 and the data line 5, respectively. It has been kicked.

[0005] One end of each scanning line 4 extends to the edge of the substrate, and the other end is connected to an external connection terminal 4a. Also,
One end of each data line 5 extends to the edge of the substrate, and the other end is connected to an external connection terminal 5a. Between the external connection terminal 5 a connected to each data line 5 and the electrostatic protection element 8,
Although not shown, a high resistance element for delaying steep static electricity may be interposed.

Next, a specific structure of the electrostatic protection element 7 of the active matrix substrate will be described with reference to FIGS. 8 and 9. FIG. At a predetermined position on the upper surface of the glass substrate 1, a first L-shaped
And a second gate electrode 12 arranged in parallel with the tip of the first gate electrode 11. The scanning line 4 and both gate electrodes 11, 1
A gate insulating film 13 is formed on the entire upper surface of the glass substrate 1 including
Is provided.

[0005] A common semiconductor thin film 14 made of intrinsic amorphous silicon is provided at a predetermined location on the upper surface of the gate insulating film 13 on both gate electrodes 11 and 12.
First and second channel protective films 15 and 16 are provided in parallel with each other at predetermined positions on the upper surface of the common semiconductor thin film 14 on the first and second gate electrodes 11 and 12. The upper surfaces of the opposite sides of the channel protection films 15 and 16 and the upper surface of the common semiconductor thin film 14 therebetween have n
A common ohmic contact layer 17 made of type amorphous silicon and a common source electrode 18 are provided.

An ohmic contact layer 19 made of n-type amorphous silicon and a first drain electrode 20 are provided at predetermined positions on the upper surface on the other side of the first channel protective film 15 and on the upper surface of the gate insulating film 13 in the vicinity thereof. Is provided. The first drain electrode 20 is formed on the gate insulating film 13.
Is connected to the first gate electrode 11 via a contact hole 21 provided at a predetermined position. The ohmic contact layer 22 made of n-type amorphous silicon and the second upper surface of the gate insulating film 13 near the other side of the second channel protective film 16 and the second
Is provided. The second drain electrode 23 is connected to the short-circuit ring 6 provided at a predetermined position on the upper surface of the gate insulating film 13. Shorting ring 6
Is connected to the second gate electrode 12 via a contact hole 24 provided at a predetermined position of the gate insulating film 13.

The first thin film transistor 7A is formed by the first gate electrode 11, the gate insulating film 13, the common semiconductor thin film 14, the first channel protective film 15, the common source electrode 18, the first drain electrode 20, and the like. A second gate electrode 12, a gate insulating film 13, a common semiconductor thin film 14, a second channel protective film 16, a common source electrode 1
8, the second drain electrode 23 and the like constitute a second thin film transistor 7B.
A and 7B constitute the electrostatic protection element 7. The electrostatic protection element 8 connected to the data line 5 has basically the same configuration as the electrostatic protection element 7 described above. Here, the electrostatic protection elements 7 and 8 having the above configuration are referred to as a conventional TFT-series type element for convenience.

By the way, the VG (gate voltage) -ID (drain current) characteristics of the above-described conventional TFT-series device are, for example, as shown by a dashed line in FIG.
The leakage current in a low voltage region (for example, about 10 V) is relatively small, on the order of 1 × 10 −11 A, and low power consumption can be achieved.
(Approximately 0 V), the leakage current is relatively small, on the order of 1 × 10 −9 A, and the effect of countermeasures against static electricity cannot be said to be sufficient.

On the other hand, as this kind of electrostatic protection element, a two-terminal element (SCLC element) whose voltage-current characteristics are defined by a space charge limited current (Space Charge Limited Current) is known (JP-A-6-59281). Reference). In such an electrostatic protection element, for example, as indicated by a two-dot chain line in FIG. 4, a leakage current in a high voltage region (for example, about 100 V) is relatively large, such as in the late 1 × 10 −8 A order,
Although the effect of preventing static electricity is large, the leakage current in a low voltage region (for example, about 10 V) is 1 × 10 −10.
It is relatively large in the latter half of the A range, which is disadvantageous for reducing power consumption.

[0010]

As described above, in an active matrix substrate having a TFT-series element as an electrostatic protection element, low power consumption can be achieved. There was a problem that it was not enough. On the other hand, SC as an electrostatic protection element
An active matrix substrate provided with an LC element has a large effect against static electricity, but has a problem that it is disadvantageous in reducing power consumption. SUMMARY OF THE INVENTION It is an object of the present invention to reduce power consumption and to increase the effect of countermeasures against static electricity in an active matrix substrate provided with an electrostatic protection element composed of two thin film transistors in series.

[0011]

According to the first aspect of the present invention,
An active matrix substrate in which a switching element composed of a thin film transistor connected to each of a plurality of pixel electrodes arranged in a matrix is prevented from being destroyed by an electrostatic protection element composed of a plurality of two thin film transistors connected in series. , The source electrode and the drain electrode of each of the thin film transistors constituting the electrostatic protection element are each divided into a plurality. Claim 2
According to the invention described in (1), in the invention described in (1), the drain electrode of each thin film transistor constituting the electrostatic protection element has a comb-like shape having a plurality of teeth, and the source electrode is separated into a plurality. . According to a third aspect of the present invention, in the second aspect, a source electrode of each of the thin film transistors constituting the electrostatic protection element is a common source electrode. According to a fourth aspect of the present invention, in the third aspect of the present invention, the drain electrode of each of the thin film transistors constituting the electrostatic protection element is disposed such that its teeth are opposed to each other, and the common source is located therebetween. It is an arrangement of electrodes. According to a fifth aspect of the present invention, in the first aspect of the present invention, the channel protective film of each thin film transistor constituting the electrostatic protection element is separated into a plurality. According to the first aspect of the present invention, the source electrode and the drain electrode of each thin film transistor constituting the electrostatic protection element are divided into a plurality of parts, respectively. As compared with the TFT-series type element, the effect of countermeasures against static electricity can be increased, and the power consumption can be reduced as compared with the conventional SCLC element.

[0012]

FIG. 1 is a plan view of an equivalent circuit of a part of an active matrix substrate according to an embodiment of the present invention. This active matrix substrate includes a glass substrate 31. A plurality of pixel electrodes 32 arranged in a matrix on a glass substrate 31
A switching element 33 composed of a thin film transistor connected to each of the pixel electrodes 32; a plurality of scanning lines 34 extending in the row direction for supplying a scanning signal to the switching element 33; A plurality of data lines 35 for supplying a data signal to the switching element 33, a short-circuit ring 36 disposed around the plurality of pixel electrodes 32, and a short-circuit ring outside the left side and right side of the short-circuit ring 36. An electrostatic protection element 37 composed of two thin film transistors connected in series to the scanning line 34 and the scanning line 34, and a short-circuit ring 36 and a data line 3 outside the upper and lower sides of the short-circuit ring 36, respectively.
5 and an electrostatic protection element 38 composed of two thin film transistors each connected in series.

One end of each scanning line 34 extends to the edge of the substrate, and the other end is connected to an external connection terminal 34a. One end of each data line 35 extends to the edge of the substrate, and the other end is connected to an external connection terminal 35a. The external connection terminal 35a connected to each data line 35 and the electrostatic protection element 3
Although not shown, a high-resistance element for delaying steep static electricity may be interposed between the high-resistance element 8 and the high-resistance element 8.

In the above, the equivalent circuit diagram is the same as the conventional one, but the feature of the present invention different from the conventional one is the structure of the electrostatic protection elements 37 and 38 which are the TFT-series elements. The specific structure of the electrostatic protection element 37 on the matrix substrate will be described with reference to FIGS. At a predetermined position on the upper surface of the glass substrate 31, a first L-shaped
And a second gate electrode 42 arranged in parallel with the tip of the first gate electrode 41. Scanning line 34 and both gate electrodes 41,
A gate insulating film 43 is provided on the entire upper surface of the glass substrate 31 including the substrate.

A common semiconductor thin film 44 made of intrinsic amorphous silicon is provided at a predetermined position on the upper surface of the gate insulating film 43 on both the gate electrodes 41 and 42.
First and second channel protective films 45 and 46 are provided in parallel with each other at predetermined locations on the upper surface of the common semiconductor thin film 44 on the first and second gate electrodes 41 and 42. The upper surface of the opposite side of the channel protection films 45 and 46 and the upper surface of the common semiconductor thin film 44 therebetween have n
A common ohmic contact layer 47 and a common source electrode 48 made of type amorphous silicon are provided. In this case, the common source electrode 48 is separated into a plurality together with the common ohmic contact layer 47 provided thereunder.

An ohmic contact layer 49 made of n-type amorphous silicon and a first drain electrode 50 are provided at predetermined locations on the upper surface on the other side of the first channel protective film 45 and on the upper surface of the gate insulating film 43 in the vicinity thereof. Is provided. In this case, the first drain electrode 50 has a comb-tooth shape together with the ohmic contact layer 49 provided thereunder, and the number of the tooth portions 50 a is the same as the number of the common source electrodes 48. . The first drain electrode 50 is arranged such that each tooth portion 50a faces the plurality of common source electrodes 48. Also,
The first drain electrode 50 is connected to the first gate electrode 41 via a contact hole 51 provided at a predetermined position in the gate insulating film 43.

An ohmic contact layer 52 made of n-type amorphous silicon and a second drain electrode 53 are provided at predetermined positions on the upper surface on the other side of the second channel protective film 46 and on the upper surface of the gate insulating film 43 in the vicinity thereof. Is provided. In this case, the second drain electrode 53 has a comb-like shape together with the ohmic contact layer 52 provided thereunder, and the number of the teeth 53 a is the same as the number of the common source electrodes 48. . The second drain electrode 53 is arranged such that each tooth 53a faces the plurality of common source electrodes 48. Also,
The second drain electrode 53 is connected to a short-circuit ring 36 provided at a predetermined position on the upper surface of the gate insulating film 43. The short-circuit ring 36 is connected to the second gate electrode 42 via a contact hole 54 provided at a predetermined position in the gate insulating film 43.

Then, the first thin film transistor 37A is formed by the first gate electrode 41, the gate insulating film 43, the common semiconductor thin film 44, the first channel protective film 45, the common source electrode 48, the first drain electrode 50, and the like. Composed,
The second gate electrode 42, the gate insulating film 43, the common semiconductor thin film 44, the second channel protective film 46, the common source electrode 48, the second drain electrode 53, and the like constitute a second thin film transistor 37B. The thin film transistors 37A and 37B constitute an electrostatic protection element 37. Note that the electrostatic protection element 38 connected to the data line 35 has basically the same configuration as the electrostatic protection element 37 described above.

By the way, the thin film transistor 3 having the above configuration
VG- of the electrostatic protection element 37 composed of 7A and 37B.
When the ID characteristics were examined, the result indicated by the solid line in FIG. 4 was obtained. Here, the thin film transistor 37A or 3
The size of 7B is, as shown in FIG.
The widths (channel lengths) L of the channels 5 and 46 are 14 μm, the lengths of the channel protective films 45 and 46 are 1200 μm, the number of the common source electrodes 48 is 100, and one common source electrode 48 is provided.
The width (channel width) W is 6 μm and the interval D between the common source electrodes 48 is 6 μm.
The width of the channel region defined by
m. In other words, the element size of the thin film transistor 37A or 37B is W / L = 6/14 of a separate T type.
This is the same as the case where 100 FTs are arranged in parallel.

On the other hand, in the conventional electrostatic protection element 7 shown in FIG. 8, the width (channel length) L of the channel protection films 15 and 16 is 14 μm, and the length of the channel protection films 15 and 16 is 1200 μm. When the length (channel width) W of the common source electrode 18 was set to 1194 μm and the VG-ID characteristics were examined, the result indicated by the dashed line in FIG. 4 was obtained. In this case, one thin film transistor 7A or 7B is formed of one thin film transistor of W / L = 1194/14. In this case, the channel protective film 15 in this case,
16 widths and lengths, ie, thin film transistors 7A, 7B
Is the same as that of the embodiment shown in FIG.

In the case of the conventional TFT-series device shown by a dashed line in FIG. 4, as described above, the leakage current in the low-voltage region (for example, about 10 V) is one.
It is relatively small, on the order of × 10-11A, and can achieve low power consumption.
(Approximately 0 V), the leakage current is relatively small, on the order of 1 × 10 −9 A, and the effect of countermeasures against static electricity cannot be said to be sufficient. Also, in the case of the SCLC element shown by the two-dot chain line in FIG. 4, as described above, the leakage current in the high voltage region (for example, about 100 V) is relatively large in the latter half of the 1 × 10 −8 A range. Although the effect is large, on the other hand, the leakage current in a low voltage region (for example, about 10 V) is relatively large in the latter half of the order of 1 × 10 −10 A, which is disadvantageous for reducing power consumption.

On the other hand, in the case of the electrostatic protection element 37 (TFT-series element of the present invention) of this embodiment shown by a solid line in FIG. 4, a low voltage region (for example, about 10 V) is used.
The leakage current in the lower half of the 1 × 10-10A range,
4 is larger than the case indicated by the dashed line in FIG.
Is smaller than the case indicated by the two-dot chain line, and therefore, lower power consumption can be achieved as compared with the case indicated by the two-dot chain line in FIG. In the case of the electrostatic protection element 37 of this embodiment shown by a solid line in FIG. 4, the leakage current in a high voltage region (for example, about 100 V) is 1 ×
In the middle of the order of 10-8A, which is smaller than the case shown by the two-dot chain line in FIG. 4, is larger than the case shown by the one-dot chain line in FIG. The effect can be increased.

In the above embodiment, the case where the first and second drain electrodes 50 and 53 and the common source electrode 48 are divided into a plurality as shown in FIG. 2 has been described. However, the present invention is not limited to this. is not. For example, as shown in FIG. 6, the first and second drain electrodes 50 and 53 and the common source electrode 48 are divided into a plurality,
The second channel protective films 45 and 46 may be divided into a plurality. Further, in the above-described embodiment, as shown in FIG. 1, the case where the electrostatic protection elements 37 and 38 are provided outside the short-circuit ring 36 has been described. However, the present invention is not limited thereto. Short-circuit ring 3 with elements 37 and 38
6 may be provided inside.

[0024]

As described above, according to the present invention, the source electrode and the drain electrode of each of the thin film transistors constituting the electrostatic protection element are divided into a plurality, respectively, so that the source electrode and the drain electrode are divided into a plurality. As compared with the conventional TFT-series type element which is not divided, the effect of preventing static electricity can be increased, and the power consumption can be reduced as compared with the conventional SCLC element.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit plan view of a part of an active matrix substrate according to an embodiment of the present invention.

FIG. 2 is a plan view of a specific structure of a part of the active matrix substrate shown in FIG.

FIG. 3 is a sectional view taken along the line XX of FIG. 2;

FIG. 4 is a diagram showing VG-ID characteristics of the electrostatic protection element.

FIG. 5 is a diagram illustrating an example of specific dimensions of a thin film transistor included in the electrostatic protection element.

FIG. 6 is a plan view similar to FIG. 2 in another embodiment of the present invention.

FIG. 7 is an equivalent circuit plan view of a part of a conventional active matrix substrate.

8 is a plan view of a specific structure of a part of the active matrix substrate shown in FIG.

FIG. 9 is a sectional view taken along the line YY of FIG. 8;

[Explanation of symbols]

 Reference Signs List 31 glass substrate 32 pixel electrode 33 switching element 34 scanning line 35 data line 36 short-circuit ring 37, 38 electrostatic protection element 37A, 37B thin film transistor 41, 42 gate electrode 45, 46 channel protection film 48 common source electrode 50, 53 drain electrode 50a , 53a Tooth

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H092 JA31 JA32 JA42 JB57 JB79 KA05 NA14 NA25 NA29 5F038 AV06 BH02 BH07 BH13 EZ20 5F110 AA06 AA09 AA22 BB01 CC07 DD02 GG02 GG15 GG28 GG29 GG12 HK09 NN16 NN

Claims (5)

[Claims] An electrostatic protection element comprising a plurality of thin film transistors connected in series prevents electrostatic breakdown of a switching element comprising a thin film transistor connected to each of a plurality of pixel electrodes arranged in a matrix. An active matrix substrate, wherein a source electrode and a drain electrode of each of the thin film transistors constituting the electrostatic protection element are divided into a plurality of parts. 2. The invention according to claim 1, wherein the drain electrode of each thin film transistor constituting the electrostatic protection element has a comb-like shape having a plurality of teeth, and the source electrode is divided into a plurality of pieces. An active matrix substrate, characterized in that: 3. The active matrix substrate according to claim 2, wherein a source electrode of each of the thin film transistors constituting the electrostatic protection element comprises a common source electrode. 4. The invention according to claim 3, wherein the drain electrode of each of the thin film transistors constituting the electrostatic protection element is arranged so that its teeth face each other, and the common source electrode is arranged therebetween. An active matrix substrate, comprising: 5. The active matrix substrate according to claim 1, wherein the channel protective film of each thin film transistor constituting the electrostatic protection element is divided into a plurality.