JP2002199291A - Image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image pickup device that can use an inexpensive signal processing unit used in common. SOLUTION: A camera head connector 14 at a tail end of a camera head incorporating a CCD via a camera cable is removably connected to a common processor section 5, the camera head connector 14 is provided with phase delay circuits 18, 19 employing EVRs(Electric Variable Resistors) 26, 27 and an EVR control element 28 that controls the resistance of the EVRs 26, 27, data stored in a nonvolatile RAM in the EVR control element 28 are used to set the resistance of the RVRs 26, 27, and the data are electrically rewritten via a data entry section connected to the EVR control element 28 from an external device. Thus, a common synchronizing signal is used to provide a drive signal with a proper phase to the CCD even when length of the cables differs from each other and the processor section can apply common signal processing to an output signal of the CCD so that the low-cost processor section is enough to the processing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pickup apparatus capable of driving a plurality of image pickup devices by a single processor.

[0002]

2. Description of the Related Art Japanese Patent Publication No. 8-28839 and Patent No. 2
As described in Japanese Patent No. 694753, when a single processor unit (signal processing device) drives a plurality of camera heads having different cable lengths and cable thicknesses or camera heads incorporating different image pickup devices, a processor is required. An additional circuit is required inside the camera head to absorb the cable length or cable thickness of the camera head and the difference in the image sensor, and as a result, the circuit configuration of the processor unit tends to be complicated.

In order to drive a plurality of camera heads from the processor section, it is necessary to provide a plurality of drive circuits inside the processor section, and the circuit scale inside the processor section including the above-mentioned example tends to be large. Was. for that reason,
The configuration of the processor unit becomes complicated, and the price of the processor unit itself rises.

[0004] As described in Japanese Patent No. 2694753, there is an example in which a delay line corresponding to the length of an endoscope is provided in an electronic endoscope. When manufacturing an endoscope, it is necessary to prepare a plurality of delay lines, and the management of the members of the delay lines becomes troublesome.

[0005] In addition, the cable is particularly repaired by removing the broken portion of the cable in which the cable is broken near the connector. Assuming that case, if the initial cable length is set longer than the actual endoscope length, repair can be performed multiple times, but at that time, the cable length becomes short and it can not be absorbed by the delay line When the level shift occurs, the circuit itself needs to be replaced.

Further, if the cable length is long, signal loss due to the cable length occurs, so that it is necessary to perform waveform correction. In this case, when one signal has a signal driving period and a signal stopping period, Although the DC level in the stop section may not match the High / Low level in the driving period,
In that case, the DC level of the signal having the drive period and the stop period at the endoscope end may exceed the rating of the image sensor, and in such a case, the charge transfer from the image sensor cannot be performed properly,
The charge transfer failure of the image sensor output signal has occurred.

An image pickup device is provided at the tip of the electronic endoscope, a processor section is connected to the electronic endoscope, and various image pickup device driving signals necessary for driving the image pickup device from the processor side via a cable are sent to the image pickup device. In accordance with the timing of the supplied image pickup device drive signal, the leading end image pickup device outputs an output signal to the processor side via a cable, and in the case of performing image processing on the processor side, the signal transfer via the cable is performed. , A phase delay due to the cable occurs. Appropriate image display cannot be performed unless image processing is performed after performing appropriate sampling hold and clamping processing in the processor. That is, unless the output signal of the image pickup device transferred via the cable and each signal required for various sampling (clamping) processes are matched and supplied to the processor, an appropriate image display cannot be performed.

For this reason, Japanese Patent No. 2694753 discloses a sampling circuit for performing a sampling process (preferably including a clamp process) on an image sensor output signal, a timing generator for generating a control pulse for the sampling circuit, An example of an electronic endoscope in which a control pulse output from the timing generator is provided with a delay line that provides a delay amount according to the length of the electronic endoscope is shown. The figure shows that an appropriate image display is performed by defining the phase position of the sampling signal by a delay line inserted into each sampling signal.

[0009]

[0006] This patent No. 2694
According to the method described in No. 753, even if a phase delay occurs in an output signal from the image sensor, sampling processing or the like can be performed on the image sensor output signal with high accuracy. However, Patent No. 2
In the example described in Japanese Patent No. 678453, the delay amount of the delay line cannot be easily changed.

[0010] For example, when the cable inside the endoscope is disconnected, a repair may be performed by cutting off the disconnected portion and reconnecting a portion that is electrically connected.
According to the method described in No. 53, when the position of the sampling signal is shifted due to the truncation of the cable and the appropriate phase relationship cannot be maintained due to the shift, the delay line is also replaced at the same time, and the phase relationship can be maintained constant. You need to do that.

However, the circuit board of the processing system once incorporated into the endoscope employs a watertight structure in order to enable cleaning by the endoscope exterior part, and therefore, it is difficult to replace the circuit board. It is not easy to exchange elements on the board.

If the length of the cable is cut by the length corresponding to one cycle of the output signal of the image sensor, the position of the sampling signal or the like does not shift if it is cut.
According to No. 753, the read clock of the image sensor is 14
At 0 ns, a signal for one pixel is obtained every 140 ns. Assuming that the signal delay is 3.3 ns / m as described in Japanese Patent No. 2694753, 140 / 3.3 = 42.
[M], 42/2 = 21 considering the round trip of the cable
[M], and the cable may be actually cut off by about 21 m.

However, this is nearly six times the cable length described in Japanese Patent No. 2694753, 3.5 m, which is not a practical cable length, and the signal attenuation at the tip is large.
Only an image with many noise components can be obtained. For this reason, in the method described in Japanese Patent No. 2694753, there is no choice but to replace the cable unit, and there is not much merit from the viewpoint of maintenance. Strict management is required, and it takes a very long time in practice.

(Object of the Invention) It is an object of the present invention to provide an image pickup apparatus which can suppress a rise in commonly used signal processing apparatuses and can be used with an inexpensive signal processing apparatus. Also,
It is another object of the present invention to provide an imaging apparatus capable of improving the workability of a user by driving a plurality of camera heads without adjustment.

Further, even when maintenance such as repair is performed a plurality of times, or when it is desired to change the cable length of the endoscope for some reason, the existing endoscope circuit can be used without making any hardware changes. An imaging device that can be easily modified from the imaging device, and for which an externally-adjustable phase correction circuit and its interface unit are provided inside,
The phase relationship between the output signal from the imaging device provided in the imaging device and each sampling signal output from each sampling signal generation circuit included in the connector unit can always easily maintain and adjust an appropriate positional relationship. It is also an object to provide a user with an imaging device for the purpose.

[0016]

An image pickup apparatus which incorporates an image pickup device for picking up a subject image and which is detachably connected to a common signal processing device so as to display the picked up subject image on a monitor screen. A driving signal generating unit that generates a driving signal for reading out an imaging signal from the imaging element; a phase changing unit that changes a phase of the driving signal output from the driving signal generating unit; A connection cable for transmitting the drive signal to the imaging unit, a rewritable storage unit that outputs a phase variable control signal to the phase variable unit, and an input unit that inputs write data to the storage unit. This allows the imaging device to set the phase of the drive signal in accordance with the cable length of the connection cable with the phase variable control signal from the storage unit, and to perform repair or the like. Even if the change of phase is required so that can be easily changed and set from the input unit.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIGS. 1 to 6 relate to a first embodiment of the present invention, and FIG. 1 shows an entire configuration of an endoscope apparatus having the first embodiment. Shows a configuration of a signal processing system in a camera head connector, FIG. 3 shows a circuit configuration of an EVR control element, FIG. 4 shows an operation explanatory diagram of FIG.
FIG. 5 shows a case where the waveform is not corrected, a signal waveform after the waveform correction, and the like, and FIG. 6 shows a circuit example of the waveform correction circuit.

As shown in FIG. 1, an endoscope apparatus 1 having a first embodiment of the present invention is mounted on an optical viewing tube 2 as an optical endoscope. Camera head 3
And a light source device 4 that supplies illumination light to the optical viewing tube 2 and a common (as a signal processing device) that drives an image pickup device built in the camera head 3 and performs signal processing on an output signal of the image pickup device. It has a processor unit 5 and an external monitor 6 for displaying a video signal output from the processor unit 5.

The optical viewing tube 2 has a rigid and elongated insertion portion 7 and an eyepiece 8 formed on the rear end side of the insertion portion 7, and a base near the front end of the eyepiece 8 is a light. It is detachably connected to the light source device 4 via the guide cable 9.

The illumination light generated by the light source device 4 is supplied to a light guide in the optical viewing tube 2 via a light guide cable 9, and the illumination light transmitted by the light guide illuminates the distal end of the insertion section 7. The light is emitted from the window and illuminates a subject such as an affected part.

The illuminated subject forms an optical image at an image forming position by an objective optical system (not shown) attached to an observation window adjacent to the illumination window. The optical image is transmitted to the rear eyepiece section 8 side by a relay optical system inserted into the insertion section 7, and can be magnified and observed from the eyepiece section 8, and the imaging section 11 of the camera head 3. When the front mount unit is mounted, an image is formed via the imaging optical system of the imaging unit 11. At the image forming position, for example, C
A CD 12 is provided.

The CCD 12 is connected to a signal line in a camera cable 13 extending from the image pickup section 11, and a camera head connector 14 at the rear end of the camera cable 13 is detachably connected to the processor section 5.

The video output terminal of the processor unit 5 is connected to an external monitor 6 via a video cable 15, and an image of the observation target taken through the optical viewing tube 2 is displayed on a display surface of the external monitor 6.

The processor unit 5 includes a dimming cable 16
The light source device 4 is connected to the light source device 4 via a light guide cable 9 to send a signal of the average level of the video signal of the processor unit 5 to the light source device 4 as a dimming signal and adjust the amount of illumination. Control to be supplied to the side.

Although FIG. 1 shows an (electronic) endoscope apparatus 1 in which one camera head 3 is connected to the processor section 5 to enable endoscopic inspection, the camera head 3 The endoscope inspection can be performed by connecting a camera head having a different cable length or a camera head having a different characteristic of a CCD incorporated in the imaging unit 11 to the same (common) processor unit 5.

As described above, in the present embodiment, each of the camera heads 3, specifically, the camera head connector 14 is connected so that the camera heads 3 having different cable lengths and the like can be connected to the common processor unit 5 and used. Further, an image pickup apparatus is provided which is provided with a phase correcting means for performing a phase correction in consideration of the influence of the cable length corresponding to the camera cable 13 of the camera head 3.

More specifically, the camera head connector 14
A phase correction circuit using an electronic volume (EVR) is provided therein, and a drive signal is transmitted to the CCD 12 disposed on the tip end side of the camera head 3 via the phase correction circuit. Substrate circuit 1 disposed in camera head connector 14 (which is a main part of the imaging device of the present embodiment)
FIG. 2 shows a schematic configuration of No. 7.

The camera head connector 14 has a CCD
12 (hereinafter referred to as TGI)
C) 20 and a vertical drive signal generating element (hereinafter, V-dr)
v) 21, CCD1 in the imaging unit 11 of each camera head 3
In order to drive the CCD according to 2, the waveform correction circuits 22 and 23 composed of passive elements and the like for correcting the waveform of the horizontal drive signal for CCD output from the TGIC 20, resistors R and R 'and a capacitor C, Fine adjustment of phase by C '(performed and output via buffers 53 and 53' respectively)
Phase adjustment circuits 24 and 25, variable resistance circuits (abbreviated as EVR in FIG. 2) 26 and 27 each including an EVR and a passive element for controlling the phase delay of the horizontal drive signal, and variable resistance circuits 26 and 27. At least an EVR control element 28 for controlling the resistance value and an amplifier circuit 29 for amplifying an output signal from the CCD 12 to an appropriate signal level are provided.

The TGIC 20 receives a vertical synchronizing signal (VD) 35 and a horizontal synchronizing signal (HD) from the processor unit 5 side.
34 and the reference clock signal CLK36, and TG
The IC 20 decodes, based on each input signal, a value counted by an internal counter circuit to drive the CCD 12, a CCD horizontal drive original signal Xh, and a reset gate original pulse. Xrg,
The vertical drive original signals Xv1 to Xv4 and the shutter drive original signal Xsub are generated and output from the TGIC 20.

The vertical drive signals Xv1 to Xv4 and the original shutter drive signal Xsub are input to the V-drv 21, and pulse signals having predetermined timing and voltage are formed by an internal encoder circuit. V1 to V4 and shutter drive signal Vsub
(Indicated by reference numeral 30 in FIG. 2).

The horizontal drive original signal Xh and the reset gate original pulse Xrg are input to the variable resistance circuits 26 and 27, respectively, and are supplied to the variable resistance circuit 26 and the fine phase adjustment circuit 2 respectively.
4. A predetermined amount of phase delay is performed by the phase delay circuits 18 and 19 each including the variable resistance circuit 27 and the phase fine adjustment circuit 25.

The horizontal driving original signal Xh and the reset gate original pulse Xrg pass through the phase delay circuits 18 and 19,
The signals are input to the waveform correction circuits 22 and 23. From the horizontal drive original signal Xh whose waveforms have been corrected by the waveform correction circuits 22 and 23, the CCD horizontal drive signal H and an H-phase signal H '(indicated by reference numeral 31 in FIG. 2) which is the reverse phase signal of the H signal are supplied to the reset gate original signal. The reset pulse ΦR32 is output from the pulse Xrg.
The waveform correction circuit 22 includes not only a passive element but also a circuit for converting the horizontal driving original signal Xh to the opposite phase.

The CCD in the imaging unit 11 at the tip of the camera head
12, the CCD vertical drive signals V1 to V4, the CCD horizontal drive signals H and H ', various drive signals of the reset pulse .PHI.R, and a predetermined voltage are supplied from a board in the connector. Properly driven,
The CCD output signal is output from the input terminal 33 in the camera head connector 14 to the amplifier circuit 29 provided inside the camera head connector 14 via the camera cable 13 of the camera head 3 in accordance with the order defined by the drive signal. In the amplifying circuit 29, the CCD 12 reduced by the resistance loss of the camera cable 13 or the like is used.
Output signal is amplified to an appropriate signal level and output terminal 3
9 to the processor unit 5.

The phase delay circuits 18 and 19 apply phase delays according to the cable length of the camera cable 13 of the camera head 3, the type of the cable, and the type of the CCD 12 provided at the end, respectively. The amount of phase delay is defined by the EVR control element 28, and the amount of delay is set by inputting the data clock signal D-clk and the data signal DAT from the processor unit 5 side.

The EVR control element 28 includes a port for transmitting and receiving data to and from the outside, that is, a data port 37 (to which the data signal DAT is input) and a clock port D-cl.
k is input).
Further, as shown in more detail in FIG. 3, a data enable port 52 to which a signal D-en for validating the data port is further input may be provided.

As shown in FIG. 3, in the EVR control element 28, a rewritable nonvolatile RAM area 41 for storing data input through a port for exchanging data with the outside, and a RAM area A decoding unit 42 for decoding data from the D / A converter 41, a D / A unit 43 for converting data digitized by the decoding unit 42 into analog data, and buffers (B1) 44a to (B4) 44d for buffering analog data. It has a built-in clock input port 38, a data input port 37, a data enable port 52, and output ports 48 to 51.

The RAM area 41 is connected to each data line,
The RAM area 41 and the decoding section 42 are connected by a data bus 45, and the decoding section 42 and the D / A section 43 are connected by a data bus 4
6 are connected. The D / A unit 43 and the buffer units 44a to 44d are connected by output lines 47a to 47d, respectively. The substrate of the EVR control element 28 is supplied with the power supply voltage Vdd and the voltage Vss (ground potential).

The EVR control element 28 receives the data input as shown in FIG. 4A and the serial data D0 to the selected output port in accordance with the conversion table shown in FIG. 4B.
To D7 are output. FIG. 4C shows a buffer (B1) 44 using address bits A0 and A1.
An example of selection of a to (B4) 44d is shown.

The RAM area 41 is write-enabled only when the D-en signal is at the high level, and when the other D-en signals are at the low level and when the power is turned off, the previous write-enabled state is set. It is a configuration that holds a value.

If the data signal is not input, the EVR control element 28 can hold the value of the immediately preceding data signal. Therefore, the data is written at the time of shipment from the factory, and the delay amounts of the phase delay circuits 18 and 19 are set. , By saving
The user does not need to set the delay amount. Also, at the time of repair, the delay amount may be set in accordance with the same procedure as the cable length at the time of repair.

As described above, in this embodiment, the CCD 12
Via a data input unit (input means) to a storage means capable of rewriting and setting data for determining a phase value (phase amount) of a phase variable means capable of variably setting a phase with respect to a drive signal in a camera head 3 having a built-in camera head By using a writing configuration, even when the camera head 3 has a different cable length, the phase amount is set to be appropriate for the cable length, so that the user can set an appropriate phase amount without setting the phase amount. The drive signal enables the CCD 12 to be driven, and even when repair is required, the connector 14 is not required to be disassembled, and the circuit board 17 in the connector 14 does not need to be changed. It is possible to make change settings and so on.

More specifically, a circuit incorporated in the connector 14 may be used alone or in combination with another passive element according to an externally applied control electric quantity such as an arbitrary voltage. Phase delay circuits 18 and 19 using electronic volume (hereinafter referred to as EVR) EVRs 26 and 27 for delaying an input signal, and a control element (EVR) for applying an arbitrary control voltage or the like to the EVRs 26 and 27
Control element) 28. Then, the EVR control element 28
Has an interface unit that can be connected to the outside, and can be connected to the outside as necessary to change the amount of control voltage applied to the EVRs 26 and 27 to an appropriate value.

The EVR control element 28 has a storage unit therein, and has a function of retaining the amount of voltage or the like applied to the EVRs 26 and 27 immediately before the interface unit receives nothing. Therefore, the EVR control element 28 can hold the amount of voltage or the like applied to the EVRs 26 and 27, so that the resistance of the EVRs 26 and 27 can be kept constant unless a signal is newly input to the interface unit.

The signals for driving the image pickup device of the camera head 3 are phase-corrected by the phase delay circuits 18 and 19 including the EVRs 26 and 27 and the EVR control device 28, and the board in the connector 14 is connected to the image pickup device. Image sensor output output from the image sensor via the cable 13
The phases of various sampling signals in the connector 14 are maintained in an appropriate positional relationship.

In the case of a long cable length, as will be described later, one of the drive signals for driving the image sensor includes a signal drive period in which the potential is switched between High / Low periodically and a signal stop period in which the potential is not switched. When there is a signal, a different voltage value is applied between the drive period and the stop period to the buffer portion of the corresponding signal installed on the connector board, so that the drive period of the drive signal transferred via the cable is And the potential level of High / Low of the potential during the stop period is matched. Since the potential High / Low in the drive period and the stop period coincide with each other, signal transfer from the image sensor can be performed stably, so that appropriate image display can be guaranteed.

With the above configuration, the camera head connector 14
Each CCD with a phase delay from the substrate installed inside
The horizontal drive signal is output to the CCD 12 of the camera head 3, and an output signal is obtained from the CCD 12 according to the timing.

The output signal output from the CCD 12 is input to the processor unit 5 through the amplifier circuit 29 in the camera head connector 14 via the camera cable 12.
Since the phase is delayed by the horizontal drive signal, the CCD 12
Are also phase-delayed.

Although not shown in FIG. 2, TGIC
From 20, various sampling signals for image processing in the processor unit 5 are output to the processor unit 5 side. The phase-delayed output signal from the CCD 12 has an appropriate phase relationship with the various sampling signals.

Such a circuit is connected to the camera head connector 1
If the camera head 3 provided in the camera head 4 is used, the phase of each CCD drive signal output from the camera head connector 14 is appropriately changed according to the cable length of each CCD 12 and the camera cable 13 and the type thereof. Amplifier circuit 2
The phase of the output signal from the CCD 12 input to the processor unit 5 via the input unit 9 can be always input to the processor unit 5 at a constant phase interval.

Since the signal from the CCD 12 is always input to the processor unit 5 at a constant phase interval, the processor unit 5 does not have the additional circuit introduced in the section of the prior art and the plurality of circuits for each image sensor. Since the circuit configuration can be simplified and only a single signal processing circuit needs to be provided, the circuit size inside the processor unit 5 can be suppressed, so that the price of the processor unit 5 can be prevented from rising. Only needs to be done. Therefore, it is possible to reduce the cost of the endoscope apparatus for performing the endoscopic inspection.

The above-mentioned waveform correction circuits 22 and 23 shape the output waveform so that the drive signal actually output to the CCD 12 of the camera head 3 has an appropriate waveform, and
Output to the side.

When various drive signals, for example, CCD horizontal drive signals H1 and H2 (inverted signals of H1) are supplied to the CCD 12 without passing through the waveform correction circuits 22 and 23, FIG.
5B, a signal having the waveform shown in FIG. 5B is generated in the CCD 12, and the CCD 12 cannot be properly driven. Therefore, the CCD horizontal drive signals H1 and H2 are passed through the waveform correction circuits 22 and 23, and the signals shown in FIG. CCD horizontal drive signals H, H ′).

The ideal drive signal to the CCD 12 is shown in FIG.
5A, the signal waveform changes as shown in FIG. 5B without the waveform correction circuits 22 and 23 via the camera cable 13 as shown in FIG. 5B, and the CCD 12 cannot be driven properly. Therefore, the waveform correction circuits 22 and 23 use the camera cable 13 so as to obtain an appropriate waveform.
The drive signal is supplied to the CCD 12 by performing signal shaping.

An example of the signal shaping is shown in FIG.
In other words, if the cable length is long and waveform correction is not performed, the waveform becomes as shown in FIG. 5B. For example, the rising side of the pulse waveform is increased in advance, and the waveform after being affected by the cable length is shown in FIG. The waveform can be made close to 5 (A).

Among the various drive signals, those which are easily affected by the cable length are, in particular, the CCD horizontal drive signals H and H 'and the reset pulse ΦR. Therefore, as shown in FIG. The phase of the reset gate original pulse Xrg is adjusted by the phase delay circuits 18 and 19, and the waveforms are corrected by the waveform correction circuits 22 and 23.
The corrected CCD horizontal drive signals H and H ′ and the reset pulse φR are output to the CCD 12 via the camera cable 13.

The camera cable 1 of the camera head 3
If the cable length of the cable 3 is different, the method of shaping the signal waveform described above is different. In this case, by changing the constants of the resistors and capacitors of the waveform correction circuits 22 and 23, it is possible to form an appropriate signal waveform. FIG. 6 shows an example in this case.

FIG. 6A shows an example where the cable length is L1. Input CCD horizontal drive signal H
Signals such as 1 (see FIG. 5A or FIG. 6C) are input to the waveform correction circuit 22 (or 23) via the buffer 53.

In this case, the resistor R1 and the capacitor C
The voltage is output to an output terminal via one parallel circuit, and a voltage + Vp divided by resistors Rb1 and Rb2 is applied to this output terminal. From this output terminal, a waveform-corrected horizontal drive signal H for CCD is output.

On the other hand, FIG. 6B shows an example where the cable length is L2 (L1 <L2). In this case, instead of the resistor R1 in FIG. 6A, the resistors R2 and Rb1 'and Rb instead of the resistors Rb1 and Rb2 are used.
2 ', a capacitor C2 is employed instead of the capacitor C1. In this case, the relationship between the resistance value and the capacitance of the capacitor is R1> R2, C2> C1, Rb1> Rb1 ', R
b2 '> Rb2.

As described above, the resistance value of the waveform correction circuits 22 and 23 on the circuit board 17 changes from R1 to R2 or the like.
The value shown in FIGS. 6A and 6B can be easily set by a variable resistor or a variable capacitor so that the capacitance value can be changed from C1 to C2. In this case, some resistance values may be formed by fixed resistors, and only necessary variable resistance values may be formed by variable resistors. The same applies to the capacitance value of the capacitor.

The amount of waveform correction for the cable length may be roughly as compared with the case of the phase correction of the driving signal such as the CCD horizontal driving signal H, so that the configuration is manually set with a variable resistor as described above. It should be noted that the waveform correction may have a structure that can be electrically variably set from outside similarly to the phase correction. When the cable lengths are different, as shown in FIGS. 6A and 6B, the constants of passive elements such as waveform shaping resistors and capacitors are adjusted to the corresponding cable lengths of the camera heads 3 so that each camera can be used. For each head 3,
An appropriate drive signal and waveform signal can be supplied to the CCD 12.

The above-described CCD horizontal drive signal H1 is composed of a signal drive period Ta in which the High / Low potential is switched at a constant period, and a signal stop period Tb in which the signal stops at either High / Low potential (FIG. 6). (C)). When the horizontal drive signal composed of these two periods Ta and Tb has a longer cable and the values of the passive elements of the above-described waveform correction circuits 22 and 23 are larger, the waveform of the CCD 12 is confirmed. / Low level,
The High / Low level of the potential during the stop period does not match.

The potential Hi between the driving period and the stop period is set to Hi.
When the gh / Low divergence increases, the CCD 12
The ND margin exceeds the absolute rating, and the normal CCD 12
Cannot be driven. Therefore, in such a case, as shown in FIGS. 6A and 6B, the supply voltage to the buffer 53 on the connector substrate for driving the horizontal drive signal is an arbitrary potential in the signal drive period Ta. Vcc1
During the signal suspension period Tb (Vcc2 <Vcc1)
By switching and supplying the potential Vcc2 via the changeover switch 54, the divergence of the potential between the drive period Ta and the stop period Tb can be suppressed, and the CCD 12 can be driven normally. FIG. 6 (C)
Is a CCD input to the waveform correction circuit 22 (or 23)
5 shows a horizontal driving signal H1 for use and a switching signal BLK used for switching, and the switching signal BLK is, for example, Low during the driving period Ta and High during the stop period Tb.

As described above, the buffer 53 is switched by the switching signal BLK.
FIG. 5 (C) shows the case where the value of the supply voltage to
5D shows an enlarged waveform of the CCD horizontal drive signal H shown in FIG. 5C (the CCD horizontal drive signal H is, for example, only a value indicated by Δ from the potential in the stop period Tb. , Set a little higher).

In the examples shown in FIGS. 6A and 6B, the potential during the signal suspension period is at the High level (that is, the case where the input signal is the CCD horizontal drive signal H1).
However, conversely, a signal in which the potential during the stop period is Low (that is,
In the case of a signal H2) having an opposite phase to the CCD horizontal drive signal H1 as an input signal, even if the switching pulse is common,
Vcc2 may be supplied during the drive period Ta, and Vcc1 may be supplied during the stop period Tb.

In the output of the CCD 12, the amount by which the signal amplitude is attenuated differs depending on the cable length. If the signal amplitude of the output of the CCD 12 supplied to the processor unit 5 is different, the brightness of the image to be observed displayed on the external monitor 6 is different due to the difference in the CCD 12 and the cable length, which is not desirable.

Therefore, at least in the camera heads 3 using the same CCD 12 and having different cable lengths,
In order to make the brightness of the image displayed on the external monitor 6 constant, an amplification circuit 29 provided in the camera head connector 14
The brightness is adjusted on the observation monitor 6 even if the cable length is different. In this case, the amplification degree (gain) of the amplifier circuit 29 is manually set to the resistance value of the variable resistor for gain setting in the amplifier circuit 29. Also in this case, the gain may be variably set by an external electric signal.

With the above-described method, an image pickup apparatus can be realized in which a single processor unit 5 can drive a plurality of camera heads 3 in an appropriate state even if the cable length is different or the CCD 12 is different. Become.

As described above, the present embodiment has the following effects. Each of the camera heads 3 removably connected to the processor unit 5 is provided with a phase varying means for varying a phase amount of a drive signal according to a cable length of a camera cable 13 used for the camera head 3.
Since the storage means for electrically rewriting and setting the data for determining the phase amount and the input section for inputting the data are provided in the storage means, even if the cable length is different, it is optimal for the cable length. It can be easily set to an appropriate phase amount, and can also be easily set when it is necessary to change to a different phase amount by repair or the like in order to cut a cable or the like. For this reason, it is possible to suppress soaring of the processor section.

More specifically, by providing the above-described circuit in the camera head connector 14 of the camera head 3, the length and type of the cable 13 used for the camera head 3 or the type of the image sensor can be reduced. Even if they differ, the phase of each signal can be shared by the circuit portion inside the connector 14 at the time of transfer from the camera head 3 to the processor unit 5, so that the drive circuits in the processor unit 5 have different cable lengths. There is no need to provide a plurality of units corresponding to the cases, and a single unit is sufficient. Therefore, since the circuit configuration can be unified, the rise in the price of the processor unit 5 can be suppressed.

Further, since the waveform correcting means is provided and the means for easily and variably setting the amount of waveform correction of the waveform correcting means are provided, it is possible to appropriately cope with the case where the cable length and the characteristics of the image sensor are different.

Further, according to the present embodiment, there is an effect that expansion is easy. For example, in an existing endoscope apparatus adapted to a certain cable length, for example, when an electronic endoscope having a different cable length is purchased, and an attempt is made to allow an endoscope inspection with the electronic endoscope. In the conventional example, if the processor does not support different cable lengths,
You also have to buy a processor. In addition, cables corresponding to different cable lengths are very expensive.

On the other hand, when the imaging apparatus of the present embodiment is used, that is, when an electronic endoscope having a circuit board 17 as shown in FIG. Even in the case of the processor in the endoscope apparatus, it is easy to set so that the imaging element of the electronic endoscope can be driven at an appropriate phase. Therefore, expansion is easy.

As described above, in the above description, the camera head 3 is used as an image pickup device. However, an electronic endoscope in which an image pickup device such as a CCD is arranged at an image forming position of the objective optical system at the distal end of the insertion section. The same applies to the case of. In this case, the cable length of the camera head cable is the cable length of the signal cable from the image pickup device at the distal end to the connector to which the processor unit 5 is connected.

(Second Embodiment) Next, a second embodiment of the present invention will be described with reference to FIGS. As described above, by providing the circuit shown in the first embodiment in the camera head connector 14, a plurality of image pickup devices can be driven by the single processor unit 5.

However, for example, when the cycle of the reference clock for driving the image pickup device is different, or when the image pickup device having a different driving phase relationship is used for the electronic endoscope (scope) or the camera head 3, the camera head Connector 14
It is necessary to add a circuit to the connector section such as the above so as to be able to absorb the difference in clock and the difference in phase relationship described above.

Therefore, a certain camera head as a reference
When the imaging device and the clock are different from those in the circuit in the connector section of the scope, the circuit is added to the board in the connector section, so that the circuit scale increases.

When the circuit size increases, the processor unit 5
The external shape of the connector portion such as the camera head connector 14 protruding from the outer surface of the camera becomes large. Processor unit 5
The usability is improved when the amount of protrusion from is suppressed to an appropriate amount of protrusion. As one means for suppressing the amount of protrusion, the protrusion can be suppressed by providing the cable break prevention portion of the connector portion not vertically but vertically with respect to the board.

In this embodiment, the camera head connector 14 in the first embodiment and the camera head connector 62 in the case where a circuit is added to the camera head connector 14 in the first embodiment are both provided in a common processor unit. 5 so that it can be used.

FIG. 7A shows, for example, the first
Head connector 14 in the case of the first embodiment
FIG. 7B shows a configuration in which is removable.
FIG. 7C shows the structure of the camera head connector 14 of FIG.
Shows the structure of the camera head connector 62 having the features of the second embodiment in which the amount of protrusion when the circuit is further added to the camera head connector 14 is reduced.

As shown in FIG. 7A, the camera cable 1
An exterior member 64 of the camera head connector 14 is attached to an end of the camera body 3 via a cable break prevention member 63, and a card-shaped connection pin 65 protrudes from a front end of the exterior member 64. By inserting the camera head connector 14 into the connection slot 67 provided on the outer surface 66 of the processor unit 5 with the connection pin 65 side facing forward, the connection pin 65 is connected to a connection pin receiver (not shown) deep inside the connection slot 67. can do. Note that a lock portion 68 that locks when connected is provided on the upper surface of the exterior member 64.

As shown in FIG. 7B, the camera cable 13 has a cable break prevention member 63 and a ferrite member 69.
Through the cable break preventing member 63 and the electric board 70 arranged in the horizontal direction. This electric board 70
2 are mounted with integrated circuits and electronic components constituting the circuit shown in FIG. The interior of the exterior member 64 has a watertight structure, and can be cleaned or the like.

In this embodiment, if it is necessary to add a circuit for mounting an integrated circuit or an electronic component to the camera head connector 14 shown in FIG. You need a long one,
In the case where it is mounted thereon, it becomes longer in the horizontal direction than that of FIG.
7, the amount of protrusion from the outer surface 66 of the processor unit 5 becomes too large, so that the structure shown in FIG. ing.

The electric board 71 which is longer in the horizontal direction than the electric board 70 of FIG. 7B and on which more electronic components and the like are mounted.
The end of the camera cable 13 connected to the electric board 71 is once bent downward, is directed to a space 72 provided vertically below the electric board 71, is inserted into the ferrite member 69, and is further connected to the cable breaking preventing member 63. Drawn out to the outside. The ferrite member 69 is provided in the space 72.
The position is firmly fixed and held by the protrusions of the ferrite, the ferrite supporting member 73, the ferrite pressing member 74 and the like.

By arranging such an arrangement, the electric board 7 can be compared with the case of the normal camera head connector 14.
In spite of the electric board 71 having a larger board size than 0, the amount of protrusion from the outer surface 66 of the processor section 5 can be made not so large. Also in this case, the inside of the exterior member 64 has a water-tight structure, and can be washed and the like.

As another method, there is a method of setting an appropriate protrusion amount by minimizing a circuit to be enlarged itself as much as possible. FIG. 8 shows an example in this case. FIG.
(A) shows a reference circuit example, for example, a substrate circuit 79 of a modification of FIG. In this circuit configuration, the TGIC 20 and V-
It comprises a plurality of elements such as a sampling signal generation circuit 80 in addition to the drv21. Sampling signal generation circuit 8
0 generates each sampling signal from the output signal of the TGIC 20 and outputs it to the processor unit 5 from the sampling signal output terminal 81. The output signal of the phase delay circuit 18 is input to the waveform correction circuits 22a and 22b,
The horizontal drive signal H for D and the opposite phase H 'are generated.

In addition, the signal processing system of the circuit board 79 is supplied with power supplies (1) 83 and (2) 84 for the positive circuit board and a power supply 85 for the negative circuit board. The processor unit 5
Positive and negative CCD power input terminals 86, 87 connected to
And the circuit board GND 88 are connected to the positive and negative CCD power supply terminals 89 and 90 via the circuit board pattern and the circuit board GND 91.
And is applied to the CCD 12 via the camera cable 13. Other configurations are the same as those described in FIG.

In FIG. 8A, a sampling signal generating circuit 80 for sampling an output signal from the CCD 12 is further provided. In the TGIC 20, since not all the sampling signals are prepared as standard, usually, necessary signals other than those prepared are prepared from the standard prepared signal via the sampling signal generating circuit 80. It must be formed and output to the processor unit 5.

In this state, the components inside the connector are not divided into a plurality of elements, but are replaced with a single element or a rewritable logic element, and the degree of integration of the circuit scale itself is improved. By reducing the size of the connector, the amount of protrusion of the connector can be suppressed.

For example, as one example, the TGIC 80 and the V-dr
By using the device 94 having the functions of the v21 and the sampling signal generation circuit 80, the circuit scale can be reduced by using such an integrated element. FIG. 8B shows a substrate circuit 93 of the example. Alternatively, there is a method of creating an element equivalent to the device 94 using a programmable IC.

As another method, various drive signals necessary for driving the image pickup device are not supplied from the substrate in the connector but all of them are supplied from the processor unit. Substrate size can be reduced. With this method, the elements for the drive signal supplied from the processor unit may be omitted from the board in the connector, the scale of the circuit itself may be reduced, and the amount of protrusion of the connector from the processor unit may be suppressed.

FIG. 8C shows a substrate circuit 96 of this example. In FIG. 8C, V-drv is compared with FIG.
The vertical drive signal generated by the processor 21 is supplied from the processor unit to the vertical drive signal input terminal 97, and is output from the output terminal 30 to the CCD 12, thereby reducing V-drv 21 from the substrate.

In any one of the above-described methods, by suppressing the amount of protrusion of the connector from the processor section, the stability of the camera head at the time of use or the like is improved, and as a result, the usability by the user can be improved.

In addition, providing an electric circuit in the connector increases unnecessary electromagnetic wave radiation and the like as compared with a case where a drive circuit for the image pickup device is provided in the processor section, and it is necessary to take measures against it.

As described above, the camera head connector 1
If the connector such as 4 can be miniaturized, the reliability and the like of the camera head can be further improved, and it can be a measure against unnecessary radiated electromagnetic waves. However, on the other hand, miniaturization of connectors
This is almost the same as miniaturization of the circuit board included in the connector.
In some cases, it is difficult to insert an additional member such as an MC filter.

Therefore, it is necessary to take measures for improving the EMC resistance without largely changing the size of the circuit board.
One example is to provide a GND plane as wide as possible near the circuit board to be used.

FIG. 9 shows an example of this case. Note that FIG.
FIG. 9A shows a camera head connector and a processor unit provided with a camera head (connector) connection slot so that the camera head connector is detachable, and FIG.
9A shows an internal structure, and FIG. 9C shows a bottom-side structure of a main part in FIG. 9B.

As shown in FIGS. 9A and 9B, a plate-like member 103 is disposed in a camera head connection slot 102 provided on a front panel 101 of the processor section 100. By inserting a camera head connector 104 into the slot 102, a plate-shaped connector plug 105 protruding from the front end thereof is connected to a connector receptacle 106 shown in FIG. 9B at a deep portion of the camera head connection slot 102. You.

The GND plane in the processor unit 100 and the camera head connection leaf slot 102 of the processor unit 100
The plate-like member 103 provided in the inside is connected to the GND in the processor unit 100 by a flexible member 107 shown in FIG.
Connected to the surface. The flexible member 107 is connected to the plate-like member 103 and the GND plane in the processor unit 100 with as large an area as possible.

It is assumed that the entire surface of the plate-like member 107 is a single electric plane, that is, a so-called solid state. Therefore, the plate-like member 107 as a whole is the same as the GND plane of the processor unit 100.

The camera head connection slot 1
A circuit board 109 is arranged in an exterior case 108 of the camera head connector 104 inserted and fixed in the camera head connector 02. An electronic component 110 and the like are mounted on, for example, the upper surface of the circuit board 109, and a base end of the connector plug 105 is connected and fixed to a front end thereof.

Contact patterns 111 are formed on both sides of the connector plug 105, and the connector receptacle 10
6 and are connected by pressing.

The connector 104 is connected to the connection slot 10
When inserted into the slot 2, the circuit board 109 has a facing surface 113 facing the plate-like member 103 disposed near the bottom surface in the slot 102, and a portion of the surface that can contact the member 144. Is a single electric plane 1 similar to the plate member 103.
It has 14. FIG. 9C shows the plate-like member 103 and the single electric plane 114 in this case. Note that FIG. 9C is a diagram viewed from the back surface side of the circuit board 109.

[0104] As shown in FIG.
A gap 115 is provided in a portion of the portion facing the plate member 103, and when the connector 104 is inserted into the connection slot 102, the plate member 103 is inserted into the connector 104 through the gap 115, Outer case 108
The pressing portion 116 protrudes from the bottom surface toward the upper gap 115 side, and is pressed against the flat surface 114 to be electrically connected.

As a result, the electronic component 1 on the circuit board 109
The plane 114 on the surface 113 on which 10 is not mounted is connected to the GND plane inside the processor unit 100,
A GND plane having an area as large as possible can be provided near the circuit board 109. The insertion of the plate-like member 103 is described in FIG.
As shown in (C), screwing portions 117 a and 11 for fixing the circuit board 109 to the outer case 108 of the connector 104.
7b (see FIG. 9C) is equal to or less than the space width.

According to the second embodiment, a user-friendly camera head can be provided to the user by setting the connector shape and the board configuration in the connector to the above-described shapes and configurations. The other effects are the same as those of the first embodiment.

In the first embodiment, for example, a drive signal generation circuit for generating a drive signal based on a synchronization signal from the external processor unit 5 is provided in the camera head connector 14. As shown in FIG. 8 (C), a common drive signal may be generated on the processor unit 5 side, and phase correction by phase delay may be performed on each camera head connector 14 side according to the cable length or the like.

[Supplementary Notes] Imaging means for imaging a subject image; a read signal for reading an imaging signal from the imaging means; and a driving signal generating means for generating a driving signal having a non-reading signal for generating a non-imaging period of the imaging means. A connection cable connected to the imaging means, for transmitting the drive signal, a variable means for varying the signal level of the drive signal, and output to the imaging means via the connection cable,
An image pickup apparatus comprising: an output control unit that controls the variable unit according to a timing of the drive signal output from the drive signal generation unit.

2. An image pickup device which incorporates an image pickup device for picking up an image of a subject and is detachably connected to a common signal processing device (processor unit) so as to be able to display the picked up subject image on a monitor screen. A drive signal generating means for generating a drive signal for reading a signal; a phase variable means for varying a phase of the drive signal output from the drive signal generating means; and a drive signal output from the phase variable means. An imaging apparatus comprising: a connection cable for transmitting to an imaging unit; a rewritable storage unit for outputting a phase variable control signal to the phase variable unit; and an input unit for inputting write data to the storage unit.

3. Imaging means for imaging a subject image; driving signal generating means for generating a driving signal for reading an imaging signal from the imaging means; and phase varying means for varying the phase of the driving signal output from the driving signal generating means A connection cable for transmitting a drive signal output from the phase variable unit to the imaging unit, a rewritable storage unit that outputs a phase variable control signal to the phase variable unit, and writing data to the storage unit. An image pickup device comprising: an input unit for inputting; a processor to which the image pickup device is detachably connected to perform signal processing for generating a standard video signal; and a standard video signal output from the processor. A monitor that displays a subject image captured by the image capturing means when the image is input.

4A. In Supplementary Note 3, a plurality of image pickup devices having different connection cable lengths are detachable from the processor. 4B. In Supplementary Note 3, the drive signal generation unit, the phase variable unit, the storage unit, and the input unit are provided on a connector detachable from the processor. 4C. In Appendix 3, the drive signal generating means generates the drive signal based on a synchronization signal input from the processor.

[0112] 5. A camera head unit having an optical viewing tube, an imaging unit and a camera head connector unit, and a cable unit connecting both of them, and a processor unit for receiving a signal from the camera head unit and performing image processing. And an electronic endoscope apparatus comprising an external monitor and a light source device, wherein a circuit for correcting a phase of an output signal to an imaging unit is provided in the camera connector unit connected to the processor unit of the camera head unit. And an amplifying circuit for amplifying an output signal from the camera head so as to have an appropriate amplitude level in the camera connector.

6. 5. The electronic endoscope device according to claim 5, wherein the signal phase correction circuit corrects the phase of the signal using an electronic volume (hereinafter, EVR). 7. In Appendix 5, the signal phase correction circuit is a phase correction circuit that can correct different amounts of correction depending on the cable length of the camera head, and the amplification circuit is an appropriate amplifier depending on the cable length of the camera head. An electronic endoscope apparatus, wherein the electronic endoscope apparatus is an amplifier circuit whose degree is set. 8. In Supplementary Note 5, the signal phase correction circuit is a phase correction circuit that can correct different amounts of correction depending on the type of camera head cable, and the amplification circuit is appropriate for each type of camera head cable. An electronic endoscope apparatus characterized in that it is an amplification circuit in which an amplification degree is set.

9. Supplementary note 5, in the case where a plurality of image sensors are driven by a single processor unit, and even when the circuit scale for driving the image sensors is relatively large, the camera head connector unit may be used. An electronic endoscope device having a camera head, wherein the outer diameter of the electronic endoscope is relatively small. 10. 5. The camera according to claim 5, wherein when the camera head is connected to the processor, the GND of the processor and the GND of the camera are more positively contacted with each other. An electronic endoscope device characterized by a head portion. 11. 5. The phase correction circuit according to claim 5, wherein the phase correction circuit has a function of holding data to be opened for the amount of phase correction therein. 12. In Appendix 5, a circuit for phase correction, which is a switching circuit for applying different potentials between a signal drive period and a signal stop period of an arbitrary signal input / output to / from a phase correction circuit provided therein. An electronic circuit including a circuit for phase correction, characterized in that the circuit includes:

[0115]

As described above, according to the present invention, an image pickup device for picking up a subject image is built-in, and is detachably connected to a common signal processing device, so that the picked up subject image is displayed on a monitor screen. In an imaging device that enables, a driving signal generation unit that generates a driving signal for reading an imaging signal from the imaging element, a phase variable unit that changes a phase of the driving signal output from the driving signal generation unit, A connection cable for transmitting the drive signal output from the phase varying unit to the imaging unit, a rewritable storage unit for outputting a phase variable control signal to the phase varying unit, and inputting write data to the storage unit And the input unit, so that the imaging device sets the phase of the drive signal in accordance with the cable length of the connection cable with the phase variable control signal from the storage unit. Come, can be easily changed and set from the input unit even if the change of the phase required by such repair. Therefore, a common signal processing device is inexpensive.

[Brief description of the drawings]

FIG. 1 is an overall configuration diagram of an endoscope apparatus including a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a signal processing system in a camera head connector.

FIG. 3 is a diagram showing a circuit configuration of an EVR control element.

FIG. 4 is a diagram showing a timing chart and the like for explaining the operation of FIG. 3;

FIG. 5 is a diagram illustrating a case where waveform correction is not performed, a signal waveform whose waveform has been corrected, and the like.

FIG. 6 is a diagram showing a circuit example of a waveform correction circuit and the like.

FIG. 7 is a diagram showing a camera head connector and the like according to a second embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of a circuit board according to a second embodiment of the present invention.

FIG. 9 is a diagram showing a camera head connector and the like according to a second embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Endoscope apparatus 2 ... Optical viewing tube 3 ... Camera head 4 ... Light source device 5 ... Processor part 6 ... External monitor 7 ... Insertion part 11 ... Imaging part 12 ... CCD 13 ... Camera cable 14 ... Camera head connector 17 ... Board Circuits 18, 19 Phase delay circuit 20 Timing element (TGIC) 21 Vertical drive signal generation element (V-drv) 22, 23 Waveform correction circuit 24, 25 Phase fine adjustment circuit 26, 27 Variable resistance circuit ( EVR) 28 EVR control element 29 Amplifying circuit 41 RAM area 42 Decoding section 43 D / A section

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Kotaro Ogasawara 2-43-2 Hatagaya, Shibuya-ku, Tokyo Inside Olympus Optical Industrial Co., Ltd. (72) Inventor Hideki Tashiro 2-43-2 Hatagaya, Shibuya-ku, Tokyo Within Olympus Optical Co., Ltd. (72) Inventor Makoto Tsunagawa 2-43-2 Hatagaya, Shibuya-ku, Tokyo Inside Olympus Optical Co., Ltd. (72) Katsuyuki Saito 2-43-2, Hatagaya, Shibuya-ku, Tokyo Olympus Optical Co., Ltd. F-term (reference) 5C022 AA09 AC69 AC75 5C024 BX02 CY16 GY01 HX02 HX06 HX15 HX35 HX44 HX50 HX58

Claims (2)

[Claims] An image pickup device for picking up a subject image is built in,
By detachably connecting to a common signal processing device,
In an image pickup apparatus capable of displaying a subject image picked up on a monitor screen, a drive signal generating means for generating a drive signal for reading out an image signal from the image sensor, and a drive signal output from the drive signal generating means Phase variable means for varying a phase, a connection cable for transmitting a drive signal output from the phase variable means to the imaging means, and a rewritable storage means for outputting a phase variable control signal to the phase variable means; An imaging unit comprising: an input unit configured to input write data to the storage unit. 2. An image pickup means for picking up a subject image, a drive signal generation means for generating a drive signal for reading out an image pickup signal from the image pickup means, and a phase of the drive signal output from the drive signal generation means. Variable phase changing means, a connection cable for transmitting a drive signal output from the phase variable means to the imaging means, a rewritable storage means for outputting a phase variable control signal to the phase changing means, and the storage An input unit for inputting write data to the unit.