JP2002016329A - Wiring board and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board that has a smoothing surface, and an insulating board where a fine thin-film wiring layer with low resistance and uniform thickness is formed. SOLUTION: A wiring board X where a thin-film wiring layer 1 is formed is manufactured. In this case, the thin-film wiring layer 1 contains a glass phase containing SiO2, Al2O3, MgO, SrO, and CaO, diopside-type oxide crystal phase, and at least one kind of crystal phases selected from a group of at least Al2O3, MgSiO3, AlN, and MgTiO3, and also contains at least one kind selected from a group of Cu, Ag, and Au on the surface of an insulating board 3 made of ceramics with an opening porosity of 0.3% or less.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board having a thin film wiring layer formed on the surface of an insulating substrate, and more particularly to a wiring board having an insulating substrate having a smooth surface on which a thin film wiring layer can be formed satisfactorily. And a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, a wiring substrate has an insulating substrate formed of, for example, alumina ceramics, and a surface of the insulating substrate and / or a metallized wiring layer co-fired on the surface. In order to form a thin-film wiring layer capable of wiring a fine pattern with low resistance on the surface, for example, after polishing and smoothing the surface of the insulating substrate,
It is formed by laminating a thin film wiring layer made of a metal such as chromium, titanium, tantalum, or copper and an insulating film made of an organic polymer material such as polyimide on the surface of the insulating substrate by a thin film forming method.

[0003] Here, since the baking temperature of the insulating substrate constituting the wiring substrate is as high as about 1600 ° C., tungsten, molybdenum or the like of a high melting point metal is used as the metallized wiring layer formed inside the insulating substrate. Can be

[0004] Alumina ceramics constituting the conventional insulating substrate as described above has a high dielectric constant and cannot transmit signals at high speed. Further, since the high melting point metal constituting the metallized wiring layer has a high electric resistance, a signal cannot be similarly propagated at high speed. Therefore, it has been proposed to use a glass ceramic having a low dielectric constant and a low firing temperature of 1000 ° C. or less as an insulating substrate and using Cu or Ag having a low electric resistance as a conductor.

[0005] For example, the present applicant has disclosed in
In JP-A-36-36, lithium silicate glass or the like and Si
It has been proposed that a copper wiring layer be formed on the surface of a green sheet containing a mixture with an O ₂ -based filler and fired at 1000 ° C. or lower to produce a wiring substrate.

[0006]

However, when the insulating substrate is made of glass ceramics containing the above-mentioned glass such as lithium silicate and the filler of SiO ₂ system,
Since a large amount of voids are present in the insulating substrate and the smoothness of the substrate surface is impaired, the positional accuracy of the thin film wiring layer formed on the surface is reduced, so that fine wiring cannot be performed. There is a problem that the thin film wiring layer cannot be formed, the impedance characteristics of the signal transmitted in the wiring layer deteriorate, the reflection of the high-frequency signal increases, and the signal cannot be transmitted well.

Also, as a result of the voids impairing the smoothness of the substrate, the unevenness of the interface of the thin film wiring layer through which high-frequency signals mainly pass is increased and the wiring resistance in the high-frequency band is increased. Therefore, there is a problem that the transmission characteristics of the high-frequency signal are deteriorated.

Accordingly, the present invention provides a wiring substrate having an insulating substrate capable of reducing the conductor loss of high-frequency signals by forming a thin film wiring having a fine and uniform thickness on the surface, and a method of manufacturing the same. It is intended to provide.

[0009]

Means for Solving the Problems The present inventor has set forth the above object.
As a result of various studies on_Two, Al
_TwoO _ThreeContaining Si, MgO, SrO and CaO
Glass capable of precipitating oxide-type oxide crystal phase and filler
At least Al_TwoO_Three, MgSiO_Three, AlN, MgT
iO_ThreeA mixture with at least one selected from the group of
After molding, a thin film is deposited on the fired insulating substrate surface with few voids.
By forming a line layer, fine, low resistance, good
Has high impedance characteristics and reduces conductor loss of high frequency signals.
The production of wiring boards with wiring layers that can be reduced
I learned that

That is, the wiring board of the present invention is made of Si
O_Two, Al_TwoO_ThreeContaining MgO, MgO, SrO and CaO
Lath phase and diopside oxide crystal phase
And Al _TwoO_Three, MgSiO_Three, AlN, MgTiO_ThreeGroup of
Containing at least one crystal phase selected from the group consisting of
Table of insulating substrates made of ceramics with a porosity of 0.3% or less
On the surface, at least one selected from the group consisting of Cu, Ag and Au
Characterized by forming a thin film wiring layer containing one type
It is assumed that.

Here, the surface roughness (Ra) of the surface of the insulating substrate on which the thin film wiring layer is to be formed is 0.1 to 0.1.
μm or less, the dielectric loss of the insulating substrate at 60 to 77 GHz is 50 × 10 ⁻⁴ or less, and the dielectric loss of the thin film wiring layer formed on the surface of the insulating substrate is 110 × 10 ⁻⁴ or less.
Transmission characteristics S ₂₁ in GHz or less is -1.5 dB / cm
It is desirable that:

Further, a plurality of the insulating substrates are formed,
It is preferable that an internal wiring layer containing Cu or Ag as a main component is formed between the insulating substrates.

Further, the method for manufacturing a wiring board according to the present invention
A glass capable of precipitating a diopside oxide crystal phase containing iO ₂ , Al ₂ O ₃ , MgO, SrO, and CaO
0 to 95% by weight and at least Al as a filler
_A green sheet is formed by molding a mixture containing at least one selected from the group consisting of ₂ O ₃ , MgSiO ₃ , AlN, and MgTiO ₃ at a ratio of 5 to 60% by weight to produce a green sheet.
After baking by heating at 1000 ° C. for 0.2 to 5 hours to produce an insulating substrate made of ceramics having an open porosity of 0.3% or less, C is applied to the surface of the insulating substrate by a thin film forming method.
A thin film wiring layer containing at least one selected from the group consisting of u, Ag and Au is formed.

Here, the glass is made of SiO ₂ 30 to 5
5% by weight, 4 to 15% by weight of Al ₂ O ₃ ,
30% by weight, 5-20% by weight of CaO, 10% by weight of SrO10
It is desirably 25% by weight.

It is preferable that a conductor wiring layer containing Cu or Ag is formed on the surface of the green sheet, laminated, and fired to form an internal wiring layer.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings showing embodiments. FIG. 1 is a partially enlarged cross-sectional view for explaining the structure of a multilayer wiring layer formed on the surface of a semiconductor element housing package formed of a multilayer wiring board, which is an example of application of the wiring board of the present invention.

The structure will be described in more detail. As shown in FIG. 1, a package A has a multilayer wiring layer having a laminated structure of a wiring board X and a thin film metal layer 1 and an insulating film 2 formed on the surface thereof. The multilayer wiring layer Y is formed on the surface of the insulating substrate 3 of the wiring substrate X, and the thin film metal layer and the insulating film are formed in the order of the thin film metal layer, the insulating film,. According to FIG. 1, the thin film metal layers 1a, 1b, and 1c are formed, and the thin film metal layers 1a-1 are formed at positions where a part of the insulating film 2 is removed.
b, 1b-1c.
The electrode terminals 5 of the semiconductor element 4 are mounted and connected to the thin film metal layer 1a on the outermost surface of the multilayer wiring layer Y.

According to the present invention, in the multilayer wiring board constituting the package A having the above structure, the insulating substrate 3 is made of Si.
Glass and diopside oxide crystal phase containing O ₂ , Al ₂ O ₃ , MgO, SrO and CaO, and Al ₂ O ₃ , MgSiO ₃ , AlN, MgTiO ₃ as filler
It is a great feature that it is made of a glass ceramic containing at least one selected from the group consisting of: and having an open porosity of 0.3% or less.

According to the present invention, SiO ₂ , Al ₂ O ₃ , M
gO, CaO, Ca (Mg, Al) (Si, A
l) SrO is contained in a glass capable of precipitating a diopside oxide crystal phase of ₂ O ₆ , and at least one selected from the group consisting of Al ₂ O ₃ , MgSiO ₃ , AlN and MgTiO ₃ as a filler By firing under predetermined conditions, the open porosity of the ceramic can be reduced to 0.3% or less, particularly 0.2% or less, and the surface of the glass ceramic can be smoothed.
containing at least one low-resistance metal selected from the group consisting of u, Ag and Au, for example, a wiring width of 75 μm or less;
A fine, low-resistance thin-film wiring layer having an interval between wirings of 75 μm or less can be accurately formed with a uniform thickness. That is, when the open porosity of the insulating substrate 3 exceeds 0.3%, the positional accuracy of the thin film wiring layer containing Cu, Ag or Au decreases,
Fine wiring cannot be performed, the thickness of the wiring layer varies, the impedance characteristics of signals transmitted in the wiring layer deteriorate, and the transmission characteristics of high-frequency signals deteriorate.

Also, in order to improve productivity and simplify the process by omitting the polishing step of the ceramics, the surface roughness (Ra) of the glass ceramic on the burnt surface should be 0.1 μm or less, particularly 0.05 μm or less. Desirably.

It should be noted that voids in glass ceramics are reduced.
Dielectric loss in the high frequency band to reduce the open porosity
To reduce the loss, the alkali metal in the glass, Ba
O, B _TwoO_ThreeIs 5% by weight in oxide conversion
It is desirable that the content is not more than 1% by weight.

Further, according to the present invention, the above glass
And at least Al as a filler _TwoO_Three, MgSi
O_Three, AlN, MgTiO_ThreeAt least selected from the group of
One kind is desirably 5 to 60% by weight, particularly 10 to 50% by weight.
%, And then added and dispersed in a proportion of 30 to 40% by weight.
However, it is important to improve the wettability with glass to improve sinterability.
Suppression of void generation, high strength ceramics, low dielectric loss
The average particle size is from 2 to 10 μm, especially from 3 to 7 μm
m, and the shape may be spherical,
Needle-shaped or plate-shaped asbestos for high strength and low dielectric loss
Anisotropic particles having a pect ratio of 3 or more may be used.

Unless the above filler is contained, there is a problem that the rate of generation of voids increases and the ceramic strength of ceramics decreases.

The thin metal layer 1 in the multilayer wiring layer Y
Contains at least one low-resistance metal selected from the group consisting of Cu, Ag and Au, and includes Ti, W, and M as other components.
It is desirable to have a structure in which at least one type of metal layer selected from the group consisting of o, Cr, Ni, and Ta is laminated in a plurality. In order to increase the adhesive strength in the thin film metal layer 1c formed directly on the surface of the wiring board X, the thickness of the thin film metal layer 1 is preferably 0.1 to 3 μm, particularly 0.3 to 1.5 μm. It is desirable to form a metal layer containing W or Mo, whereby the adhesion strength of the thin film metal layer to the wiring board can be increased.

Further, the W and Mo-containing layer contains W and / or
Alternatively, it is desirable that Mo be contained in an amount of 50% by weight or more, particularly 70% by weight or more, and it is particularly preferable that the layer be made of an alloy layer with Ti.

The thin-film metal layer 1c is composed of a Cu layer and W, M
Although a laminate with an o-containing layer may be used, in order to increase the adhesive strength between the wiring substrate X and the insulating substrate 3, W, Mo is interposed on the surface of the wiring substrate X via a 0.05 to 0.5 μm thick Ti layer. It is desirable that a Cu-containing layer having a thickness of 1 to 10 μm is formed as a main conductor layer by laminating the Cu-containing layers, and the thickness is 1.5 to 15 μm as a whole. Further, a Cr layer may be formed on the surface in contact with the insulating film in order to enhance the adhesion to the insulating film 2.

Further, the thin-film metal layers 1a and 1b include at least one metal layer selected from the group consisting of Cu, Ag and Au having a thickness of at least 1 to 10 μm.
It is desirable to include at least one metal layer selected from the group consisting of i, W, Mo, Cr, Ni, and Ta.
By interposing a Cr layer between the Cu layer and the insulating film 2, the adhesive strength with the insulating film can be increased. Similarly, the thickness of the thin film metal layers 1a and 1b is suitably 1.5 to 15 μm.

As the insulating film 2 in the multilayer wiring layer Y, a polyimide-based or epoxy-based organic polymer material can be used. In particular, by using a polyimide-based organic polymer material, a polyimide-based organic polymer material can be used. Since the linear thermal expansion coefficient of the organic polymer material is about 20 ppm / ° C., the difference in the linear thermal expansion coefficient between the insulating substrate 3 and the insulating film 2 is reduced. The warpage of the wiring board caused by the difference in thermal expansion coefficient can be reduced. It is appropriate that the thickness of the insulating film 2 is 1 to 10 μm.

The package A for housing semiconductor elements in FIG. 1 is a wiring board X comprising at least one layer of an insulating substrate 3.
And a multilayer wiring layer Y formed on the surface thereof. The semiconductor element 4 is mounted on the surface of the package A, and the semiconductor element 4 is electrically connected to the electrode terminals 5 formed on the lower surface and the wiring layer on the surface of the package A. As shown in FIG. 2, connection terminals 6 for electrically connecting to the external circuit board B are provided on the lower surface of the package A, and are electrically connected to the wiring conductors on the surface of the external circuit board B. As a result, the package A is mounted on the external circuit board B.

Usually, it is desirable that the above-mentioned electrode terminals 5 and connection terminals 6 are formed of a brazing material such as solder. When the package A is a BGA type package as shown in FIG. Are formed by solder balls.

The external circuit board B is made of, for example, an insulating material containing at least an organic resin, specifically, a glass-epoxy composite material, and generally has a linear thermal expansion coefficient of 13 to 16 ppm / ° C. A printed circuit board or the like is used, and Cu, Au, Al, Ni, P
A wiring made of a metal conductor such as b-Sn is formed.

A metallized pad 7 for connection to the external circuit board B is formed on the back surface of the package A. The thin metal layer 1a on the outermost surface of the multilayer wiring layer Y is different from the thin metal layer 1a in the multilayer wiring layer Y. They are electrically connected via via-hole conductors 8 formed through the metal layers 1 b and 1 c and the insulating substrate 3.

(Method of Manufacturing Wiring Board) In order to manufacture a wiring board having via-hole conductors 8 and metallized pads 7 using the above-described glass ceramic, first, for example, the above-mentioned glass component having an average particle size of 1 to 10 μm is mixed with the above glass component. 40-95% by weight, especially 50-90% by weight, further 60-70% by weight
After adding an appropriate organic resin binder to a mixture of 5 to 60% by weight, particularly 10 to 50% by weight, and more preferably 30 to 40% by weight of a filler component having an average particle size of 2 to 10 μm, For example, mold press, cold isostatic press, injection molding, extrusion molding, doctor blade method,
It is formed into an arbitrary shape by a calender roll method, a rolling method, or the like. In particular, a doctor blade method is suitable for producing a green sheet.

Next, a through-hole for forming a via-hole conductor 8 is formed in the ceramic green sheet, and the through-hole is filled with a conductive paste containing copper or silver as a main component. The pattern of the metallized pad 7 is formed by a printing method or the like. Then, if necessary, a green sheet having a metallized wiring layer and a via-hole conductor formed thereon is laminated in the same manner as described above.

The method of forming the metallized wiring layer is not limited to the printing method described above, but is formed by transferring a transfer film on which a metal foil of a predetermined wiring pattern formed on the surface is transferred to the surface of the green sheet. You can also.

Next, in firing the above-mentioned molded body,
First, the binder component blended for molding is removed. The removal of the binder is performed in an air atmosphere at about 700 ° C., for example, when Cu is used as the conductive material, the removal is performed in a nitrogen atmosphere containing steam at 100 to 700 ° C. At this time, the shrinkage start temperature of the molded body is 700
It is preferable that the temperature is about 850 ° C., and if the shrinkage onset temperature is lower than the above range, it becomes difficult to remove the binder. Required.

Then, in an oxidizing atmosphere or a non-oxidizing atmosphere at a temperature of 800 to 1000 ° C. for 0.2 to 5 hours, in particular, at 0.degree.
By firing for 5 to 2 hours, the open porosity of the fired glass ceramic is 0.3% or less, particularly 0.2% or less,
The porosity inside the glass ceramic is 3% or less, particularly 1% or less. That is, if the firing temperature is lower than 800 ° C. or the firing time is shorter than 0.2 hours, the glass ceramics cannot be densified and the open porosity increases, and conversely, the firing temperature exceeds 1000 ° C. If the firing time is longer than 5 hours, voids in the glass ceramics increase again.

When the above-mentioned firing is performed simultaneously with a conductive material such as Cu, the firing is performed in a non-oxidizing atmosphere such as a nitrogen or nitrogen / hydrogen mixed atmosphere where the conductive material is not oxidized. Thus, a wiring board X having the metallized pads 7 and the via-hole conductors 8 is obtained.

The glass ceramic produced as described above contains a crystal phase generated from a glass component,
There is a crystal phase generated by the reaction between the glass component and the filler component, a filler component, or a crystal phase generated by decomposition of the filler component, and the like, and a glass phase exists at the grain boundaries of these crystal phases. (Multilayer Wiring Layer) According to the present invention, a multilayer wiring layer Y is formed on the surface of the insulating substrate 3 described above. This multilayer wiring layer Y is formed by the following steps. (1) A thin-film metal layer made of a predetermined metal is formed on the entire upper surface of the wiring substrate X by a thin-film method such as a sputtering method, an ion plating method, or a vacuum evaporation method using a plurality of metal layers while using different evaporation sources. 1.5 to 15 layers
The film is formed with a thickness of μm. Next, a photosensitive photoresist is applied all over the thin film. Then, an etching mask is formed by a well-known photolithography technique, and an unnecessary portion of the thin film metal layer is removed by a reactive ion dry etching using an acidic etching solution or a reactive gas (CCl4, BCl3). Thus, a thin-film metal layer 1c having a predetermined pattern is obtained. Thereafter, the etching mask is removed by peeling. (2) Next, an insulating film 2 made of an organic polymer insulating material such as polyimide is formed on the thin film metal layer 1c. For example, a polymer solution of an organic polymer material is uniformly applied to the upper surface of the wiring substrate X by a spin coating method or the like, and heated to a temperature at which the organic polymer material is cured. (3) Next, connection through holes for connecting the upper and lower thin film metal layers are formed by using a conventionally known photolithography technique.

By repeating the above steps (1), (2) and (3), a plurality of predetermined thin film metal layers and insulating films can be formed. Can be made.

Note that connection terminals for electrically connecting to an external circuit board are appropriately attached to the multilayer wiring board.
In addition, a semiconductor element such as silicon is prepared for the multilayer wiring board, and is positioned so that an electrode terminal of the semiconductor element is connected to a connection pad provided on an upper surface of the multilayer wiring board. It is mounted by soldering or the like by a method.

[0042]

EXAMPLES In order to confirm the effects of the multilayer wiring board of the present invention,
A multilayer wiring board for evaluation was produced as follows. First, a glass having the following composition was prepared. Glass A: SiO ₂ 50.2 wt% -Al ₂ O ₃ 5.0 wt% -MgO 16.1 wt% -CaO 15.1 wt% -SrO 13.6 wt% Glass B: SiO ₂ 47.5 wt% -Al ₂ O ₃ 4.9 wt% - MgO16.1 wt% -CaO11.5 wt% - SrO20 wt% glass C: SiO ₂ 10.4 wt% -Al ₂ O ₃ 2.5 wt% -B ₂ O ₃ 45 .3 wt% -ZnO35.2 wt% -Li ₂ O6.6 wt% glass D: SiO ₂ 50 wt% -Al ₂ O ₃ 5.5 wt% - MgO18.5 wt% -CaO26 wt% the glass to Then, the composition shown in Table 1 was press-molded to produce a molded body by a doctor blade method, and the molded body was subjected to a binder removal treatment in N ₂ + H ₂ O at 700 ° C. Firing under the conditions To prepare a La mix.

The open porosity of this ceramic was measured based on the Archimedes method, and the dielectric constant, dielectric loss, flexural strength, and coefficient of thermal expansion were evaluated by the following methods.

The dielectric constant and dielectric loss were 2-7 diameters.
mm, cut into a shape with a thickness of 2-2.5 mm, 60 GH
At z, the measurement was performed by a dielectric cylinder resonator method using a network analyzer and a synthesized sweeper. In the measurement, the dielectric resonator was excited by an NRD guide (non-radiative dielectric line), and the dielectric constant and the dielectric loss were calculated from the resonance characteristics of the TE ₀₂₁ or TE ₀₃₁ mode.

Further, the sample was cut into a shape of 4 mm in width × 3 mm in thickness × 70 mm in length, and subjected to a three-point bending test in accordance with JISC-2141. In addition, from room temperature to 4
A coefficient of thermal expansion was calculated by taking a thermal expansion curve at 00 ° C. Further, the surface roughness (Ra) of the baked surface of the porcelain was measured with a surface roughness meter, and is shown in Table 1.

[0046]

[Table 1]

Further, a green sheet having a thickness of 500 μm was prepared by the doctor blade method using each raw material composition shown in Table 1, and a via hole was formed in this sheet.
Fill the Cu metallized paste by screen printing method,
Further, a metallized pad pattern was applied by screen printing.

Then, six green sheets coated and filled with the metallizing paste were laminated and pressed together while positioning the through holes. After debinding the laminate in N ₂ + H ₂ O at 700 ° C., it was fired under the same conditions as in Table 1 to produce a wiring board.

After a Ti layer is formed to a thickness of 0.2 μm on the insulating substrate surface of the wiring substrate by a vacuum deposition method, various metal layers of various TiW, TiMo, Ni, Cr and Ta are formed. After forming with a thickness of 10 μm, the Cu layer is
m. The content of W and Mo in the alloy layer of TiW and TiMo is 90% by weight.

Thereafter, a photosensitive photoresist is applied to the entire surface of the thin-film metal layer, an etching mask is formed by photolithography, and an unnecessary portion of the thin-film layer is removed with an acidic etchant to remove the unnecessary thin film. Saga 1 ×
An evaluation pad of 1 mm was formed.

Then, a pin made of Cu is soldered to this pad, and the wiring board is held for 15 minutes / 15 minutes in a thermostatic chamber controlled at -40 ° C. and 125 ° C.
After a thermal cycle of 100 cycles, the pin was pulled up vertically, and the strength when the solder or the thin film metal layer was separated was evaluated as the adhesive strength of the thin film metal layer. The results are shown in Table 2.

In the same manner as described above, a length of 30.0 mm, a width of 3.0 mm and a thickness of 20 μm were formed on the surface of the insulating substrate.
20 evaluation pads were formed, the sheet resistance of each pad was measured, and the average value was calculated as the sheet resistance.

Further, a ground layer formed by simultaneous sintering with the glass ceramic using a copper paste is provided on the entire lower surface of the glass ceramic in Table 1, and a thickness of 150 mm is formed on the upper surface of the glass ceramic in the same manner as described above.
Wiring width 260 μm, thickness 10 μm, length 1
0, 20, 30 μm thin film wiring layer (impedance 50
Ω) to form three types of microstrip lines,
A 110 GHz signal is input from the input terminal, and the transmitted signal strength is measured by a network analyzer.
Were evaluated transmission loss S ₂₁ of the thin-film wiring layer by a least square method from the relationship between the length and the signal strength of the wiring layer.

[0054]

[Table 2]

As is clear from the results shown in Table 2, in accordance with the present invention, sample No. 1 using a glass ceramic containing a predetermined glass, a diopside-type oxide crystal phase and a predetermined filler as an insulating substrate was used. 2-6, 8-10, 12,
In Nos. 13, 15 and 18, the dielectric loss of the porcelain was reduced, and the transmission loss of the thin film wiring layer was smaller than -1.5 dB / cm. Furthermore, a high adhesive strength of 22.5 MPa or more was obtained.

On the other hand, in sample No. Sample No. 1 having a glass content of less than 40% by weight.
Sample No. 7 in which the firing time of the glass ceramic was shorter than 0.2 hours. 11, sample No. longer than 5 hours. In No. 14, the open porosity of the porcelain exceeded 0.3%, and the signal transmission loss deteriorated by more than -2 dB / cm.

In addition, Sample No. using a glass that does not precipitate a diopside oxide crystal phase. Sample No. 19 using a glass that precipitates a diopside oxide crystal phase but does not contain SrO. In No. 20, the open porosity was more than 2% and the transmission loss was large.

[0058]

As described in detail above, according to the present invention,
A glass capable of precipitating a diopside oxide crystal phase containing SiO ₂ , Al ₂ O ₃ , MgO, SrO and CaO, and at least Al ₂ O ₃ , MgSi as a filler
A mixture with at least one selected from the group consisting of O ₃ , AlN, and MgTiO ₃ is molded and then baked to form SiO ₂ , Al ₂
A glass phase containing O ₃ , MgO, SrO and CaO, a diopside oxide crystal phase, at least Al ₂ O ₃ ,
Forming a thin film wiring layer on the surface of an insulating substrate containing at least one selected from the group consisting of MgSiO ₃ , AlN and MgTiO ₃ and having a small number of voids, thereby reducing the dielectric loss of the ceramic and reducing the void fraction on the surface of the ceramic. Therefore, it is possible to form a thin film wiring layer that is fine, has low resistance, has good impedance characteristics, and can reduce conductor loss of high-frequency signals.

[Brief description of the drawings]

FIG. 1 is a partially enlarged cross-sectional view illustrating a structure of a multilayer wiring layer of a package for housing a semiconductor element, which is an example of application of the multilayer wiring board of the present invention.

FIG. 2 is a schematic cross-sectional view showing one embodiment of a mounting structure of the package of FIG. 1 on an external circuit board.

[Explanation of symbols]

 A. Package B. External circuit board X Wiring board Y Multilayer wiring layer 1a, 1b, 1c Thin metal layer 2 Insulating film 3 Insulating substrate 4 Semiconductor element 5 Electrode terminal 6 Connection terminal 7 Metallization pad 8 Via hole conductor

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat ゛ (Reference) H05K 3/46 C04B 35/18 Z H01L 23/12 CF term (Reference) 4G030 AA07 AA08 AA09 AA16 AA36 AA37 AA51 BA09 BA12 CA01 CA03 CA08 GA27 5E346 AA02 AA04 AA12 AA14 AA15 AA29 CC10 CC17 CC18 CC21 CC32 CC35 CC36 CC39 DD03 DD16 DD17 EE15 EE19 EE23 EE27 EE29 FF01 FF22 FF45 FF50 HH02 HH06 HH26

Claims (8)

[Claims] 1. A glass phase containing SiO ₂ , Al ₂ O ₃ , MgO, SrO and CaO and a diopside oxide crystal phase, and at least Al ₂ O ₃ , MgSiO ₃ , Al
At least one selected from the group consisting of Cu, Ag and Au is formed on the surface of an insulating substrate made of ceramics containing at least one crystal phase selected from the group consisting of N and MgTiO ₃ and having an open porosity of 0.3% or less. A wiring substrate comprising a thin film wiring layer containing seeds. 2. The wiring board according to claim 1, wherein the surface roughness (Ra) of the surface of the insulating substrate on which the thin film wiring layer is formed is 0.1 μm or less on a burnt surface. 3. The insulated substrate at a frequency of 60 to 77 GHz.
Dielectric loss is 50 × 10 ^-FourA contract characterized by the following:
3. The wiring board according to claim 1 or 2. 4. A transmission characteristic S ₂₁ in the following 110GHz of thin-film wiring layer formed on the insulating substrate surface -1.5d
4. The wiring board according to claim 1, wherein the wiring board has a thickness of B / cm or less. 5. The semiconductor device according to claim 1, wherein the insulating substrate is formed in a plurality of layers, and an internal wiring layer containing Cu or Ag as a main component is formed between the insulating substrates. Wiring board. 6. A glass capable of precipitating a diopside oxide crystal phase containing SiO ₂ , Al ₂ O ₃ , MgO, SrO and CaO in an amount of 40 to 95% by weight, and at least Al ₂ O ₃ and MgSiO as fillers. _A green sheet is formed by molding a mixture containing at least one selected from the group consisting of ₃ , AlN and MgTiO ₃ at a ratio of 5 to 60% by weight, and heating at 800 to 1000 ° C. for 0.2 to 5 hours. After baking to produce an insulating substrate made of ceramics having an open porosity of 0.3% or less, at least one selected from the group consisting of Cu, Ag and Au is formed on the surface of the insulating substrate by a thin film forming method. A method of manufacturing a wiring board, comprising forming a thin film wiring layer containing the same. 7. The method according to claim 1, wherein said glass is 30 to 55% by weight of SiO _2.
When, Al ₂ and O ₃ 4 to 15 wt%, and MgO14~30 wt%, and CaO5~20 wt%, method of manufacturing a wiring board according to claim 6, characterized in that it consists of a SrO10~25 wt% . 8. The method according to claim 8, wherein the surface of the green sheet is Cu or Ag.
8. The method for manufacturing a wiring board according to claim 6, wherein after forming and laminating a conductor wiring layer containing, the internal wiring layer is formed by firing.