JP2001211036A - Digital switching amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a digital switching amplifier that can easily prevent the occurrence of noises in the low frequency band caused by the offset voltage, in the digital switching amplifier which returns negatively the amplified quantum signals to the ΔΣ modulator, by means of providing the ΔΣ modulator generating the quantum, signals from the input differential signals and providing the power amplifier amplifying the electrical power of the quantum signals. SOLUTION: This digital switching amplifier is provided with an attenuation regulator 9 for attenuating signals to the feedback lines 7P, 7M returning negatively the amplified quantum signals to the ΔΣ modulator circuit 1. Variable attenuators 13M, 13P are provided in the attenuation regulator 9, and by regulating the attenuation ratio of the variable attenuators 13M, 13P, the difference between the attenuation ratio of the feedback line 7P returning negatively the positive signals of the differential signals and the attenuation ratio of the feedback line 7P returning negatively the negative signals is made variable. Thus, the offset voltage can be easily cancelled.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital switching amplifier using .DELTA..SIGMA. Modulation which is preferably implemented for an analog signal such as an acoustic signal and which can amplify the analog signal with high efficiency.

[0002]

2. Description of the Related Art Conventionally, a digital switching amplifier using a Δ 従 来 modulation signal has been known. The digital switching amplifier using the ΔΣ modulation signal has an advantage that an analog signal such as an acoustic signal can be amplified with high efficiency.

An example of the configuration of a digital switching amplifier using a conventional ΔΣ modulation signal will be described with reference to FIG.

As shown in FIG. 8, a digital switching amplifier 50 of a conventional example has an analog audio signal S having a positive polarity.
A differential signal composed of a pair of the analog audio signal 51P and the negative analog audio signal S51M is input from the input terminals 54P and 54M, and the analog audio signals S51P and S51M are amplified and output from the output terminals 58P and 58M. The analog audio signal S51M is a signal obtained by inverting only the polarity of the analog audio signal S51P.

As shown in FIG. 8, the digital switching amplifier 50 includes subtracters 55P and 55M, a ΔΣ modulation circuit 51, a constant voltage switching circuit 52, a low-pass filter network circuit (hereinafter, referred to as an LPF network circuit) 53, and a feedback line. 57P and 5
7M etc.

The subtracters 55P and 55M are connected to the input terminal 5
Analog audio signal S51 input to 4P and 54M
P and S51M and the feedback signals S54P and S54M fed back from the constant voltage switching circuit 52 via the feedback lines 57P and 57M are input signals. The subtractors 55P and 55M subtract the feedback signals S54P and S54M from the analog sound signals S51P and S51M, respectively.
The analog audio signals S51P and S51M after the feedback signals S54P and S54M have been subtracted are represented by ΔΣ
The signal is output to the modulation circuit 51.

The ΔΣ modulation circuit 51 generates 1-bit signals S52P and S52M by ΔΣ-modulating the analog audio signals S51P and S51M after the feedback signals S54P and S54M have been subtracted, respectively.

The ΔΣ modulation circuit 51 includes an integrator / adder group 6
1 and a quantizer 62. The integrator / adder group 61 is a high-order integrator. The integrator / adder group 61 integrates and adds the analog audio signals S51P and S51M after being subtracted by the subtractors 55P and 55M, and adds the obtained signals to a quantizer. 62. The quantizer 62 determines the polarity of the signal obtained by the integrator / adder group 61 and converts it into 1-bit signals S52P and S52M, which are binary quantized signals. Here, the quantization threshold of the quantizer 62 is set optimally for the assumed sampling frequency.
Further, the quantizer 62 operates in response to the clock signal.

The constant voltage switching circuit 52 outputs a constant voltage power supply 56H that outputs a constant voltage (DC) V of a positive polarity, and outputs a constant voltage (DC) -V of a negative polarity having the same magnitude as the constant voltage V. The constant voltage power supply 56L is connected. The constant voltage power supplies 56H and 56L may be provided inside the digital switching amplifier 50, but in this case, they are provided outside the digital switching amplifier 50 and are connected via a power line.

The constant voltage switching circuit 52 includes a constant voltage V supplied from constant voltage power supplies 56H and 56L and a constant voltage
V is switched by one-bit signals S52P and S5P.
The power amplification is performed on the 1-bit signals S52P and S52M based on 2M, that is, by using the 1-bit signals S52P and S52M as switching control signals. In addition, the constant voltage switching circuit 5
2 are power amplified 1-bit signals S53P and S53P obtained by power amplification of 1-bit signals S52P and S52M.
53M is output to the LPF network circuit 53 and the feedback lines 57P and 57M.

The feedback lines 57P and 57M
Converts the power amplified 1-bit signals S53P and S53M to Δ
Σ Negative feedback is made to the input terminal of the modulation circuit 1.

The LPF network circuit 53 interpolates the amplified 1-bit signals S53P and S53M by limiting the band to a low frequency band, thereby obtaining the amplified 1-bit signal S5.
3P and S53M are demodulated into analog sound signals S55P and S55M. Further, the LPF network circuit 53 includes the analog sound signals S55P and S5P.
5M is output from the output terminals 58P and 58M.

Next, the operation of the conventional digital switching amplifier will be described.

After the feedback signals S54P and S54M are respectively subtracted from the analog audio signals S51P and S51M input to the input terminals 54P and 54M, the obtained signals are converted into 1-bit signals S52P and S52M by the ΔΣ modulation circuit 51. Is done. Specifically, the integrator / adder group 61 uses the feedback signal S
The analog audio signals S51P and S51M after the subtraction of 54P and S54M, respectively, are integrated, added, noise-shaped, and quantized by the quantizer 62.
The polarity of the added difference integration signal is determined and converted to 1-bit signals S52P and S52M of "1" or "0".

The one-bit signals S52P and S52M are
Constant voltage switching circuit 5 as switching control signal
2 and is power-amplified into power-amplified 1-bit signals S53P and S53M having a voltage width between a constant voltage −V and a constant voltage V supplied from external constant voltage power supplies 56H and 56L.

The power amplified 1-bit signals S53P and S53M obtained by the constant voltage switching circuit 52 are
The analog audio signals S55P and S55M are input to the F network circuit 53 and are input to the LPF network circuit 53.
And output from output terminals 58P and 58M. Also, the power amplified 1-bit signals S53P and S53
M is negatively fed back to the input terminal of the ΔΣ modulation circuit 51 as feedback signals S54P and S54M.

However, in the conventional digital switching amplifier 50, the output signals (analog sound signals S55P and S55M) output from the output terminals 58P and 58M.
The offset voltage (the two analog sound signals S55P at the output terminals 58P and 58M)
S55M), resulting in noise in the low frequency band.

The main reasons for the occurrence of the offset voltage are the generation of the offset voltage in the ΔΣ modulation circuit 21 and the switching from the constant voltage power supply 56H / 56L to the constant voltage switching circuit 5.
2, the difference between the constant voltages V and -V supplied to the positive feedback signal (feedback signal S
54P) and a signal on the minus side (feedback signal S5
4M), a shift in voltage characteristics due to variations in wiring patterns, and the like.

Therefore, in the conventional digital switching amplifier 50, the output signals S55P and S55M (analog sound signals) are adjusted by adjusting the constant voltages V and -V of the constant voltage power supplies 56H and 56L supplied to the constant voltage switching circuit 52. S55P and S55M) are canceled.

An offset voltage adjusting method in the above-mentioned conventional digital switching amplifier will be described with reference to FIG.

In this method, the digital switching amplifier 50 is directly connected to the constant voltage power source 56 as shown in FIG.
Instead of being connected to the H.56L, the constant-voltage power supplies 56H.5 through the voltage regulators 59H.59L as shown in FIG.
Connect to 6L. When the digital switching amplifier 50 is manufactured or inspected after the manufacture, the voltage regulators 59H and 59L are adjusted while measuring the offset voltage, so that the constant voltages V and −V supplied to the constant voltage switching circuit 52 are adjusted. Adjustment is made to voltages V ′ and −V ′ such that the offset voltage is canceled.

[0022]

However, in the above conventional offset voltage adjusting method, the constant voltages V and -V (power supply voltage) supplied from the constant voltage power supply 56 to the constant voltage switching circuit 52 are applied to the voltage regulator 59H. Since adjustment is performed at 59L, there are the following problems.

First, due to the characteristics of an amplifier device, the switching constant voltages V and -V generally have a relatively high voltage value of several tens of volts in practice. In order to adjust this voltage, it is necessary to configure the voltage regulators 59H and 59L using components that can withstand a relatively high voltage of several tens of volts, that is, components with a high withstand voltage of several tens of volts or more. Such components having a high withstand voltage tend to be relatively large and expensive components. Therefore, there is a problem that the size of the amplifier is increased and the cost is increased.

The switching constant voltage V and-
In the method of adjusting V, a relatively high voltage value of several tens of volts needs to be changed, and fine adjustment is difficult. Therefore, the adjustment work for canceling the offset voltage has been a heavy burden in using the conventional digital switching amplifier 50.

When the conventional digital switching amplifier 50 is connected in parallel for two channels and used as a stereo amplifier for amplifying a stereo sound signal, a volume difference may occur between left and right channels. . The causes of the volume difference between the left and right channels include (1) the level difference between the channels of the amplified signal itself and (2) the feedback signal (S54P · S
54M), there is a signal gain difference resulting from the level difference between the channels. Factors causing the above causes (1) and (2) include variations in resistance components and capacitance components due to variations in wiring patterns on a substrate, and variations in characteristics of elements such as resistors, capacitors, and integrated circuits (ICs). And the like.

At present, there are not many digital switching amplifiers as products, but ordinary audio stereo amplifiers are provided with a circuit for adjusting the left / right balance when a signal is input from the outside, and the circuit is adjusted in advance with this circuit. are doing. Therefore, even when the conventional digital switching amplifier is used for amplifying a stereo sound signal, a circuit for adjusting the left / right balance when a signal is input from the outside is provided, and a method of adjusting the balance in advance with this circuit is employed. It is considered possible.

However, the above-described volume balance adjustment method requires the use of a circuit dedicated to left and right balance adjustment, and cannot simplify the configuration of the amplifier.

The present invention has been made in view of the above-mentioned conventional problems, and a first object of the present invention is to provide a digital switching amplifier which can easily prevent generation of noise in a low frequency band due to an offset voltage. It is in. Also,
A second object of the present invention is to provide a digital switching amplifier capable of adjusting the balance of output audio signals between channels with a simple configuration.

[0029]

In order to solve the above-mentioned problems, a digital switching amplifier according to the present invention amplifies a differential signal composed of a pair of a first signal and a second signal having opposite polarities. For this purpose, a ΔΣ modulator that generates a first quantized signal and a second quantized signal by ΔΣ modulating a first signal and a second signal, and converts a constant voltage supplied from a constant voltage power supply to a first By switching based on the first quantized signal and the second quantized signal, the first
A power amplifier for amplifying the quantized signal and the second quantized signal, a first feedback path for negatively feeding back the amplified first quantized signal to the ΔΣ modulator, In a digital switching amplifier having a second feedback path for performing negative feedback to the ΔΣ modulation section, an attenuating section for attenuating a signal is provided on at least one of the first feedback path and the second feedback path. And an adjusting means for adjusting the attenuation rate of the attenuation section so that the difference between the attenuation rate of the feedback path and the attenuation rate of the second feedback path changes.

According to the above configuration, even if an offset voltage is generated in the amplifier output, the offset voltage can be reduced at the time of manufacture or at the time of inspection after manufacture.
The offset voltage can be canceled (canceled) by adjusting the difference between the attenuation rate of the first feedback path and the attenuation rate of the second feedback path by the adjusting means while measuring the offset voltage. In addition, since some signal level attenuating means is generally provided in both the first feedback path and the second feedback path as essential, the voltage on the first feedback path and the second feedback path adjusted by the adjusting means is adjusted. Becomes lower than the output voltage of the constant voltage power supply. As a result, the voltage to be adjusted is a low-level voltage as compared with the conventional configuration in which the output voltage of the constant-voltage power supply is adjusted, and is easy to handle, so that the offset voltage can be easily canceled. Therefore, generation of noise in a low frequency band due to the offset voltage can be easily prevented. Therefore, according to the above configuration, it is possible to easily provide a digital switching amplifier in which low-frequency band noise caused by the offset voltage is prevented.

In a preferred embodiment of the digital switching amplifier according to the present invention, the adjusting means changes only one of the attenuation rate of the first feedback path and the attenuation rate of the second feedback path. .

According to the above configuration, the adjusting means changes only one of the attenuation rate of the first feedback path and the attenuation rate of the second feedback path. The number of adjustment points can be reduced as compared with a case where both the attenuation rate of the second feedback path and the attenuation rate of the second return path are changed.
Thus, the adjustment work for canceling the offset voltage can be simplified.

Further, according to the above configuration, only one of the first return path and the second return path needs to be provided with an attenuator having a variable attenuation factor (for example, a semi-fixed variable resistor), and the other is provided with the other. May be provided with a fixed attenuation portion (for example, a fixed resistor) having a fixed attenuation rate, or may not be provided with an attenuation portion. Therefore, the configuration of the digital switching amplifier can be simplified.

Further, in order to solve the above-mentioned problem, the digital switching amplifier of the present invention modulates the audio signal of the first channel by ΔΣ in order to amplify the audio signal of a plurality of channels. A first ΔΣ modulator for generating a quantized signal, a second ΔΣ modulator for generating a quantized signal for the second channel by ΔΣ modulating the acoustic signal of the second channel, and a constant voltage supplied from a constant voltage power supply. A first power amplifying unit that amplifies the first channel quantized signal by switching based on the one channel quantized signal; and a constant voltage supplied from the constant voltage power supply based on the second channel quantized signal. A second power amplifying unit for amplifying the second channel quantized signal by switching, and amplifying the first channel quantized signal to a first Δ A digital switching amplifier having a first channel feedback path for negatively feeding back to a modulation unit and a second channel feedback path for negatively feeding back the amplified second channel quantized signal to a second ΔΣ modulation unit. A first channel return path and / or a second channel return path; and an attenuator for changing a difference between an attenuation rate of the first channel return path and an attenuation rate of the second channel return path. And a balance adjusting means for adjusting the attenuation rate of the light emitting element.

According to the above configuration, the first channel and the second channel
Even if the balance (volume balance) of the output sound signal between the channels is out of order, a signal of a known level is input to each channel and the output signal of each channel is measured at the time of manufacture or inspection after manufacture. By adjusting the difference between the attenuation rate of the first channel return path and the attenuation rate of the second channel return path by the balance adjustment means, the balance (volume of the output sound signal) between the first channel and the second channel is adjusted. Balance) can be adjusted to a desired balance. In the case of outputting a stereo sound signal, even if a level difference (volume difference) of the output sound signal occurs between the right channel and the left channel, a signal of the same level is input to each channel and the output of each channel is performed. By adjusting the difference between the attenuation rate of the return path of the right channel and the attenuation rate of the return path of the left channel by the balance adjusting means while measuring the signal, the level (volume) of the output sound signal of the right channel and the left channel is adjusted. Can be equal. Then, a circuit (adjustment unit) for offset adjustment can be used as the balance adjustment unit. In particular, when a circuit for adjusting the offset is essential, this circuit can be used for balance adjustment without adding a circuit for adjusting the balance between channels separately. Therefore, according to the above configuration, a digital switching amplifier in which the balance of output audio signals between channels is adjusted can be realized with a simple configuration.

In the digital switching amplifier having the two configurations described above, the attenuator for attenuating the signal has two feedback paths (the first feedback path and the second feedback path, or the first feedback path).
Channel return path and the second channel return path), and adjusts the attenuation rate of the attenuation unit so that the difference between the attenuation rate of one return path and the attenuation rate of the other return path changes. (Adjustment means or balance adjustment means) is provided in the main part (items relating to a new configuration corresponding to the problem to be solved).

[0037]

[Embodiment 1] An embodiment of the present invention will be described with reference to FIGS.
It is as follows.

As shown in FIG. 1, the digital switching amplifier 10 according to the present embodiment includes a pair of a positive analog audio signal (first signal) S1P and a negative analog audio signal S1M (second signal). Is input from the input terminals 4P and 4M, and the analog audio signal S1
P and S1M are amplified and output from output terminals 8P and 8M. The analog sound signal S1M
Is a signal obtained by inverting only the polarity of the analog sound signal S1P.

As shown in FIG. 1, the digital switching amplifier 10 includes subtracters 5P and 5M, a ΔΣ modulation circuit (ΔΣ modulation section) 1, a constant voltage switching circuit (power amplification section) 2, an LPF network circuit 3, a feedback line. (First return path) 7P, feedback line (second return path) 7M, attenuation / adjustment unit (attenuation unit / adjustment means)
9 and so on.

The subtractors 5P and 5M are connected to the analog audio signals S1P and S1P input to the input terminals 4P and 4M, respectively.
1M and the feedback signals S4P and S4M fed back from the constant voltage switching circuit 2 via the attenuation / adjustment unit 9 by the feedback lines 7P and 7M are input signals. The subtractors 5P and 5M convert the analog acoustic signals S1P and S1M from the feedback signals S1P and S1M.
4P and S4M are subtracted, respectively, and the analog audio signals S1P and S1M after the feedback signals S4P and S4M have been subtracted are output to the Δ 回路 modulation circuit 1.

The ΔΣ modulation circuit 1 outputs a feedback signal S
Analog sound signal S after subtraction of 4P and S4M
1P and S1M are each modulated by ΔΣ to obtain 1
A bit signal S2P (first quantized signal) and a 1-bit signal S2M (second quantized signal) are generated.

The ΔΣ modulation circuit 1 includes an integrator / adder group 11
And a quantizer 12. The integrator / adder group 11 is a high-order integrator, and includes subtracters 5P and 5P.
Analog audio signals S1P and S1 after being subtracted by M
M is integrated and added, and the obtained signal is output to the quantizer 12. The quantizer 12 determines the polarity of the signal obtained by the integrator / adder group 11 and converts it into 1-bit signals S2P and S2M, which are binary quantized signals. here,
The quantization threshold of the quantizer 12 is set optimally for an assumed sampling frequency. Further, the quantizer 12 operates in response to the clock signal.

The constant voltage switching circuit 2 outputs a constant voltage power supply 6H for outputting a positive constant voltage (DC) V and a negative constant voltage (DC) -V having the same magnitude as the constant voltage V. A constant voltage power supply 6L is connected. Constant voltage power supply 6
H and 6L may be provided inside the digital switching amplifier 10, but in this case, they are provided outside the digital switching amplifier 10 and connected via a power line.

Constant voltage switching circuit 2 switches the constant voltages V and -V supplied from constant voltage power supplies 6H and 6L based on 1-bit signals S2P and S2M, that is, switches 1-bit signals S2P and S2M. By using the control signal as a control signal, the 1-bit signals S2P and S2M are power-amplified. The constant voltage switching circuit 2 outputs the power-amplified 1-bit signals S3P and S3M obtained by power-amplifying the 1-bit signals S2P and S2M to the LPF network circuit 3 and the feedback lines 7P and 7M. ing.

The feedback lines 7P and 7M are
The power amplification 1-bit signals S3P and S3M are negatively fed back to the input terminal of the ΔΣ modulation circuit 1. The attenuation / adjustment unit 9 is provided on the feedback lines 7P and 7M, and attenuates the power amplified 1-bit signals S3P and S3M. The attenuation / adjustment unit 9 includes variable attenuators 13P and 13M whose attenuation rates can be adjusted independently, and independently controls the attenuation rate of the feedback line 7P and the attenuation rate of the feedback line 7M. It can be adjusted. As a result, the attenuation / adjustment unit 9 outputs the feedback line 7P
Can be adjusted between the attenuation rate of the feedback line 7M and the attenuation rate of the feedback line 7M. The details of the attenuation / adjustment unit 9 will be described later.

The LPF network circuit 3 limits the band to a low frequency band to thereby provide amplified 1-bit signals S3P and S3P.
3M is interpolated, thereby demodulating the amplified 1-bit signals S3P and S3M into analog sound signals S5P and S5M. Further, the LPF network circuit 3
Analog audio signals S5P and S5M are output from output terminals 8P and 8M.

Next, the operation of the digital switching amplifier having the above configuration will be described.

After the feedback signals S4P and S4M are respectively subtracted from the analog audio signals S1P and S1M input to the input terminals 4P and 4M, the resulting signal is converted into a one-bit signal S2P by the ΔΣ modulation circuit 1.
And S2M. Specifically, in the integrator / adder group 11, the analog audio signals S1P and S1M after the feedback signals S4P and S4M are respectively subtracted are integrated, added, noise-shaped, and quantized. The polarity of the added difference integration signal is determined, and the 1-bit signal S2P of "1" or "0" is determined.
And S2M.

1-bit signals S2P and S2M are input to constant voltage switching circuit 2 as switching control signals, and have a voltage width between constant voltage -V and constant voltage V supplied from external constant voltage power supplies 6H and 6L. Are amplified to 1-bit power-amplified signals S3P and S3M having

The power-amplified 1-bit signals S3P and S3M obtained by the constant voltage switching circuit 2 are input to the LPF network circuit 3,
Are demodulated into analog audio signals S5P and S5M, and output from output terminals 8P and 8M.

The power-amplified 1-bit signals S3P and S3M are input to the attenuator / adjuster 9 composed of the variable attenuators 13P and 13M, attenuated, and then input to the ΔΣ modulation circuit 1 as feedback signals S4P and S4M. Negative feedback.

Next, the configuration and operation of the attenuation / adjustment section 9 will be described in detail with reference to FIG.

As shown in FIG. 2, the attenuation / adjustment section 9 includes variable attenuators 13P and 13M.
P and 13M are respectively composed of semi-fixed variable resistors 14P and 14M whose one end A is grounded. The other ends of the semi-fixed variable resistors 14P and 14M are connected to the constant voltage switching circuit 2. Further, each of the semi-fixed type variable resistors 14P and 14M has a point between both ends A and B as a contact C, and ΔΣ
It is connected to the modulation circuit 1. The resistance values of the semi-fixed variable resistors 14P and 14M can be adjusted by moving the position of the contact point C, that is, the attenuation rate can be adjusted.

The power-amplified 1-bit signals S3P and S3M obtained by the constant voltage switching circuit 2 are inputted to the terminals B of the semi-fixed type variable resistors 14P and 14M. Since the terminals A of the semi-fixed type variable resistors 14P and 14M are grounded, the contact C of the semi-fixed type variable resistors 14P and 14M is connected to the resistance ratio on both sides (between the terminal A and the contact C). Signal S4 having a voltage value according to the ratio of the resistance of the terminal B to the resistance between the end B and the contact C).
P and S4M occur. Therefore, by adjusting the position of the midpoint C of the semi-fixed variable resistors 14P and 14M, that is, by adjusting the semi-fixed variable resistors 14P and 1M
By adjusting the resistance ratio on both sides of the midpoint C of 4M,
The voltage levels of the feedback signals S4P and S4M can be adjusted steplessly. Note that the semi-fixed type variable resistors 14P and 14M may be such that the resistance value can be adjusted stepwise in multiple steps.

Next, the digital switching amplifier 10
The method of adjusting the offset voltage in the above will be described.

In the digital switching amplifier 10 according to the present invention, when no offset voltage is generated, the digital switching amplifier 10
The power amplification 1-bit signals S3P and S3M
Are attenuated at a constant attenuation rate, and are fed back to the input terminal of the ΔΣ modulation circuit 1 as feedback signals S4P and S4M.

However, in practice, the generation of an offset voltage in the ΔΣ modulation circuit 21 and the constant voltage power supply 56H
An offset voltage is generated in the amplifier output (analog sound signals S5P and S5M) due to a difference between the constant voltage V supplied from 56L to the constant voltage switching circuit 52 and the constant voltage V and −V. On the other hand, the offset voltage is also caused by a level difference between the differential feedback signal S4P and the feedback signal S4M due to a difference between the attenuation rate of the feedback line 7P and the attenuation rate of the feedback line 7M.

Therefore, in the digital switching amplifier 10, when an offset voltage is generated, the voltage level of the feedback signal S4P and the feedback signal S4
By intentionally shifting the voltage level of M, the offset voltage can be canceled.

Specifically, at the time of manufacture or at the time of inspection after manufacture, the offset voltage (output of the analog audio signal S5) at the amplifier output in a no-signal state (a state where the levels of the analog audio signals S1P and S1M are 0).
P and the analog sound signal S5M) is measured by a voltmeter, and when an offset voltage is detected,
The adjustment of the attenuation / adjustment unit 9 in the direction in which the offset voltage is canceled, that is, the adjustment of the position of the contact C of the semi-fixed type variable resistors 14P and 14M may be performed. Thereby, the difference between the attenuation rate of the feedback line 7P and the attenuation rate of the feedback line 7M is shifted from 0 to the direction in which the offset voltage is canceled, and the difference between the feedback signals S4P and S4M is shifted from 0 to the direction in which the offset voltage is canceled. It is shifted to. As a result, the offset voltage of the amplifier output can be canceled.

In this offset voltage adjusting method, since some signal level attenuating means is generally provided in both of the feedback lines 7P and 7M, the first feedback path and the second feedback path adjusted by the adjusting means are generally provided. The voltage on the feedback path becomes lower than the output voltage of the constant voltage power supply. As a result, the voltage to be adjusted is a low-level voltage as compared with the conventional configuration in which the output voltage of the constant-voltage power supply is adjusted, and is easy to handle, so that the offset voltage can be easily canceled. Therefore, generation of noise in a low frequency band due to the offset voltage can be easily prevented.

The offset voltage in question here is caused by variations in the characteristics of each element and factors specific to each circuit. Therefore, once the offset voltage is adjusted, basically, it does not largely change. Therefore, the offset voltage may be manually adjusted only once at the time of manufacture or inspection after manufacture, and need not be adjusted at the time of use.

As described above, in the digital switching amplifier 10 of the present embodiment, even if an offset voltage occurs in the amplifier output (analog sound signals S5P and S5M), the voltage levels of the feedback signals S4P and S4M are offset by the variable attenuator. By adjusting the direction in which the voltage is canceled, the offset voltage can be easily canceled.

The present inventors examined changes in frequency characteristics depending on the presence or absence of an offset voltage in order to confirm the effect of canceling the offset voltage. The frequency characteristics of the amplifier output signals (analog sound signals S5P and S5M) when an offset voltage is generated in the digital switching amplifier 10 are analyzed by an FFT analyzer (Fast Fourier Transform (FF)).
T; frequency analyzer using Fast Fourier Transform) is shown in the graph of FIG. FIG. 4 is a graph showing the result of analyzing the frequency characteristics of the amplifier output signals (analog audio signals S5P and S5M) after the adjustment performed to cancel the offset voltage in the digital switching amplifier 10 by the above-described method using the FFT analyzer. Shown in

From the results shown in FIGS. 3 and 4, when an offset voltage is generated, as shown in FIG.
While noise is generated in a low frequency band equal to or lower than z, it can be seen that such noise is removed by performing the adjustment for canceling the offset voltage by the method described above. Note that 200 depending on the offset voltage.
The noise is generated in the low frequency band below Hz.
This is because the offset voltage is a DC voltage (usually several volts) and appears as noise near 0 Hz on the FFT analyzer.

In the digital switching amplifier 10 shown in FIG. 1, both the attenuation rate of the feedback line 7P and the attenuation rate of the feedback line 7M are adjustable. A configuration in which only one of the feedback line and the 7M attenuation factor is adjustable and the other is fixed is more preferable. That is, the feedback signal S4P of the two feedback lines 7P and 7M shown in FIG.
Configuration in which only one voltage level of the feedback signals S4P and S4M of the two feedback lines 7P and 7M is adjustable and the other voltage level is fixed, as compared with the configuration in which both of the feedback signals S4P and S4M are adjustable. Is preferred.

In order to make it possible to adjust only one of the attenuation factor of the feedback line 7P and the attenuation factor of 7M of the feedback line, as shown in FIG. 1, a variable attenuator is connected to both of the two feedback lines 7P and 7M. Instead of providing 13P and 13M, feedback line 7
Variable attenuator (13P or 1P) in only one of P and 7M
3M) may be provided. As a result, the number of offset voltage adjustments can be reduced from two to one, and the work of offset voltage adjustment can be simplified. Further, even when digital switching amplifiers are connected in parallel for a plurality of channels, the number of offset voltage adjustments can be reduced from two per channel to one per channel, thereby simplifying the work of offset voltage adjustment. Can be.

When a variable attenuator (13P or 13M) is provided in only one of the feedback lines 7P and 7M, the other feedback line (7P and 7M)
Although it is not necessary to provide an attenuator, it is preferable to provide a fixed attenuator for attenuating a signal at a constant attenuation rate. Further, it is preferable that the fixed attenuator is configured to attenuate the power-amplified 1-bit signal (S3P or S3M) by resistance division to generate a feedback signal (S4P or S4M).

FIG. 6 shows a preferred embodiment of a digital switching amplifier according to the present invention having a variable attenuator only on one feedback line.

As shown in FIG. 6, the digital switching amplifier 20 is provided with a feedback line 7M on one side of the digital switching amplifier 10 shown in FIG.
The fixed attenuator 15 is used instead of the variable attenuator 13M, and the variable attenuator 13P and the fixed attenuator 15 use the attenuation / adjustment unit 19.
The other configuration is not shown, but is exactly the same as the digital switching amplifier 10 shown in FIG.

The fixed attenuator 15 attenuates the power amplified 1-bit signal S3M by resistance division of the fixed resistors 15a and 15b to generate a feedback signal S4M. The fixed attenuator 15 includes two fixed resistors 15a and 15b connected in series, and is provided on the feedback line 7M. The fixed resistor 15a has one end connected to the output terminal of the constant voltage switching circuit 2 and the other end connected to the fixed resistor 15b. The fixed resistor 15b has a grounded end opposite to one end connected to the fixed resistor 15a. Further, a connection portion of the fixed resistor 15a and the fixed resistor 15b is connected to the input terminal of the subtractor 5M via the feedback line 7M.

According to the above configuration, the feedback signal S
Since the 4M level is fixed to a predetermined value, the offset voltage can be adjusted only by adjusting the level of the feedback signal S4P with the semi-fixed variable resistor 13P on the feedback line 7P. Therefore, the operation of adjusting the offset voltage can be simplified.

[Second Embodiment] The following will describe another embodiment of the present invention with reference to FIG. For the sake of convenience, the same members as those described in the first embodiment will be denoted by the same reference numerals, and description thereof will be omitted.

As shown in FIG. 6, the digital switching amplifier 30 of the present embodiment comprises L channel analog audio signals (first channel audio signals) S1L and R
A stereo sound signal composed of a pair of a channel analog sound signal S1R (second channel sound signal) is input from the input terminals 4L and 4R, and the analog sound signal S1L
And S1R are amplified and output from output terminals 8L and 8R.

As shown in FIG. 6, the digital switching amplifier 30 includes subtracters 5L and 5R, a ΔΣ modulation circuit (first ΔΣ modulation section) 1L, a ΔΣ modulation circuit (second ΔΣ modulation section) 1R, and a constant voltage switching circuit (first 1 power amplifier)
2L, constant voltage switching circuit (second power amplifier) 2
R, LPF network circuits 3L and 3R, feedback line (first channel feedback path) 7L, feedback line (second channel feedback path) 7R, attenuation / adjustment unit (attenuation unit / balance adjustment means) 29, and the like.

The subtracters 5L and 5R are connected to the analog audio signals S1L and S1L input to the input terminals 4L and 4R, respectively.
1R and the feedback signals S4L and S4R fed back from the constant voltage switching circuits 2L and 2R through the attenuation / adjustment unit 29 by the feedback lines 7L and 7R, respectively. Subtractors 5L and 5
R subtracts the feedback signals S4L and S4R from the analog acoustic signals S1L and S1R, respectively,
The analog audio signals S1L and S1R after the feedback signals S4L and S4R have been subtracted are output to the ΔΣ modulation circuits 1L and 1R.

The ΔΣ modulation circuits 1L and 1R respectively perform ΔΣ modulation on the analog audio signals S1L and S1R from which the feedback signals S4L and S4R have been subtracted to thereby perform L-channel 1-bit signal S2L (first channel quantization signal ) And an R-channel 1-bit signal S2R (a second-channel quantized signal).

The ΔΣ modulation circuit 1L includes an integrator / adder group 1
1L and a quantizer 12L. The ΔΣ modulation circuit 1R includes an integrator / adder group 11R and a quantizer 1R.
2R. The integrator / adder groups 11L and 11R are high-order integrators, and analog audio signals S1L and S1L after being subtracted by the subtracters 5L and 5R.
1R are integrated and added, and the obtained signal is quantized by the quantizer 12.
Output to L and 12R. Quantizers 12L and 12
R determines the polarity of the signals obtained by the integrator / adder groups 11L and 11R, and converts them into 1-bit signals S2L and S2R, which are binary quantized signals. Here, the quantization thresholds of the quantizers 12L and 12R are optimally set for the assumed sampling frequency. Also,
Quantizers 12L and 12R operate in response to a clock signal.

Each of the constant voltage switching circuits 2L and 2R has a constant voltage power supply 6H for outputting a positive constant voltage (DC) V, and a negative constant voltage (DC) −V having the same magnitude as the constant voltage V. And a constant voltage power supply 6L that outputs The constant voltage power supplies 6H and 6L may be provided inside the digital switching amplifier 30, but in this case, they are provided outside the digital switching amplifier 30 and are connected via a power line.

The constant voltage switching circuit 2L switches the constant voltages V and -V supplied from the constant voltage power supplies 6H and 6L based on the 1-bit signal S2L, that is, uses the 1-bit signal S2L as a switching control signal. By doing so, the 1-bit signal S2L is power-amplified. In addition, the constant voltage switching circuit 2L
Converts the power amplified 1-bit signal S3L obtained by power amplification of the 1-bit signal S2L into an LPF network circuit 3.
L and a feedback line 7L.

The constant voltage switching circuit 2R switches the constant voltages V and -V supplied from the constant voltage power supplies 6H and 6L based on the 1-bit signal S2R, that is, uses the 1-bit signal S2R as a switching control signal. In this way, the 1-bit signal S2R is power-amplified. Further, the constant voltage switching circuit 2R
Converts the power amplified 1-bit signal S3R obtained by power amplification of the 1-bit signal S2R into an LPF network circuit 3.
R and a feedback line 7R.

The feedback lines 7L and 7R are
The power amplification 1-bit signals S3L and S3R are negatively fed back to the input terminals of the ΔΣ modulation circuits 1L and 1R.
The attenuation / adjustment unit 29 is provided on the feedback lines 7L and 7R, and attenuates the power amplified 1-bit signals S3L and S3R. The attenuation / adjustment unit 29 includes variable attenuators 13L and 13R whose attenuation rates can be independently adjusted. The attenuation rate of the feedback line 7L and the attenuation rate of the feedback line 7R are independently controlled. It can be adjusted. Accordingly, the attenuation / adjustment unit 29 determines the attenuation rate of the feedback line 7L and the feedback line 7L.
The difference between the R and the decay rate can be adjusted. The configuration of the attenuation / adjustment unit 29 is the same as that of the attenuation / adjustment unit 9.

LPF network circuits 3L and 3R
Is to interpolate the amplified 1-bit signals S3L and S3R by limiting the band to a low frequency band, thereby demodulating the amplified 1-bit signals S3L and S3R into analog audio signals S5L and S5R. The LPF network circuit 3 outputs the analog audio signals S5L and S5R from the output terminals 8L and 8R.

Next, the operation of the digital switching amplifier having the above configuration will be described.

After the feedback signals S4L and S4R are respectively subtracted from the analog audio signals S1L and S1R input to the input terminals 4L and 4R, the resulting signals are converted into 1-bit signals S2L and S2R by the ΔΣ modulation circuits 1L and 1R. Is converted to In particular,
The analog audio signals S1L and S1R after the feedback signals S4L and S4R are subtracted by the integrator / adder groups 11L and 11R, respectively, are integrated, added, noise-shaped, and quantized by the quantizers 12L and 12R. The polarity of the added difference integration signal is determined, and the 1-bit signals S2L and S2 of "1" or "0" are determined.
Converted to R.

One-bit signals S2L and S2R are input to constant voltage switching circuits 2L and 2R as switching control signals, and are supplied to external constant voltage power supplies 6H and 6L.
The power is amplified to power amplified 1-bit signals S3L and S3R having a voltage width between the given constant voltage −V and constant voltage V.

Power amplified 1-bit signals S3L and S3R obtained by constant voltage switching circuits 2L and 2R
Is input to the LPF network circuits 3L and 3R, is demodulated by the LPF network circuits 3L and 3R into analog sound signals S5L and S5R, and the output terminal 8L
And 8R.

The power-amplified 1-bit signals S3L and S3R are input to the attenuator / adjuster 29 comprising the variable attenuators 13L and 13R, attenuated, and then fed back to the ΔΣ modulation circuits 1L and 1R as feedback signals S4L and S4R. Negative feedback is provided to the input terminal.

Next, the digital switching amplifier 30
The method of adjusting the volume difference between the left and right channels in the above will be described.

The volume difference between the left and right channels, that is, the voltage level difference between the analog audio signal S5L and the analog audio signal S5R is caused by the level difference between the amplified signals themselves, while the left channel feedback signal S4L is It is also caused by a voltage level difference from the feedback signal S4R of the right channel.

Therefore, in the digital switching amplifier 30, the feedback signal S4L of the left channel
By intentionally shifting the voltage level difference between the right and left channel feedback signals S4R, the volume difference between the left and right channels can be canceled.

More specifically, first, a test signal of the same level is input to the left and right channels at the time of manufacture or inspection after manufacture. That is, the left channel analog audio signal S1L and the right channel analog audio signal S1R are kept at the same level. In this state, the levels of the left channel output audio signal (analog audio signal S5L) and the right channel output audio signal (analog audio signal S5R) are measured by a voltmeter. When a level difference is detected between the two, adjustment of the attenuation / adjustment unit 29 in a direction in which the level difference is canceled, that is, the variable attenuator 1
The adjustment of the attenuation rate in the 3L and the variable attenuator 13R may be performed. Thereby, the difference between the attenuation rate of the feedback line 7L and the attenuation rate of the feedback line 7R becomes zero.
, And the feedback signals S4L and S4
The difference of R is shifted from 0 in a direction in which the output level difference between the left and right channels is canceled. As a result, the output level difference between the left and right channels can be canceled, and the level of the left channel output audio signal (analog audio signal S5L) can be made equal to the level of the right channel output audio signal (analog audio signal S5R).

In the configuration of this embodiment, the attenuation / adjustment unit 29
As the attenuation for the offset adjustment of the first embodiment,
Since the adjustment unit 9 can be used, the balance can be adjusted with a simple configuration as compared with the case where a circuit dedicated to balance adjustment between channels is provided.

As described above, it is considered that the deviation of the sound volume balance between the channels is mainly caused by the variation of the element itself or the wiring pattern. Is unlikely to change to Therefore, the adjustment of the volume balance between channels need only be performed once by the above-described method at the stage of production or inspection, and need not be performed many times. Therefore, the attenuation / adjustment section 29 does not need to be adjustable at the time of use.

In the digital switching amplifier 30 of the present embodiment, both the attenuation rate of the feedback line 7L and the attenuation rate of the feedback line 7R are adjustable. Similarly, a configuration in which only one of the attenuation rate of the feedback line 7L and the attenuation rate of the feedback line 7R is adjustable and the other is fixed is more preferable. Therefore, for example, it is preferable to use the fixed attenuator 15 instead of the variable attenuator 13L for the feedback line 7L on one side. Thus, the offset voltage can be adjusted only by adjusting the attenuation rate of the feedback line 7R. Therefore, the operation of adjusting the offset voltage can be simplified.

[Embodiment 3] The following will describe still another embodiment of the present invention with reference to FIG. In addition, for convenience of explanation, the same members as those described in Embodiments 1 and 2 are denoted by the same reference numerals, and description thereof is omitted.

The digital switching amplifier according to the present embodiment is capable of performing both voltage cancellation and volume balance adjustment by combining the configuration of the first embodiment with the configuration of the second embodiment.

As shown in FIG. 7, the digital switching amplifier 40 according to the present embodiment is configured such that the digital switching amplifier 30 according to the second embodiment is changed to a configuration for amplifying a differential signal similar to that of the digital switching amplifier 20 and the attenuation is achieved. The adjustment unit 29 is changed to an attenuation / adjustment unit 39.

That is, in the digital switching amplifier 40, as the L channel acoustic signal S1L in the digital switching amplifier 30, the analog audio signal (first signal) S1LP of positive polarity and the analog audio signal S1LM (second signal) of negative polarity are used. ) Are input from the input terminals 4LP and 4LM. The digital switching amplifier 40
The analog audio signals S1LP and S1LM are amplified, and the obtained analog audio signals S5LP and S5LM are output from output terminals 8LP and 8LM. In the digital switching amplifier 40, a pair of a positive analog audio signal (first signal) S1RP and a negative analog audio signal S1RM (second signal) is used as the R channel audio signal S1R in the digital switching amplifier 30. Is input from the input terminals 4RP and 4RM. The digital switching amplifier 40 amplifies the analog sound signals S1RP and S1RM, and outputs the obtained analog sound signals S5RP and S5RM to an output terminal 8RP.
And 8RM. The analog audio signals S1LM and RM are signals obtained by inverting only the polarities of the analog audio signals S1LP and RP.

In the digital switching amplifier 40,
As the subtractor 5L, subtractors 5LP and 5LM for subtracting the feedback signals S4LP and S4LM from the analog audio signals S1LP and S1LM input to the input terminals 4LP and 4LM are provided. Further, subtractors 5RP and 5RM for subtracting feedback signals S4RP and S4RM from analog audio signals S1RP and S1RM input to input terminals 4RP and 4RM are provided as subtractors 5L.

The ΔΣ modulation circuit 1L outputs the analog sound signal S
1LP and S1LM are ΔΣ modulated to generate a 1-bit signal (first quantized signal) S2LP and a 1-bit signal (second quantized signal) S2LM, and the ΔΣ modulation circuit 1R Sound signal S1R
A 1-bit signal (first quantized signal) S2RP and a 1-bit signal (second quantized signal) S2RM are generated by ΔΣ-modulating P and S1RM.

Constant voltage switching circuit 2L switches constant voltages V and -V supplied from constant voltage power supplies 6H and 6L based on 1-bit signals S2LP and S2LM to generate 1-bit signals S2LP and S2.
LM is amplified, and the obtained power amplified 1-bit signal S3LP is obtained.
And S3LM. The constant voltage switching circuit 2R includes constant voltage power supplies 6H and 6H.
The constant voltages V and -V supplied from the L
Amplifying the 1-bit signals S2RP and S2RM by switching based on 2RP and S2RM,
Obtained power amplified 1-bit signals S3RP and S3RM
Is output.

Further, the digital switching amplifier 3
A feedback line (first feedback path) 7LP for negatively feeding back the power-amplified 1-bit signal S3LP as the feedback signal S4LP to the ΔΣ modulation circuit 1L as a feedback line 7L at 0, and a power-amplified 1-bit signal S
A feedback line (second feedback path) 7LM for negatively feeding back the 3LM as the feedback signal S4LM to the ΔΣ modulation circuit 1L is provided. Also, the feedback line 7R in the digital switching amplifier 30
The feedback line (first feedback path) 7RP for negatively feeding back the power-amplified 1-bit signal S3RP as the feedback signal S4RP to the ΔΣ modulation circuit 1R, and the power-amplified 1-bit signal S3RM as the feedback signal S4RM
And a feedback line (second feedback path) 7RM for performing negative feedback to the ΔΣ modulation circuit 1R.

The attenuator / adjuster 39 is provided on the feedback line 7LP, and controls the power amplified 1-bit signal S3LP.
Attenuator 15 that attenuates the power amplification 1-bit signal S3LM at a variable attenuation rate, provided on feedback line 7LM.
3LM, provided on the feedback line 7RP,
A variable attenuator 13RP for attenuating the power amplified 1-bit signal S3RP at a variable attenuation rate, and a feedback line 7R
M, and a variable attenuator 13RM for attenuating the power-amplified 1-bit signal S3RM at a variable attenuation rate. In the attenuation / adjustment section 39, the fixed attenuator 15
Is the same as the fixed attenuator 15 shown in FIG. 5, and the configuration of the variable attenuators 13LM, 13RP, and 13RM is the same as the variable attenuators 13M and 13P shown in FIG.

Further, the attenuation / adjustment section 39 includes an attenuation rate of the L channel feedback lines 7LP and 7LM and an R channel feedback lines 7RP and 7RP.
A function as balance adjustment means for adjusting the difference between the RM attenuation rate and a function as first adjustment means for adjusting the difference between the attenuation rate of the feedback line 7LP and the attenuation rate of the feedback line 7LM. , Feedback line 7RP attenuation factor and feedback line 7RM
And a function as a second adjusting means for adjusting the difference with the decay rate.

As described above, in the configuration of the present embodiment, the attenuation / adjustment section 39 for offset adjustment also has a function as adjustment means for adjusting the balance between channels, so that the balance adjustment between channels is performed. It can be applied to balance adjustment without adding a separate circuit for.
Therefore, the balance can be adjusted with a simple configuration as compared with the case where a circuit for adjusting the balance between channels is provided separately from the circuit for adjusting the offset.

Next, in the digital switching amplifier 40 of the present embodiment, at the time of manufacture or inspection after manufacture, the attenuation rate of the attenuation / adjustment unit 39 for performing both the cancellation of the offset voltage and the adjustment of the volume balance. The adjustment method will be described.

First, a non-signal state (analog sound signal S1)
In the state where the levels of LP, S1LM, S1RP, and S1RM are 0), the offset voltage (level difference between the analog audio signal S5LP and the analog audio signal S5LM) at the amplifier output of the left channel is measured by a voltmeter. When the offset voltage is detected, the difference between the attenuation rate of the feedback line 7LP and the attenuation rate of the feedback line 7LM is adjusted by the attenuation / adjustment unit 39 so that the offset voltage is canceled while the measurement of the offset voltage is continued. . Here, since the fixed attenuator 15 is provided in the feedback line 7LP,
The attenuation rate of the feedback line 7LP is fixed. Therefore, the attenuation rate of the feedback line 7LM is adjusted by adjusting the attenuation rate of the variable attenuator 13LM provided in the feedback line 7LM.

Next, the offset voltage (the level difference between the analog audio signal S5RP and the analog audio signal S5RM) at the amplifier output of the right channel is measured by a voltmeter while the signal is not present. Then, when the offset voltage is detected, the difference between the attenuation rate of the feedback line 7RP and the attenuation rate of the feedback line 7RM is adjusted by the attenuation / adjustment unit 39 so that the offset voltage is canceled while continuing to measure the offset voltage. . For example, the attenuation rate of the variable attenuator 13RP provided in the feedback line 7RP is fixed,
The attenuation rate of the feedback line 7RM is adjusted by adjusting the attenuation rate of the variable attenuator 13RM provided in the RM.

Further, in a state where the test signals of the same level are input to the left and right channels (the state where the left channel analog audio signals S1LP and S1LM and the right channel analog audio signals S1RP and S1RM are at the same level), Output audio signals (analog audio signals S5LP and S5LM) and the right channel output audio signals (analog audio signals S5RP and S5RM)
Is measured by a voltmeter. When a level difference is detected between the two, the attenuation / adjustment unit 39 is adjusted in a direction in which the offset voltage is canceled.

The adjustment at this time is performed while keeping the offset voltage of each channel canceled. That is, the level difference between the feedback signal S4LP and the feedback signal S4LM, and the feedback signal S4
This is performed while keeping the level difference between the RP and the feedback signal S4RM constant. Specifically, the feedback line 7 is maintained by keeping the attenuation rate of the variable attenuator 13LM constant.
With the attenuation rates of LP and 7LM kept constant, feedback signal S4RP and feedback signal S4
RM are changed by the same level, and analog audio signals S5LP and S5LM and analog audio signal S5LP
The attenuation rates of the variable attenuators 13RP and 13RM are adjusted so that the levels of 5RP and S5RM become equal.
This makes it possible to cancel the volume difference between channels.

As described above, according to the configuration of the present embodiment, the first control for adjusting the difference between the attenuation rate of feedback line 7LP and the attenuation rate of feedback line 7LM is performed.
Function as adjustment means for the feedback line 7R
By providing the attenuation / adjustment unit 39 having a function as a second adjustment unit for adjusting the difference between the attenuation rate of P and the attenuation rate of the feedback line 7RM, the offset voltage of the L channel and the R channel can be reduced. Can be easily canceled. Further, an attenuation / adjustment unit 39 having a function as balance adjustment means for adjusting the difference between the attenuation rates of the L-channel feedback lines 7LP and 7LM and the R-channel feedback lines 7RP and 7RM is provided. Accordingly, it is possible to easily cancel a volume difference between channels in a state where the offset voltage is cancelled. Therefore, both the cancellation of the offset voltage and the adjustment of the volume balance can be easily performed.

In the above description, the adjustment for canceling the offset voltage is performed, and then the balance adjustment between the channels is performed. However, the adjustment order may be reversed. In the above example, one feedback line 7
Although the attenuation rate of LP is fixed, the attenuation rate of all feedback lines 7LP, 7LM, 7RP, and 7PM may be adjusted. However, it is preferable to fix the attenuation rate of one feedback signal 7LP as in the above example, since the adjustment work is simplified.

In each of the above embodiments, the differential signal input from outside the digital switching amplifier is amplified. However, the differential signal is amplified from one signal input from outside the digital switching amplifier. A configuration for generating and amplifying the differential signal is also possible.

Further, the configuration of each of the above embodiments includes the LPF network circuit for demodulating the amplified 1-bit signal into an analog audio signal.
A circuit other than the LPF network circuit may be provided as a demodulation unit for demodulating a bit signal into an analog signal. Further, the demodulation unit for demodulating the amplified 1-bit signal into an analog audio signal may be omitted, and the amplified 1-bit signal may be digitally output as it is.

[0115]

As described above, in the digital switching amplifier of the present invention, the attenuator for attenuating the signal is provided on at least one of the first feedback path and the second feedback path, and the first feedback path is provided. An adjustment means for adjusting the attenuation rate of the attenuation section is provided so that the difference between the attenuation rate of the road and the attenuation rate of the second return path changes.

Thus, even if an offset voltage is generated in the amplifier output, the adjustment means measures the offset voltage and the attenuation of the first feedback path and the attenuation of the second feedback path while measuring the offset voltage at the time of manufacture or inspection after manufacture. By adjusting the difference from the ratio, the offset voltage can be easily canceled. Therefore, the above configuration has an effect that it is possible to provide a digital switching amplifier that can easily prevent generation of noise in a low frequency band due to the offset voltage.

In a preferred form of the digital switching amplifier according to the present invention, the adjusting means changes only one of the attenuation rate of the first feedback path and the attenuation rate of the second feedback path. .

Thus, the number of adjustment points can be reduced. Therefore, the above configuration has an effect that the adjustment work for canceling the offset voltage can be simplified and the configuration of the amplifier can be simplified.

Further, in the digital switching amplifier of the present invention, as described above, the attenuating section for attenuating the signal has the first configuration.
The attenuation section is provided on at least one of the channel return path and the second channel return path, and the attenuation rate of the attenuation section is changed so that the difference between the attenuation rate of the first channel return path and the attenuation rate of the second channel return path changes. This is a configuration in which balance adjustment means for adjustment is provided.

Thus, the balance (volume balance) of the output sound signal between the first channel and the second channel is obtained.
Even if the deviation occurs, the signal of a known level is input to each channel and the output signal of each channel is measured, and the balance adjustment means determines the attenuation rate of the first channel return path and the attenuation rate of the second channel return path. By adjusting the difference between the two, it is possible to adjust the balance of the output audio signal between the first channel and the second channel to a desired balance with a simple configuration. Further, a circuit (adjustment unit) for offset adjustment can be used as the balance adjustment unit. Therefore, the above configuration has an effect that it is possible to provide a digital switching amplifier capable of adjusting the balance of the output audio signal between channels with a simple configuration.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a digital switching amplifier according to one embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of an attenuation / adjustment unit of the digital switching amplifier shown in FIG.

3 is a graph showing frequency characteristics of an amplifier output signal when an offset voltage occurs in the digital switching amplifier shown in FIG.

FIG. 4 is a graph showing frequency characteristics of an amplifier output signal after performing adjustment for canceling an offset voltage in the digital switching amplifier shown in FIG. 1;

FIG. 5 is a block diagram showing a modification of the digital switching amplifier shown in FIG.

FIG. 6 is a block diagram showing a configuration of a digital switching amplifier according to still another embodiment of the present invention.

FIG. 7 is a block diagram showing a configuration of a digital switching amplifier according to still another embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of a conventional digital switching amplifier.

9 is a block diagram showing a state in which a voltage regulator for canceling an offset voltage is provided outside the digital switching amplifier shown in FIG. 8;

[Explanation of symbols]

Reference Signs List 1 ΔΣ modulation circuit (ΔΣ modulation section) 1L ΔΣ modulation circuit (first ΔΣ modulation section) 1R ΔΣ modulation circuit (second ΔΣ modulation section) 2 Constant voltage switching circuit (power amplification section) 2L Constant voltage switching circuit (first power amplification section) 2R constant voltage switching circuit (second power amplifier) 6H constant voltage power supply 6L constant voltage power supply 7P feedback line (first feedback path) 7M feedback line (second feedback path) 7L feedback line (first channel feedback path) 7R Feedback line (second channel return path) 7LP feedback line (first channel return path, first return path) 7LM feedback line (first channel return path, second return path) 7RP feedback line (second channel return path, second return path) 1 feedback path 7RM feedback line (second channel feedback) Path, second return path) 9 Attenuation / adjustment unit (attenuation unit, adjustment unit) 10 Digital switching amplifier 19 Attenuation / adjustment unit (attenuation unit, adjustment unit) 20 Digital switching amplifier 29 Attenuation / adjustment unit (attenuation unit, balance adjustment) Means) 30 Digital switching amplifier 39 Attenuation / adjustment unit (attenuation unit, adjustment unit, balance adjustment unit) 40 Digital switching amplifier S1P Analog audio signal (first signal) S1M Analog audio signal (second signal) S1L Analog audio signal (Sound signal of first channel) S1R Analog sound signal (sound signal of second channel) S1LP Analog sound signal (sound signal of first channel, first signal) S1LM Analog sound signal (sound signal of first channel, 2 signal) S1RP analog sound signal (second channel) S1RM Analog audio signal (second channel audio signal, second signal) S2P 1-bit signal (first quantized signal) S2M 1-bit signal (second quantized signal) ) S2L 1-bit signal (quantized signal of first channel) S2R 1-bit signal (quantized signal of second channel) S2LP 1-bit signal (quantized signal of first channel, first quantized signal) S2LM 1 bit Signal (quantized signal of first channel, second quantized signal) S2RP 1-bit signal (quantized signal of second channel, first quantized signal) S2RM 1-bit signal (quantized signal of second channel, Second quantized signal)

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5J064 AA01 BA02 BB02 BB12 BC08 BC10 BC11 BC14 BC16 BC19 5J091 AA01 AA12 AA24 AA66 CA13 CA15 FA17 HA26 KA02 KA11 KA23 KA42 MA13 SA06 TA01 TA03

Claims (3)

[Claims] 1. A first signal and a second signal having polarities opposite to each other.
A ΔΣ modulator for generating a first quantized signal and a second quantized signal by ΔΣ modulating the first signal and the second signal in order to amplify a differential signal composed of a pair of signals A power amplifying unit that amplifies the first and second quantized signals by switching a constant voltage supplied from a constant-voltage power supply based on the first and second quantized signals. Digital switching comprising: a first feedback path for negatively feeding back the amplified first quantized signal to the ΔΣ modulator; and a second feedback path for negatively feeding back the second quantized signal to the ΔΣ modulator. In the amplifier, an attenuator for attenuating a signal is provided on at least one of the first feedback path and the second feedback path, and an attenuation factor of the first feedback path and the attenuation rate of the second feedback path is determined. Adjust the attenuation rate of the attenuation section so that the difference changes Digital switching amplifier, characterized in that because of the adjustment means. 2. The digital switching device according to claim 1, wherein said adjusting means changes only one of the attenuation rate of the first feedback path and the attenuation rate of the second feedback path. Amplifier. 3. A first ΔΣ modulator for generating a quantized signal of a first channel by ΔΣ modulating an audio signal of a first channel to amplify an audio signal of a plurality of channels, and an audio signal of a second channel. A second ΔΣ modulation unit that generates a second-channel quantized signal by ΔΣ modulation of the first channel, and switches a constant voltage supplied from a constant-voltage power supply based on the first-channel quantized signal to generate a quantized signal of the first channel. A first power amplifier for amplifying the quantized signal, and a second power for amplifying the second channel quantized signal by switching a constant voltage supplied from the constant voltage power supply based on the second channel quantized signal. An amplifying unit, and amplifying the amplified first channel quantized signal into a first ΔΣ
In a digital switching amplifier having a first channel feedback path for negative feedback to a modulation unit and a second channel feedback path for negative feedback of the amplified second channel quantized signal to a second ΔΣ modulation unit, attenuation in which a signal is attenuated. A damping section provided on at least one of the first channel return path and the second channel return path, such that a difference between an attenuation rate of the first channel return path and an attenuation rate of the second channel return path changes. A digital switching amplifier provided with balance adjusting means for adjusting an attenuation factor of the digital switching amplifier.