JP2001268810A - Charge/discharge protection circuit, battery pack incorporating the same, electronic equipment using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the charge/discharge protection circuit of a secondary battery for increasing the frequency of an oscillation circuit, and reducing test time by decreasing delay time when detecting overcharge, overdischarge, or overcurrent, a battery pack incorporating the charge/discharge protection circuit, and electronic equipment such as a cellular phone having the battery pack. SOLUTION: An internal oscillation circuit 16 of a delay circuit for determining delay time when detecting the overcharge, overdischarge, and overcurrent of a secondary battery is composed by a ring oscillator consisting of constant current inverters 111-115 and capacitors 116 and 117, a test terminal is pulled down in testing for turning on transistors 102 and 103, and constant current sources 104 and 108 are made effective, thus increasing the current values of the constant current inverters 111 and 114, increasing an oscillation frequency, and reducing delay time, and hence reducing test time.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge / discharge protection circuit for a Li-ion secondary battery or the like, and more particularly to a method for increasing the frequency of an oscillation circuit and detecting overcharge, overdischarge, or overcurrent. The present invention relates to a charge / discharge protection circuit for a secondary battery capable of reducing a delay time and a test time, a battery pack incorporating the charge / discharge protection circuit, and an electronic device such as a mobile phone using the battery pack.

[0002]

2. Description of the Related Art Lithium secondary batteries are often used in portable electronic devices. The Li-ion secondary battery has a problem in that, when overcharged, metal Li may be precipitated to cause an accident, and when overdischarged, there is a problem that the number of times of repeated charge / discharge is deteriorated. Therefore, a protection switch is provided in the charge / discharge path between the secondary battery and the device body,
When the battery is overcharged above a predetermined voltage or overdischarged below a predetermined voltage, this is detected, the protection switch is turned off, and further overcharge and overdischarge are suppressed.

For example, Japanese Patent Application Laid-Open No. 9-182283 discloses a protection circuit for detecting overcharge, overdischarge, and overcurrent of a Li-ion secondary battery. FIG. 6 is an example of the charge / discharge protection circuit disclosed in the above-mentioned publication. Generally, when the battery voltage approaches the end voltage at which the discharging operation should be stopped, the voltage margin is reduced, and a malfunction due to a sudden load change or the like is likely to occur. Therefore, it is necessary to turn off the protection switch only when the state continues for a certain period or longer, instead of immediately turning off the protection switch even when the voltage becomes lower than the end voltage. In FIG. 6, a timer including an internal oscillation circuit and a frequency division counter is used for that purpose.

In FIG. 6, a voltage comparison circuit COMP50
4, the reference voltage V4 is compared with the divided voltage VCC / N,
When the battery voltage VCC becomes equal to or lower than the end voltage, a low-level signal is output to release the reset of the frequency division counter 502 and start counting. When the count value reaches a value set in advance by the decoder 505, the latch circuit 505 is set and the protection switch 50 composed of a MOS transistor is set.
Turn 7 off. However, if the battery voltage VCC returns to a voltage equal to or higher than the original end voltage before the frequency division counter 502 reaches a preset value, a reset signal is generated and the frequency division counter 502 is reset during counting. Accordingly, if the setting by the decoder circuit 505 is set to a relatively long time in consideration of the load fluctuation, the protection switch 507 is provided when the battery voltage VCC temporarily drops below the cutoff voltage due to the load fluctuation. There is no malfunction of turning off.

[0005] As in the case of overdischarge described above, the delay time when overcharge or overcurrent is detected can all be determined by the internal oscillation circuit and the counter. As described above, according to the above conventional technique, it is not necessary to provide an external capacitor for determining the delay time, and the number of components of the protection circuit board can be reduced.

[0006]

As described above, in the above-mentioned prior art, the delay time is set by using the internal oscillation circuit and the counter, so that there is no need to provide an external capacitor, and the external components are not required. There is an advantage that the number of points can be reduced.

However, the delay time when detecting overdischarge and overcurrent is generally about 10 ms to several tens of ms, so that the test time does not have much effect, but the delay time when detecting overcharge is usually several seconds. Set to about. Therefore, in the above-described related art, a time of several seconds or more is always required when performing a test of an overcharge detection operation. Furthermore, when measuring an accurate overcharge detection voltage value, a waiting time of several seconds or more is required every time the voltage is stepped. Therefore, if the detection voltage can be measured in 25 steps, the waiting time is set to 2 seconds. Then, the time required for measuring the overcharge detection voltage value is 50 seconds, which is too long for mass production and is not at a level that can be put to practical use.

SUMMARY OF THE INVENTION It is an object of the present invention to increase the frequency of an oscillating circuit and to reduce a delay time upon detection of overcharge, overdischarge, or overcurrent to reduce a test time. An object of the present invention is to provide a charge / discharge protection circuit for a battery, a battery pack incorporating the charge / discharge protection circuit, and an electronic device such as a mobile phone having the battery pack.

More specifically, the invention according to claim 1 is
4. A charge / discharge protection circuit for shortening a delay time of a delay circuit for determining a delay time when overcharge, overdischarge, or overcurrent is detected by a single test terminal. The present invention provides a charge / discharge protection circuit for shortening a delay time by changing a constant current value of a constant current inverter constituting an oscillation circuit. In order to provide a charge / discharge protection circuit that reduces the delay time by changing the capacitance of the constant current inverter, the invention according to claims 6 and 7 reduces the delay time by changing the threshold of a constant current inverter that constitutes an oscillation circuit. It is intended to provide a charge / discharge protection circuit.

The invention according to claim 8 provides a charge / discharge protection circuit which shortens the delay time by changing the output position of the counter circuit. The invention according to claim 9 provides that the counter circuit includes a plurality of counter circuits. It is an object of the present invention to provide a charge / discharge protection circuit that shortens a delay time by being configured by an oscillation circuit.

Another object of the present invention is to provide an application technique of the charge / discharge protection circuit.

[0012]

In order to achieve the above object, the invention according to claim 1 determines a delay time for detecting overcharge, overdischarge or overcurrent comprising an internal oscillation circuit and a counter circuit. A delay circuit, a means for fixing the potential of a test terminal for testing to a low level or a high level, and reducing the delay time of the delay circuit when the potential of the test terminal is fixed to a low level or a high level It is characterized by having delay time shortening means for reducing the delay time.
The present invention is a technology that is particularly effective when overcharge is detected.

According to a second aspect of the present invention, the internal oscillating circuit is constituted by a ring oscillator in which a plurality of delay elements including a constant current inverter and a capacitor are connected in a closed loop, and the constant current value of the constant current source of the delay element is substantially reduced. The third aspect of the present invention is to enable another constant current source provided in parallel with the constant current source.

According to a fourth aspect of the present invention, the delay time is shortened by substantially reducing the capacitance of the capacitor constituting the delay element. In this case, another capacitor provided in parallel is invalidated.

According to a sixth aspect of the present invention, a delay time is shortened by substantially reducing a threshold of an inverter constituting a constant current inverter of a delay element. , The inverter is constituted by a CMOS inverter, and the number of saturation-connected MOS transistors connected in series to one MOS transistor is substantially reduced.

According to an eighth aspect of the present invention, the delay time is reduced by changing the output position from the counter circuit.

According to a ninth aspect of the present invention, the internal oscillating circuit includes a low-speed oscillator and a high-speed oscillator, and one of the low-speed oscillator and the high-speed oscillator is enabled by the potential of a single test terminal. It was made.

According to a tenth aspect of the present invention, the charge / discharge protection circuit having the above-described configuration is incorporated in a battery pack. Such a battery pack according to claims 11 to 14 is used as a specific application product.

[0019]

FIG. 1 is a block diagram of a semiconductor device using the present invention and a diagram showing a protection circuit inside a battery pack using the semiconductor device. As shown in the figure, a semiconductor device (charge / discharge protection circuit) 1 constituting a main part of a battery pack A is roughly short-circuited with an overcharge detection circuit 11, an overdischarge detection circuit 12, and an overcurrent detection circuit 13. It comprises a detection circuit 14, an abnormal charger detection circuit 15, an oscillation circuit 16, and a counter circuit 17.

Overcharge detection circuit 11, overdischarge detection circuit 12, overcurrent detection circuit 13, or short circuit detection circuit 14
When the overcharge or overdischarge or overcurrent or short circuit is detected, the oscillation circuit 16 starts operating, and the counter circuit 17 starts counting. And the counter circuit 17
When the delay time set at the time of each detection is counted, in the case of overcharging, the Cout output goes low through the logic circuit (latch etc.) 18 and the level shift 19 to turn off the charge control FET Q1.
Logic circuit 20 for overdischarge, overcurrent, or short circuit
The Dout output goes low through the
Turn off ET Q2.

When a large voltage is applied to the battery pack A when an abnormal charger or the like is connected, a large voltage (V-potential) is input to the inputs of the overcurrent detection circuit 13 and the short circuit detection circuit 14. ) Switch SW1
By turning off the switches SW1 and SW2, the circuit for preventing the shift of the overcurrent detection voltage value and the short-circuit detection voltage value due to the temporal change of the Vth of the transistors constituting the switches SW1 and SW2.

Normally, the delay time when the overdischarge detection circuit 12 detects overdischarge is about 16 ms, the delay time when the overcurrent detection circuit 13 detects overcurrent is about 10 ms, and the delay time when the short circuit detection circuit 14 detects a short circuit. Is about 1 ms, but the delay time when the overcharge detection circuit 11 detects overcharge is 1S or more. Therefore, when testing the semiconductor device 1 or the protection circuit board, the test terminal is fixed at a low level (for example, the switch SW3 is turned on), thereby increasing the output frequency of the oscillation circuit 16 and shortening the delay time. By doing so, the test time can be reduced. This configuration is effective when detecting any of overcharge, overdischarge, and overcurrent, but is particularly effective when overcharge is detected.

(1) An embodiment in which the delay time is changed by changing the constant current value of the constant current source (Claims 1, 2, and 3) FIG. 2 is a diagram for explaining the oscillation circuit 16 having a test function in detail. FIG. 2 includes constant current inverters 111 to 115, capacitors 116 and 1
17 is a ring oscillator. The oscillation frequency of this ring oscillator is controlled by the constant current sources 105 and 109
, The values of capacitors 116 and 117, and the thresholds of inverters 112 and 115.

The test terminal is connected to V
dd is pulled up. For example, when the test terminal is opened by turning off the switch SW3 connected to the test terminal, the Pch
Since the gate voltages of the MOS transistors 102 and 103 become high level, the Pch MOS transistor 10
2, 103 are off. Therefore, the oscillation frequency at this time depends on the constant currents 105 and 109 and the capacitor 1
It is determined by the values of 16,117.

However, when the switch SW3 is turned on to set the test terminal to low level, the gate voltages of the Pch MOS transistors 102 and 103 become low level,
Since the MOS transistors 102 and 103 are turned on,
The value of the constant current that determines the oscillation frequency is constant current source 105
And the sum of the constant current values in the constant current source 104 and the constant current values in the constant current source 109 and the constant current source 108. Therefore, the oscillation frequency increases, and as a result, the delay time when overcharge is detected is shortened. be able to.

For example, the constant current source 105 and the constant current source 104
If the ratio of the constant current of the constant current source 109 and the constant current of the constant current source 108 is 1: 9, the oscillation frequency becomes ten times,
The delay time can be reduced to 1/10. in this case,
The test time of the semiconductor device 1 or the protection circuit board on which the semiconductor device 1 is mounted can be reduced to 1/10.

(2) Embodiment of Changing Delay Time by Changing Capacitance of Capacitor (Claims 1, 4, and 5) FIG. 3 is a diagram showing another embodiment of the oscillation circuit 16 having a test function. is there. FIG. 2 shows an embodiment of an oscillator circuit in which a constant current value of a current source for determining an oscillation frequency is switched by a test terminal. In FIG. 3, an oscillator circuit in which the value of a capacitor is switched by a test terminal. The following shows an example.

In FIG. 3, when the switch SW3 is off and the test terminal is open, the Nch MOS transistor 2
Vdd is applied to the gates of gates 16 and 217 and Nch
Since the MOS transistors 216 and 217 are turned on, the values of the capacitors that determine the oscillation frequency are the capacitors 212 + 213 and 214 + 215.

However, when the switch SW3 is turned on and the test terminal is set to the low level, the gates of the Nch MOS transistors 17 and 18 are grounded, the Nch MOS transistors 17 and 18 are turned off, and the capacitors have only the capacitors 213 and 215. As a result, the oscillation frequency becomes higher, the delay time becomes shorter, and as a result, the test time can be shortened.

In FIG. 2, the oscillation frequency of the oscillation circuit 16 is controlled by switching the constant current value of the constant current source, and in FIG. 3, the oscillation frequency of the oscillation circuit 16 is controlled by switching the value of the capacitor. It is also possible by changing the threshold of the constant current inverter constituting the ring oscillator.

(3) Embodiment of Changing Delay Time by Changing Threshold of Constant Current Inverter (Claims 1, 6, 7) FIG. 4 is a diagram for explaining an example of a configuration for changing the threshold of a constant current inverter. It is. FIG. 1A is a basic configuration diagram of a constant current inverter composed of a constant current source 30 and a CMOS inverter. CMOS inverter is Pch
It comprises a MOS transistor 302 and an Nch MOS transistor 303. FIG. 2B shows the Nch of FIG.
The MOS transistor 303 is connected to the saturated Nch MO
The threshold is changed by changing the number of S transistors 304 (one is shown in the figure) connected in series.

Each time the number of Nch MOS transistors 304 connected in series is increased by one, the threshold is increased by Vt.
h (Vth is the threshold of one Nch MOS transistor 304). Switching of the number of Nch MOS transistors connected in series
For example, a MOS transistor that bypasses both ends of an arbitrary number of Nch MOS transistors connected in series is provided.
This can be performed by controlling the on / off of the bypass MOS transistor by an external signal (test signal). With this configuration, for example, a threshold of 1
/ 2 to increase the oscillation frequency and shorten the delay time.

(4) An embodiment in which the delay time is changed by changing the output position from the counter circuit.
8) FIGS. 2 to 4 show embodiments in which the delay time is changed by changing the oscillation frequency. However, the delay is not changed by changing the oscillation frequency but by changing the position (stage) at which the output is taken out from the counter circuit. You can change the time.

FIG. 5 shows a configuration example in which the delay time is changed by changing the position (stage) at which the output is taken out from the counter circuit 17. The figure shows an example in which outputs taken from two positions (stages) of the counter circuit 17 are taken out via transmission gates 401 and 402 controlled by an external signal (test signal). The position and the number of outputs to be taken out are arbitrary, so that the delay time can be set to a desired value.

(5) An embodiment in which the internal oscillating circuit is composed of a low-speed oscillator and a high-speed oscillator, and the delay time is shortened by switching between them. A delay circuit that determines the delay time when discharging or overcurrent is detected is composed of an internal oscillation circuit and a counter circuit, and the internal oscillation circuit is composed of a low-frequency oscillator and a high-frequency oscillator. One of the low-frequency oscillator and the high-frequency oscillator may be made operable (validated) by the potential (claims 1 and 9).

By incorporating the above-described charge / discharge protection circuit into the battery pack, a highly useful battery pack that can reduce the test time can be realized. Such a battery pack can be widely used for various electronic devices, for example, portable audio devices such as a mobile phone, a digital camera, and a small and lightweight portable mini disk device, which have become widespread in recent years. Claims 10-1
4).

In the embodiments shown in FIGS. 2 and 3, the oscillation frequency is increased by connecting the pull-up resistors 101 and 201 to the test terminal and setting the test terminal to low level. The same effect can be obtained even if the oscillation frequency is increased by connecting a pull-down resistor to the test terminal and setting the test terminal to a high level.

Further, in the embodiments of FIGS. 2 and 3, the case where a high-side constant current and a capacitor are connected to Vss by using a ring oscillator having five stages of constant current inverters has been described. If it is an oscillator, it can be used for all purposes.
The same applies to the ring oscillator connected to. further,
In the above embodiment, the description has been given of the ring oscillator. However, the present invention is not limited to the ring oscillator.
The same effect can be obtained by switching the current value, the resistance value, and the capacitor.

[0039]

According to the present invention, by fixing the test terminal to a low level or a high level, a delay time, particularly a general delay time, when overcharge, overdischarge, or overcurrent of a secondary battery is detected. The charge / discharge protection circuit that can shorten the test time can be shortened by shortening the delay time at the time of overcharge detection where the time is set long. An electronic device such as a battery pack incorporating the battery pack and a mobile phone using the battery pack can be provided.

More specifically, according to the first aspect of the present invention, a single test terminal can realize a charge / discharge protection circuit that reduces the delay time of the delay circuit that determines the delay time when overcharge is detected. According to the second and third aspects of the present invention, it is possible to realize a charge / discharge protection circuit that shortens the delay time by changing the constant current value of the constant current inverter forming the oscillation circuit. For example, a charge / discharge protection circuit that shortens the delay time by changing the capacitance of a capacitor that constitutes an oscillation circuit can be realized.
According to the inventions described in (7) and (7), a charge / discharge protection circuit that shortens the delay time by changing the threshold of the constant current inverter that forms the oscillation circuit can be realized.

According to the eighth aspect of the present invention, a charge / discharge protection circuit that shortens the delay time by changing the output position of the counter circuit can be realized. A charge / discharge protection circuit that reduces the delay time can be realized by using a plurality of oscillation circuits.

According to the tenth to fourteenth aspects of the present invention, as the applied technology of the charge / discharge protection circuit, there is provided a portable telephone, a digital camera, and a portable MD (mini-disc) device which are widely used in recent years. Various electronic devices that require a secondary battery including the device can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram of a semiconductor device using the present invention and a diagram showing a protection circuit inside a battery pack using the semiconductor device.

FIG. 2 is a diagram for explaining an embodiment of an oscillation circuit having a test function (changing a constant current value of a constant current source).

FIG. 3 is a diagram for explaining another embodiment of the oscillation circuit having a test function (changing the capacitance of the capacitor).

FIG. 4 is a diagram for explaining another embodiment of the oscillation circuit having a test function (changing the threshold of the constant current inverter).

FIG. 5 is a diagram for explaining an embodiment of a counter circuit having a test function (change of an output extraction position from the counter circuit).

FIG. 6 is an example of an overdischarge protection circuit according to the related art.

[Explanation of symbols]

 1: semiconductor device (charge / discharge protection circuit), 11: overcharge detection circuit, 12: overdischarge detection circuit, 13: overcurrent detection circuit, 14: short circuit detection circuit, 15: abnormal charger detection circuit, 16: oscillation circuit , 17: counter circuit, 18, 20: logic circuit (latch), 19: level shift circuit, Q1, Q2: transistor, SW1, SW2, SW3: switch, 101, 201: pull-up resistor, 102, 103, 302: Pch MOS transistors, 104 to 110, 202 to 206, 301: constant current sources, 111 to 115, 207 to 211: constant current inverters, 116, 117, 212 to 215: capacitors, 303, 304: Nch MOS transistors, 401, 402: transmission gate, 501: built-in oscillator, 502: division counter, 03: gate 504: comparator (COMP), 505: Decoder (latch circuit), 506: inverter, 507: protection switch.

Claims (14)

[Claims] 1. A charge / discharge protection circuit for detecting overcharge, overdischarge, or overcurrent of a secondary battery and protecting the secondary battery from overcharge, overdischarge, or overcurrent, comprising an internal oscillation circuit. A delay circuit for determining a delay time upon detection of overcharge, overdischarge, or overcurrent, comprising a counter circuit, a means for fixing the potential of a test terminal for testing to a low level or a high level, A charge / discharge protection circuit comprising a delay time shortening means for shortening the delay time of the delay circuit when the potential is fixed at a low level or a high level. 2. The internal oscillation circuit comprises a ring oscillator in which a plurality of delay elements comprising a constant current inverter and a capacitor are connected in a closed loop, and said delay time reducing means comprises a constant current comprising a constant current inverter of said delay element. 2. The charge / discharge protection circuit according to claim 1, wherein the constant current value of the source is substantially increased. 3. The charging apparatus according to claim 2, wherein the means for substantially increasing the constant current value is means for activating another constant current source provided in parallel with the constant current source. Discharge protection circuit. 4. The internal oscillating circuit is constituted by a ring oscillator in which a plurality of delay elements comprising a constant current inverter and a capacitor are connected in a closed loop, and the delay time shortening means substantially reduces the capacitance of the capacitor constituting the delay element. 2. The charge / discharge protection circuit according to claim 1, wherein the charge / discharge protection circuit is a means for reducing the power consumption. 5. The device according to claim 4, wherein the means for substantially reducing the capacitance of the capacitor is means for invalidating another capacitor provided in parallel with the capacitor.
The charge / discharge protection circuit according to the above. 6. An internal oscillator circuit comprising a ring oscillator in which a plurality of delay elements comprising a constant current inverter and a capacitor are connected in a closed loop, wherein said delay time reducing means constitutes a constant current inverter of said delay element. 2. The charge / discharge protection circuit according to claim 1, wherein the charge / discharge protection circuit is a means for substantially reducing the threshold value. 7. The method according to claim 1, wherein the inverter is a CMOS inverter, and the means for substantially reducing a threshold of an inverter constituting a constant current inverter of the delay element includes:
7. The charge / discharge protection circuit according to claim 6, wherein the charge / discharge protection circuit is means for substantially reducing the number of saturation-connected MOS transistors connected in series to one of the MOS transistors constituting the CMOS inverter. 8. The charge / discharge protection circuit according to claim 1, wherein said delay time shortening means is means for changing an output position from said counter circuit. 9. A charge / discharge protection circuit for detecting overcharge, overdischarge, or overcurrent of a secondary battery and protecting the secondary battery from overcharge, overdischarge, or overcurrent, comprising: A delay circuit for determining a delay time upon detection of overdischarge or overcurrent is configured by an internal oscillation circuit and a counter circuit, and the internal oscillation circuit is configured by a low-speed oscillator and a high-speed oscillator, and a single test terminal is provided. A charge / discharge protection circuit characterized in that one of a low-speed oscillator and a high-speed oscillator is enabled by the potential of the charge / discharge circuit. 10. A battery pack incorporating the charge / discharge protection circuit according to any one of claims 1 to 9. 11. An electronic device using the battery pack according to claim 10. 12. A mobile phone using the battery pack according to claim 10. 13. A digital camera using the battery pack according to claim 10. 14. A portable audio device using the battery pack according to claim 10.