JP2001267483A - Semiconductor device, manufacturing method thereof, and electronic device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a low-cost semiconductor device which is reliable for durability. SOLUTION: There are provided a TAB tape on which a semiconductor chip is mounted with an adhesive in-between; a land of an external terminal formed on a side of the TAB tape opposite to the semiconductor chip mounting side; a connection through hole provided at the TAB tape and electrically connecting the semiconductor chip to the land; a bonding wire for electrically connecting the semiconductor chip to the land through the connection through hole; and an insulating resin provided on the semiconductor chip mounting side of the TAB tape and sealing the semiconductor chip, the bonding wire, and the connection through hole.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, a method for manufacturing the same, and an electronic device. It is about technology.

[0002]

2. Description of the Related Art A semiconductor device used for an electronic device such as a mobile phone is required to have a small height in order to reduce the size.

As a conventional semiconductor device, for example, QF
QFN type semiconductor device of N (Quad Flat Non-Leaded Package) structure and BC of BCC (Bump Chip Carrier) structure
There was a C-type semiconductor device. Each of the semiconductor devices has a structure in which ball terminals such as solder balls, which are factors that increase the device height, are not provided, and the height is suppressed.

FIG. 10 is a view for explaining the structure of a QFN type semiconductor device. FIG. 10 (a) is a sectional view, and FIG.
(B) shows a plan view as viewed from below.

In the above-described QFN type semiconductor device, as shown in FIG.
Is mounted on the semiconductor chip 1 with an adhesive (not shown), and the electrode pads 4 of the semiconductor chip 1 and the lead terminals 2 of the lead frame are bonded by bonding wires 5 such as a gold wire. Has a sealed structure such that a portion thereof is exposed.

In the manufacturing method, as shown in FIG. 11A, first, a lead frame having lead terminals 2 and a die 3 is attached on a film 7 such as a heat-resistant sheet with an adhesive.

[0007] Next, as shown in FIG.
The semiconductor chip 1 is mounted thereon, and the electrode pads 4 and the lead terminals 2 of the lead frame are bonded by bonding wires 5.

Next, as shown in FIG. 11 (c), they are sealed with a mold resin 6, and as shown in FIG. 11 (d), a part of the lead terminal 2 is cut and the film is peeled off.

FIG. 12 is a diagram for explaining the structure of a BCC type semiconductor device. FIG. 12 (a) is a sectional view, and FIG.
(B) is a plan view as viewed from below.

Next, in the above-described BCC type semiconductor device, as shown in FIG. 12, a semiconductor chip 1 is mounted on an adhesive 10 by mounting, and an electrode pad 4 of the semiconductor chip 1 and a bump formed by gold plating. It has a structure in which the terminal 11 is bonded with a bonding wire 5 and they are sealed with a mold resin 6 so that the bump terminal 11 is exposed.

In the manufacturing method, as shown in FIG. 13A, first, a groove is formed in a copper frame 12 by etching or coining, and a bump terminal 11 is formed by spot plating Ag or Au there. .

Next, as shown in FIG. 13B, an adhesive 10 is applied to the copper frame 12, and the semiconductor chip 1 is mounted thereon.

Next, as shown in FIG. 13C, the electrode pads 4 and the bump terminals 11 are bonded by bonding wires 5, and they are sealed with a mold resin.

Next, as shown in FIG. 13D, the entire surface of the copper frame 12 is removed by etching.

As a thin semiconductor device used for an IC card, there is a semiconductor device for an IC card shown in FIG.

FIGS. 14A and 14B are views for explaining the configuration of the IC card semiconductor device. FIG. 14A is a sectional view, and FIG. 14B is a plan view as viewed from below.

As shown in FIG. 14, the semiconductor device for an IC card has an insulating substrate 9 having a hole for wire bonding, a hole for mounting the semiconductor chip 1, and the semiconductor chip 1 with an adhesive 10 therebetween. The electrode pads 4 of the semiconductor chip 1 are bonded to the wiring leads 27, which have been subjected to copper foil etching and gold plating, with the bonding wires 5, thereby bonding the semiconductor chip 1 and the wire bonding. Insulating substrate 9 so as to surround the region
A reinforcing frame 28 is provided vertically above the semiconductor chip 1 for reinforcing the semiconductor chip 1, and has a structure in which the inside of the reinforcing frame 28 and holes for wire bonding are sealed with the mold resin 6.

In the manufacturing method, as shown in FIG. 15A, first, an insulating substrate 9 (such as a glass epoxy) is prepared.

Next, as shown in FIG. 15B, a hole for forming a hole for wire bonding and a hole for mounting the semiconductor chip 1 are formed on the insulating substrate 9.

Next, as shown in FIG. 15C, a copper foil 25 is attached to the holed insulating substrate 9.

Next, as shown in FIG. 15D, the copper foil 25 is etched to form wiring leads 27.

Next, as shown in FIG. 15E, the semiconductor chip 1 is mounted in the semiconductor chip mounting hole via the adhesive 10.

Next, as shown in FIG. 15F, the electrode pads 4 of the semiconductor chip 1 are inserted through the wire bonding holes.
And the wiring lead 27 are bonded by the bonding wire 5, and the reinforcing frame 28 is installed.

Next, as shown in FIG. 15 (g), the inside of the reinforcing frame 28 and the hole for wire bonding are sealed with a mold resin.

[0025]

The above-mentioned QFN type semiconductor device and BCC type semiconductor device have a reduced device height by not providing ball terminals, but have the following problems.

Problems with QFN type semiconductor device: Since a lead frame having a relatively large thickness (100 μm) is used, the device itself does not become so thin.

2. As shown in FIGS. 10 and 11, a projection 2a for hooking the mold resin 6 to the lead terminal 2 is provided.
Is required.

Problems of BCC type semiconductor device: As shown in FIG. 13, since the copper frame 12 is used in the manufacturing process, the device becomes expensive.

2. As shown in FIGS. 12 and 13, since the adhesive 10 is not sealed with the mold resin, moisture enters from there, causing cracks and impairing the reliability of the connection portion between the bonding wire 5 and the bump terminal 11.

3. Since the semiconductor chip 1 is mounted via the adhesive 10, the thickness of the adhesive cannot be reduced.

The IC card semiconductor device is embedded in the IC card with the wiring leads 27 exposed. At this time, the electrical connection with the external terminal of another electronic device is made by bringing the external terminal into contact with the wiring lead 27. For this reason, no consideration is given to connecting to another electronic device or a substrate by solder reflow.

For this reason, when this IC card semiconductor device is applied as it is to a semiconductor device for reflow soldering, as shown in FIG. 14 (b), the adhesive 10 is not sealed with the mold resin, so that the moisture does not flow therefrom. And the reliability of the connection portion such as cracks and peeling of the semiconductor chip 1 is impaired.

As shown in FIG. 14 and FIG.
Since it is used by being embedded in a card, the reinforcing frame 28 for protecting the semiconductor chip 1 and the wire bonding portion is provided, and there is a problem that the device becomes expensive.

An object of the present invention is to solve the above problems, and an object of the present invention is to provide a thin and inexpensive semiconductor device.

Another object of the present invention is to provide a technique for improving the reliability of the occurrence of cracks in the device, wire bonding and the connection of semiconductor chips.

[0036]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present invention, typical ones will be briefly described as follows.

(1) A TAB tape on which a semiconductor chip is mounted via an adhesive, a land serving as an external terminal formed on a side opposite to the semiconductor chip mounting surface of the TAB tape, and the TAB tape is provided on the TAB tape. A connection through-hole for electrically connecting the semiconductor chip and the land,
A bonding wire for electrically connecting the semiconductor chip and the land via the connection through hole;
It is provided on the semiconductor chip mounting surface side of the AB tape, and includes at least the semiconductor chip, the bonding wire, and an insulating resin for sealing the connection through-hole.

(2) In the semiconductor device of (1), the TAB tape has a concave hole for mounting a semiconductor chip, and the semiconductor chip is fitted into the concave hole via an adhesive.

(3) A TAB tape on which a semiconductor chip is mounted via an adhesive, a land serving as an external terminal formed on a side opposite to the semiconductor chip mounting surface of the TAB tape, and the TAB tape is provided on the TAB tape. A connection through-hole for electrically connecting the semiconductor chip and the land,
A conductive bump provided in the connection hole and electrically connected to the land, a bonding wire for electrically connecting the semiconductor chip to the conductive bump, and a bonding wire on the semiconductor chip mounting surface side of the TAB tape. And an insulating resin for sealing at least the semiconductor chip, the bonding wires, and the conductive bumps.

As a result, the lands, which are external terminals of the semiconductor device, can be formed very thin, so that they are thinner than a semiconductor device using conventional lead terminals (QFN type) and a semiconductor device using ball terminals. It becomes possible.

Since the lands are formed using a conventional wiring forming technique, special means such as a copper frame for forming external terminals, such as a semiconductor device having bump terminals (BCC type), are used. , And can be manufactured at low cost.

Further, since the semiconductor chip, the bonding wires, and the connecting portions thereof are completely sealed with the insulating resin and the TAB tape, the adhesive portion (the interface between the external terminal and the semiconductor chip) is used like the BCC type semiconductor device. ) Does not allow moisture to enter, so that cracks can be generated in the device and the reliability of the connection portion for wire bonding can be improved.

(4) In the semiconductor device according to any one of (1) to (3), the land and the TAB tape are
Connect via adhesive.

(5) In the semiconductor device according to any one of (1) to (4), the lands are provided in an array.

(6) In the semiconductor device according to any one of (1) to (5), the thickness of the land is 20 μm or more.

(7) In the semiconductor device according to any one of (1) to (6), no land for plating extraction for performing electroplating is provided.

(8) In the semiconductor device according to any one of (1) to (7), the TAB tape is provided with a vent hole for releasing moisture of an adhesive for mounting the semiconductor chip to the outside.

(9) In the semiconductor device of (8), the vent hole is an index hole.

Thus, even when the lands are provided in an array, a semiconductor device which is inexpensive, thin, and reliable in terms of durability can be provided.

Further, since no plating lead is provided on the external terminal, the size can be further reduced.

Further, by providing a vent hole for releasing water vapor from the adhesive at the time of solder reflow, it is possible to suppress accumulation and separation between the adhesive and the TAB tape.

Further, by setting the thickness of the land to 20 μm or more, it is possible to provide a semiconductor device in which the solder flux can be easily removed.

(10) A TAB tape is prepared, and a hole is formed to form a connection through hole at a land forming portion.
A conductive thin film is formed on the B tape, an unnecessary conductive thin film is removed by etching to form a land, a metal plating is formed on the land, an adhesive is applied to the TAB tape, and the semiconductor chip is removed. The element formation surface is adhered on the upper side, and the electrode pads of the semiconductor chip and the lands are bonded with bonding wires through the connection through holes, and the semiconductor chip, the bonding wires and the connection through holes are sealed with resin. Stop and remove unnecessary portions of the TAB tape.

(11) A TAB tape is prepared, a hole is formed to form a connection through hole in a land forming portion, and a concave hole is formed in a semiconductor chip mounting portion. A conductive thin film is formed on the TAB tape and etched. Forming a land by removing the excess conductive thin film, forming a metal plating on the land,
An adhesive is applied to the inside of the concave hole of the TAB tape, the semiconductor chip is stuck on the element forming surface, and the electrode pad of the semiconductor chip and the land are bonded with a bonding wire through the connection through hole. Then, the semiconductor chip, the bonding wires, and the connection through holes are sealed with a resin, and unnecessary portions of the TAB tape are removed.

(12) A TAB tape is prepared, and a hole is formed to form a connection through hole at a land forming portion.
A conductive thin film is formed on the B tape, an unnecessary conductive thin film is removed by etching to form a land, a conductive bump is formed in the through hole for connection, and a metal is formed on the land and the conductive bump. A plating is formed, an adhesive is applied to the TAB tape, the semiconductor chip is attached on the element forming surface thereof, and the electrode pads of the semiconductor chip and the metal plating on the conductive bumps are bonded with bonding wires. ,
The semiconductor chip, the bonding wires, and the metal plating portions on the conductive bumps are resin-sealed, and unnecessary portions of the TAB tape are removed.

(13) In the method for manufacturing a semiconductor device according to any one of (10) to (12), the metal plating is formed by an electroless plating method.

(14) In an electronic device having a wiring board on which a semiconductor device is mounted, the semiconductor device includes a TAB tape on which a semiconductor chip is mounted via an adhesive, and a TAB tape.
A land serving as an external terminal formed on the side opposite to the semiconductor chip mounting surface of the AB tape; a connection through-hole provided on the TAB tape for electrically connecting the semiconductor chip to the land; A bonding wire for electrically connecting the chip and the land via the connection through hole; and a bonding wire provided on the semiconductor chip mounting surface side of the TAB tape, and sealing at least the semiconductor chip, the bonding wire, and the connection through hole. And an insulating resin for stopping.

(15) In the electronic device of (14), the semiconductor device has a concave hole for mounting a semiconductor chip on the TAB tape, and a conductor chip is fitted into the concave hole via an adhesive. Let it.

(16) In an electronic device having a wiring board on which a semiconductor device is mounted, the semiconductor device includes a TAB tape on which a semiconductor chip is mounted via an adhesive, and a TB tape.
A land serving as an external terminal formed on the side opposite to the semiconductor chip mounting surface of the AB tape; a connection through hole provided on the TAB tape for electrically connecting the semiconductor chip to the land; A conductive bump provided in the hole and electrically connected to the land; a bonding wire for electrically connecting the semiconductor chip to the conductive bump; and a bonding wire provided on the semiconductor chip mounting surface side of the TAB tape. And an insulating resin for sealing at least the semiconductor chip, the bonding wires, and the conductive bumps.

As described above, by mounting a thin semiconductor device on an electronic device, it is possible to form an empty space for mounting other devices and modules in the electronic device housing, or to reduce the thickness of the electronic device housing itself. The size can be reduced.

Further, by performing the electroless plating, it is not necessary to provide a plating lead on the external terminal.
The size can be further reduced.

[0062]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device according to an embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram for explaining the configuration of the semiconductor device of this embodiment. FIG. 1 (a) is a plan view seen from above, FIG. 1 (b) is a plan view seen from below, FIG. 1C is a cross-sectional view taken along line AA of FIG. 1B.

The semiconductor device 100 according to the present embodiment has the structure shown in FIG.
1A to 1C, a polyimide in which a solder joint terminal (land) 22 serving as an external terminal is formed, and a connection through hole 23 smaller than the area of the land 22 is formed immediately above the polyimide. Tape 21 which is a tape of an insulating material such as a liquid crystal polymer, and a land 2 of the TAB tape 21
A semiconductor chip 1 mounted on the side on which the semiconductor chip 2 is not formed via an adhesive 10, a bonding wire 5 for connecting the electrode pad 4 of the semiconductor chip 1 and the land 22 via a connection through hole 23, It comprises a chip 1, a bonding wire 5, and a mold resin for sealing the connection through hole 23.

The surface of the land 22 is plated with metal (for example, Ni / Au) to improve corrosion resistance and connectivity.
Plating) 24 is performed.

Next, a method for manufacturing the semiconductor device 100 of the present embodiment will be described.

FIGS. 2 and 3 show a semiconductor device 1 according to this embodiment.
100 is a view for explaining a manufacturing method of No. 00; FIG.

As shown in FIG. 2A, the manufacturing method of the semiconductor device 100 of this embodiment is as follows.
Is prepared, and a hole is punched in the connection through-hole 23 by a punch at the land 22 forming position.

Next, as shown in FIG. 2B, a TAB tape 21 in which a conductive thin film (copper foil) 25 is formed with a hole by an adhesive.
Then, as shown in FIG. 2C, etching is performed to remove the excess copper foil 25, and the lands 22 are formed. The etching at this time is performed in the same manner as the conventional wiring formation. In this manner, the connection through holes 23 are formed in the TAB tape 21.
, And then the copper foil 25 is attached later, so that the drilling step can be performed at low cost.

The hole forming and land forming steps in the TAB tape 21 are not limited to the steps shown in FIGS. 2A and 2B. For example, the TAB tape 21 with the copper foil 25 may be used. Prepare and etch land 2
2 may be formed, and a TAB tape immediately below the land may be formed by making a hole with a carbon dioxide laser or the like.

Then, Ni / A is applied to the land 22 thus formed.
The u plating 24 is formed. This Ni / Au plating 24
May be electroless plating, electrolytic plating, or a combination of electroless plating followed by electrolytic plating. When fine processing is particularly required, the electroless plating is performed.

Further, in the case of performing electroless plating, it is not necessary to provide a plating lead in an external terminal, so that the apparatus can be made smaller.

Next, as shown in FIG. 2D, the adhesive 10 is applied to the TAB tape 21, and the semiconductor chip 1 is attached with the element forming surface facing upward.

Next, as shown in FIG. 3A, the electrode pads 4 of the semiconductor chip 1 and the lands 22 are bonded with the bonding wires 5.

Next, as shown in FIG. 3B, the semiconductor chip 1, the bonding wires 6, and the connection through holes 23 are resin-sealed with the mold resin 6.

Next, as shown in FIG.
The AB tape 21 is cut off by a mold and singulated to obtain the semiconductor device 100 of the present embodiment.

In this embodiment, the case where only one semiconductor device 100 is manufactured has been described for the sake of simplicity. However, as shown in FIG. Many semiconductor devices 100 are manufactured at the same time. At this time, as shown in FIG. 4B in which the circled portion d in FIG.
00 is provided with an index mark 36 on the TAB tape 21 so as to facilitate dicing.

In the semiconductor device 100 of the present embodiment, as shown in FIG. 5, a chip receiving recessed hole 30 for receiving the semiconductor chip 1 is formed in the TAB tape 21 by a carbon dioxide laser or the like, and the adhesive 10 is placed thereon. By coating and mounting the semiconductor chip 1 so as to be fitted into the chip receiving recessed hole 30, the height of the device can be further reduced by the height of the chip receiving recessed hole 30.

Further, when the semiconductor device 100 of the present embodiment is applied to a multi-terminal (increased number of lands) semiconductor device, the area of the land itself is reduced, and the hole diameter of the connection through hole 23 is accordingly reduced. Become smaller.

In this case, as shown in FIG.
Conductive bumps (bump plating of copper or the like) 31 electrically connected to the substrate are formed in the connection through holes 23, and Ni is formed thereon.
/ Au plating 24, and wire bonding on the Ni / Au plating 24, the electrode pad 4 can be formed even if the land area becomes fine due to the narrow pitch.
And the land 22 can be more reliably electrically connected.

At this time, the bump plating 31 is formed by the above-described N
Similarly to the formation of the i / Au plating 24, electroless plating, electrolytic plating, or a combination of electroless plating followed by electrolytic plating may be used. In the case where fineness is particularly required, electroless plating is performed.

As described above, the lands 22, which are the external terminals of the semiconductor device 100 of the present embodiment, are formed by a wiring forming technique for etching a copper foil, and thus are formed very thin (about 20 μm). be able to. For this reason, it becomes possible to make the semiconductor device (QFN type) using a conventional lead terminal (about 100 μm) thinner than a semiconductor device using a ball terminal (about 500 μm).

Since the lands 22 are formed by using the conventional wiring forming technique for etching the copper foil 25, the lands 22 are used for forming external terminals as in a semiconductor device having bump terminals (BCC type). Since no special means such as a copper frame is required, it can be manufactured at low cost.

Further, the semiconductor chip 1 and the bonding wires 5 and their connection parts are formed by molding resin 6 and TAB.
Since it is completely sealed with the tape 21, moisture does not enter from the adhesive portion (interface between the external terminal and the semiconductor chip) unlike the BCC type semiconductor device, so that cracks in the device, wire bonding and semiconductor It is possible to improve the reliability of the connection part of the chip 1.

Therefore, the TAB tape 21 on which the semiconductor chip 1 is mounted via the adhesive 10 and the TAB tape 2
A land 22 formed on the side opposite to the semiconductor chip mounting surface of the semiconductor chip 1 and the semiconductor chip 1 provided on the TAB tape 21.
Connection through hole 2 for electrically connecting to land 22
3, bonding wires 5 for electrically connecting the semiconductor chip 1 and the lands 22 via the connection through holes 23.
And a mold resin 6 (insulating resin) that is provided on the semiconductor chip mounting surface side of the TAB tape 21 and seals the semiconductor chip 1, the bonding wires 5, and the connection through-holes 23, thereby being inexpensive, thin, and thin. A semiconductor device with high reliability can be provided.

(Example 1): Example of a multi-terminal semiconductor device Next, an application example of the above-described semiconductor device of the present embodiment will be described as Example 1.

In the first embodiment, a semiconductor device having an array of lands 22 will be described as an example of the multi-terminal semiconductor device described above.

FIGS. 7A and 7B are diagrams for explaining the configuration of the semiconductor device of the first embodiment. FIG. 7A is a plan view seen from above, and FIG. 7B is a plan view seen from below. FIG. 7C is a sectional view taken along line AA of FIG. 7B.

The semiconductor device 100a of the first embodiment is similar to the semiconductor device 100 of FIG.
As shown in FIGS. 7A to 7C, an array of lands 22 serving as external terminals is formed.
2, a polyimide having a connection through hole 23 smaller than the area 2 and a vent hole 26 for allowing the moisture of the adhesive 10 to escape.
TAB tape 21 which is an insulating tape such as a liquid crystal polymer.
And the semiconductor chip 1 mounted via the adhesive 10 on the side of the TAB tape 21 where the lands 22 are not formed.
Wire 5 for connecting the electrode pad 4 of the semiconductor chip 1 and the land 22 via the through hole 23 for connection.
And a mold resin 6 for sealing the semiconductor chip 1, the bonding wires 5, and the connection through holes 23.

By providing the vent hole 26 in the TAB tape 21 immediately below the semiconductor chip 1 on which the semiconductor chip 1 is mounted, the moisture of the adhesive 10 for fixing the semiconductor chip can be released. Thereby, it is possible to prevent the water vapor generated during the solder reflow from being accumulated between the adhesive 10 and the TAB tape 21 and peeling off.

The vent hole 26 not only allows water vapor from the adhesive 10 to escape during solder reflow, but also functions as an index.

Further, the surface of the land 22 is subjected to metal plating (for example, Ni / Au plating) 24 in order to improve corrosion resistance and connectivity as in the above-described embodiment.

Further, as shown in the enlarged view of the vicinity of the wire bonding shown in FIG. 8, the thickness of the land 22 is preferably set to a distance from the substrate to be mounted so that the solder flux at the time of reflow can be easily removed. The thickness is 20 μm or more.
In particular, 20 μm to 50 μm is optimal.

Next, a method of manufacturing the semiconductor device 100a according to the first embodiment will be described.

Since the manufacturing method of the semiconductor device 100a of the first embodiment is basically the same as that of the semiconductor device 100 of the present embodiment shown in FIGS. 2 and 3, only the differences will be described.

In the semiconductor device 100a of the first embodiment, in FIG. 2A, holes are formed by punching to form an array of connection through holes 23 and vent holes 26.

Then, in FIG. 2C, arrayed lands 22 are formed on the connection through holes 23. The rest is the same as the semiconductor device 100 of the present embodiment.

As described above, even when the lands 22 are provided in an array, a semiconductor device which is inexpensive, thin, and reliable in terms of durability can be provided by the same method as in the present embodiment.

Further, by providing a vent hole 26 for allowing water vapor from the adhesive 10 to escape during solder reflow, the adhesive 1
It is possible to prevent the liquid from accumulating between the TAB tape 21 and the TAB tape 21 and peeling off.

By setting the thickness of the land 22 to 20 μm or more, it is possible to provide a semiconductor device from which solder flux can be easily removed.

Next, an electronic device on which the semiconductor devices 100 and 100a of the above-described embodiment and Example 1 are mounted will be described.

The semiconductor device 10 of the present embodiment and Example 1
Since 0 and 100a are inexpensive and thin as described above, they are suitable for mounting electronic devices that require miniaturization. Such electronic devices include, for example, mobile phones, pagers,
There are a GPS terminal, an electronic organizer, an electronic dictionary, an electronic translator, and the like.

FIG. 9 is a diagram showing a wiring board of an electronic device on which the semiconductor devices 100 and 100a of the present embodiment or Example 1 are mounted.

As shown in FIG. 9, the wiring board 1 of the electronic device
Reference numeral 50 denotes the semiconductor device 100 of this embodiment, the resistor 110,
Capacitor 120, BGA type semiconductor device 200, QFP
Type semiconductor device 300 is mounted.

Since the semiconductor devices 100 and 100a of the present embodiment are thinner than the other semiconductor devices 200 and 300, an empty space for mounting other devices and modules can be formed in the housing of the electronic device, The size of the housing itself can be reduced to reduce the size.

As described above, the invention made by the present inventor is:
Although specifically described based on the embodiment, the present invention
It is needless to say that the present invention is not limited to the above-described embodiment, but can be variously modified without departing from the scope of the invention.

[0107]

The effects obtained by the representative inventions among the inventions disclosed in the present invention will be briefly described.
It is as follows.

Since the lands, which are external terminals, are formed by a wiring forming technique for etching a copper foil, they can be formed very thin, so that the thickness of the semiconductor device can be reduced.

Since no special means for forming the external terminals is required, the device can be manufactured at low cost.

Since moisture does not enter from the interface between the external terminal and the semiconductor chip, it is possible to improve the generation of cracks in the device, the wire bonding, and the reliability of the connection portion of the semiconductor chip.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a method for manufacturing the semiconductor device 100 according to the embodiment.

FIG. 3 is a diagram illustrating a method for manufacturing the semiconductor device 100 according to the embodiment.

FIG. 4 is a diagram illustrating a method for manufacturing the semiconductor device 100 according to the embodiment.

FIG. 5 is a diagram illustrating a configuration of another semiconductor device according to an embodiment of the present invention.

FIG. 6 is a diagram illustrating a configuration of another semiconductor device according to an embodiment of the present invention.

FIG. 7 is a diagram illustrating a configuration of a semiconductor device 100a according to the first embodiment.

FIG. 8 is an enlarged view of the vicinity of wire bonding for explaining the thickness of a land 22.

FIG. 9 shows the semiconductor device 100 according to the first embodiment and the first embodiment;
FIG. 2 is a diagram illustrating a wiring board of an electronic device on which 100a is mounted.

FIG. 10 is a diagram illustrating a configuration of a conventional QFN type semiconductor device.

FIG. 11 is a view illustrating a method for manufacturing a conventional QFN semiconductor device.

FIG. 12 is a diagram illustrating a configuration of a conventional BCC type semiconductor device.

FIG. 13 is a view illustrating a method for manufacturing a conventional BCC type semiconductor device.

FIG. 14 is a diagram for explaining a configuration of a conventional IC card semiconductor device.

FIG. 15 is a view illustrating a method of manufacturing a conventional IC card semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Lead terminal 3 Die 4 Electrode pad 5 Bonding wire 6 Mold resin 10 Adhesive 11 Bump terminal 12 Copper frame 21 TAB tape 22 Land 23 Connection through hole 24 Ni / Au plating 25 Copper foil 26 Vent hole 27 Wiring lead 28 Reinforcing frame 30 Chip receiving concave hole 31 Bump plating 100, 100a Semiconductor device 150 Wiring board 200 BGA type semiconductor device 300 QFP type semiconductor device

Claims (16)

[Claims] 1. A T chip having a semiconductor chip mounted thereon via an adhesive.
AB tape, lands (solder bonding terminals) serving as external terminals formed on the side of the TAB tape opposite to the semiconductor chip mounting surface, and provided on the TAB tape to electrically connect the semiconductor chip and the lands. And a bonding wire for electrically connecting the semiconductor chip and the land via the connection through hole; and a bonding wire provided on the semiconductor chip mounting surface side of the TAB tape, and at least the semiconductor chip , A bonding wire, and an insulating resin for sealing the connection through-hole. 2. The semiconductor device according to claim 1, wherein the TAB tape has a concave hole for mounting a semiconductor chip, and the semiconductor chip is fitted into the concave hole via an adhesive. A semiconductor device characterized by the above-mentioned. 3. A T chip having a semiconductor chip mounted thereon via an adhesive.
An AB tape, a land serving as an external terminal formed on the side opposite to the semiconductor chip mounting surface of the TAB tape, and a connection penetrating provided on the TAB tape for electrically connecting the semiconductor chip and the land. A hole, a conductive bump provided in the connection hole and electrically connected to the land, a bonding wire for electrically connecting the semiconductor chip to the conductive bump, and mounting the semiconductor chip on the TAB tape. A semiconductor device, comprising: an insulating resin that is provided on a surface side and seals at least the semiconductor chip, the bonding wires, and the conductive bumps. 4. The semiconductor device according to claim 1, wherein said land and said TAB tape are connected via an adhesive. 5. The semiconductor device according to claim 1, wherein the lands are provided in an array. 6. The semiconductor device according to claim 1, wherein the land has a thickness of 20 μm.
m or more. 7. The semiconductor device according to claim 1, wherein a land for plating out for performing electroplating is not provided. 8. The TAB tape according to claim 1, wherein the TAB tape has a vent hole for releasing moisture of an adhesive for mounting the semiconductor chip to the outside during reflow. A semiconductor device characterized by the above-mentioned. 9. The semiconductor device according to claim 8, wherein said vent hole is an index hole. 10. A TAB tape is prepared, a hole is formed to form a connection through hole at a land forming portion, a conductive thin film is formed on the TAB tape, and an excess conductive thin film is removed by etching. A land is formed, a metal plating is formed on the land, an adhesive is applied to the TAB tape, the semiconductor chip is attached on the element forming surface, and the connection between the electrode pad of the semiconductor chip and the land is performed. The semiconductor chip, the bonding wire and the connection through-hole are sealed with a resin, and unnecessary portions of the TAB tape are removed. Method. 11. A TAB tape is prepared, a hole is formed to form a connection through hole in a land forming portion, and a concave hole is formed in a semiconductor chip mounting portion. A conductive thin film is formed on the TAB tape and etched. A land is formed by removing an excess conductive thin film, a metal plating is formed on the land, and the TA is formed.
An adhesive is applied in the concave hole of the B tape, the semiconductor chip is attached on the element forming surface, and the electrode pads of the semiconductor chip and the lands are bonded with bonding wires through the connection through holes, The semiconductor chip, the bonding wires, and the connection through holes are resin-sealed, and the TAB is formed.
A method for manufacturing a semiconductor device, wherein an unnecessary portion of a tape is removed. 12. A TAB tape is prepared, a hole is formed to form a connection through hole in a land forming portion, a conductive thin film is formed on the TAB tape, and an excess conductive thin film is removed by etching. A land is formed, a conductive bump is formed in the through hole for connection, a metal plating is formed on the land and the conductive bump, an adhesive is applied to the TAB tape, and the semiconductor chip is mounted on the element forming surface. And bonding the electrode pads of the semiconductor chip and the metal plating on the conductive bumps with bonding wires, and sealing the semiconductor chip, the bonding wires and the metal plating portions on the conductive bumps with resin. And a method of manufacturing the semiconductor device, wherein unnecessary portions of the TAB tape are removed. 13. The method of manufacturing a semiconductor device according to claim 10, wherein the metal plating is formed by an electroless plating method. . 14. An electronic device having a wiring board on which a semiconductor device is mounted, wherein the semiconductor device is formed on a TAB tape on which a semiconductor chip is mounted via an adhesive, and on a side of the TAB tape opposite to a semiconductor chip mounting surface. And a connection through-hole provided on the TAB tape for electrically connecting the semiconductor chip and the land, and a connection through-hole connecting the semiconductor chip and the land. A bonding wire that is electrically connected to the TAB tape via a semiconductor chip mounting surface of the TAB tape, and an insulating resin that seals at least the semiconductor chip, the bonding wire, and the connection through hole. Electronic devices. 15. The electronic device according to claim 14, wherein the semiconductor device has a concave hole for mounting a semiconductor chip on the TAB tape, and the semiconductor chip is inserted into the concave hole via an adhesive. An electronic device characterized by being fitted. 16. An electronic device having a wiring board on which a semiconductor device is mounted, wherein the semiconductor device is formed on a TAB tape on which a semiconductor chip is mounted via an adhesive, and on a side opposite to the semiconductor chip mounting surface of the TAB tape. And a connection through-hole provided on the TAB tape for electrically connecting the semiconductor chip and the land, and a connection through-hole provided in the connection hole and electrically connected to the land. A conductive bump, a bonding wire for electrically connecting the semiconductor chip and the conductive bump, and at least the semiconductor chip, the bonding wire, and the conductive bump provided on the semiconductor chip mounting surface side of the TAB tape. An electronic device comprising: an insulating resin that seals the electronic device.