JP2001251039A - Glass substrate, its manufacturing method and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a glass substrate wherein adhesion between glass and wiring patterns is superior and one circuit can be formed by using wiring patterns formed on both surfaces, a manufacturing method of the glass substrate and a semiconductor device. SOLUTION: In the glass substrate 10, trench parts 12 which correspond to arrangement of the wiring patterns and have depth which is at least one-half of the glass substrate 10 are formed on both surfaces of a glass plate 11. Wiring patterns 14a, 14b are formed on the respective surfaces so as to be buried in the trench parts 12. Thereby the wiring patterns 14a, 14b are electrically connected with each other, and the one circuit can be formed by using the wiring patterns 14a, 14b. It is also possible that a penetrating hole is formed in the trench parts 12 with a laser light or the like, and the wiring patterns 14a and 14b are connected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a glass substrate, a method of manufacturing the same, and a semiconductor device, and more particularly to a glass substrate suitable for forming a wiring pattern on both surfaces of a glass substrate.

[0002]

2. Description of the Related Art A glass substrate has been widely used as a kind of a substrate formed of an inorganic material.
There are many uses for D. Recently, for the purpose of reducing the size and weight of electronic devices, devices for forming peripheral circuits are often mounted.

[0003]

In a glass substrate according to the prior art, a wiring pattern is generally formed on the surface of glass by a method such as sputtering. However, when a wiring pattern is formed by this method, the adhesion between the glass and the wiring pattern is not always good. In addition, when wiring patterns are formed on both surfaces of the glass substrate, it is necessary to provide a step of forming a through hole separately from the step of forming the wiring pattern in order to electrically connect them.

Accordingly, the present invention has been made to solve the above-mentioned drawbacks of the prior art, and has good adhesion between glass and a wiring pattern, and electrically connects a laminated semiconductor chip to an external device or the like. It is possible to
It is an object of the present invention to provide a glass substrate that can easily connect wiring patterns formed on both surfaces of the glass substrate, a method for manufacturing the same, and a semiconductor device.

[0005]

In order to achieve the above object, the present invention provides a glass substrate having a wiring pattern formed on at least one surface, the wiring pattern corresponding to the wiring pattern. The glass substrate is formed so as to fill the groove of the glass substrate.

In the present invention thus configured, the area where the wiring pattern and the glass are adhered to each other is increased, so that the adhesion of the wiring pattern is improved.

In the above glass substrate, the wiring patterns are formed on both surfaces of the glass substrate, and the wiring patterns formed on the both surfaces are connected to each other in a through hole formed in the groove. It is characterized by the following.

In the present invention having such a configuration, one circuit can be easily formed by the entire wiring patterns formed on both surfaces of the glass substrate.

The through hole is preferably formed by making the depth of the groove formed on both surfaces of the glass substrate at least half the thickness of the glass substrate. By setting the depth of the groove in this way, a through hole can be easily formed at a portion where the wiring patterns on both surfaces intersect.

In the above-mentioned glass substrate, the groove is formed by etching.

In the present invention having such a configuration, it is possible to easily form a groove corresponding to a fine wiring pattern.

Further, in the above-mentioned glass substrate, the wiring pattern is formed by electroless plating.

In the present invention having such a configuration, wiring can be easily formed on glass.

In the above-mentioned glass substrate, an optical waveguide is formed on the glass substrate.

In the present invention having such a configuration, the glass substrate can be used for optical communication and the like.

Further, in the method for forming a glass substrate,
A first step of forming a groove corresponding to a wiring pattern to be formed on at least one surface of a glass plate; and forming a wiring pattern on the surface of the glass plate on which the groove is formed so as to fill the groove. And a second step.

In the present invention configured as described above, it is easy to manufacture a glass substrate having a large area where the wiring pattern and the glass adhere to each other and having good adhesion of the wiring pattern.

In the method of forming a glass substrate, a step of irradiating a predetermined portion of the groove with laser light between the first step and the second step to form an opening in the groove is provided. It is characterized by having. Furthermore, if a step of polishing the surface so as to leave the wiring pattern only in the groove after forming the wiring pattern filling the groove can be performed, the wiring can be left only inside the groove. A glass substrate with a flat wiring pattern can be manufactured.

Similarly, in the manufacturing method according to the present invention, in the method for forming a glass substrate, a first step of forming grooves corresponding to a wiring pattern to be formed on both surfaces of the glass plate; A second step of forming a wiring pattern by batch electroless plating so as to fill the groove on both surfaces where the groove is formed. In particular, such a configuration has an advantage that the process can be simplified.

In the present invention configured as described above, the material for forming the wiring pattern can be filled in the opening provided in the groove, so that when the wiring pattern is formed on both sides of the glass substrate, the material is formed on both sides. One circuit can be formed with the formed wiring pattern. When the wiring pattern is formed only on one side, the wiring pattern of the glass substrate is formed by providing a medium such as a bump on the side of the opening where the wiring pattern is not formed, such as a bump. It is possible to easily electrically connect an external device disposed on the non-existing side and the wiring pattern.

In addition, in a semiconductor device having at least one semiconductor chip and at least one glass substrate on which the semiconductor chip is mounted, a groove is formed on at least one surface of the glass substrate. And forming a wiring pattern so as to fill the groove.

In the present invention configured as described above, since the area where the wiring pattern and the glass are adhered is increased, the adhesion of the wiring pattern is improved, and the reliability of the semiconductor device is improved.

In the above semiconductor device, the groove is formed by etching.

In the present invention configured as described above, it is easy to form a groove corresponding to a fine wiring pattern.

In the above semiconductor device, the wiring patterns are formed on both surfaces of the glass substrate, and the wiring patterns formed on the both surfaces are connected to each other in a through hole formed in the groove. It is characterized by the following.

In the present invention configured as above, one circuit can be easily formed by the entire wiring patterns formed on both surfaces of the glass substrate.

In the above semiconductor device, an optical waveguide is formed on the glass substrate.

In the present invention configured as described above, the glass substrate can be used for optical communication or the like, and the use of the semiconductor device can be expanded.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a glass substrate, a method of manufacturing the same, and a semiconductor device according to the present invention will be described below in detail with reference to the accompanying drawings.

FIG. 1 is a perspective view schematically showing a glass substrate according to an embodiment of the present invention. FIG. 2 is a cross-sectional view (1) illustrating a manufacturing process of the glass substrate according to the embodiment of the present invention. FIG. 3 is a cross-sectional view (2) for explaining the manufacturing process of the glass substrate according to the embodiment of the present invention. FIG. 4 is a cross-sectional view illustrating a modification of the manufacturing process of the glass substrate according to the embodiment of the present invention. FIG. 4 is a cross-sectional view illustrating a modification of the step of forming an opening in a glass substrate according to the embodiment of the present invention. Also,
FIG. 5 is a cross-sectional view illustrating a modification of the manufacturing process of the glass substrate according to the embodiment of the present invention. Further, FIG.
FIG. 1 is a perspective view schematically showing a semiconductor device according to an embodiment of the present invention.

A glass substrate according to an embodiment of the present invention will be described with reference to FIG. FIG. 1 shows a part of the glass substrate 10, and the wiring pattern 14a is shown as being cut into two at the center thereof. The glass substrate 10 according to this embodiment has a groove 1 corresponding to an arrangement of a wiring pattern on both surfaces of a glass plate 11.
2 are formed. Further, wiring patterns 14a and 14b are formed on the respective surfaces so as to fill the grooves 12. Note that the depth of the groove 12 is half the thickness of the glass substrate 10. Wiring patterns 14a, 14b
Is nickel (Ni).

Further, at the portion where the wiring patterns 14a and 14b intersect, that is, the portion where the groove 12 intersects, the bottom of the groove 14 is opened by the overlap of the two grooves 14, and the opening 16 is formed. Have been. Also,
The wiring patterns 14a and 14b are connected at the opening 16. Therefore, the wiring patterns 14a, 14
b forms one circuit.

According to the above configuration, the glass substrate 10
Since the wiring patterns 14a and 14b are formed so as to fill the grooves 12 formed on the surface of the glass plate 11, the area for attaching the wiring patterns becomes larger than that of a conventional glass substrate having the wiring patterns attached to a flat surface. Thus, the adhesion between the wiring patterns 14a and 14b is improved. Further, since the wiring patterns 14a and 14b are connected at the opening 16, one circuit can be formed by the wiring patterns formed on both surfaces of the glass substrate 11.

The glass plate 11 may be made of any material, such as silicate glass, borosilicate glass, or synthetic quartz glass, as long as it is generally used for manufacturing glass substrates. . In addition, the wiring patterns 14a, 1
4b may be made of other conductive metals such as silver (Ag), copper (Cu), and gold (Au), in addition to nickel.
Further, nickel-gold (Ni-Au), nickel-gold-
A laminate formed by electroless plating or electroplating such as copper (Ni-Au-Cu) may be used. In addition, a conductive resin may be used instead of a metal, or a resin may be filled after forming a metal film.

Further, the wiring patterns 14a and 14b may not be connected. In this case, if the depth of the groove 14 is smaller than half the thickness of the glass plate 11, the opening 16 will not be formed at the intersection of the grooves 14 formed on both sides of the glass substrate 10, so that the wiring patterns 14a, 1
4b is not connected. Further, the wiring pattern may be provided on only one surface of the glass plate 11. Further, a plurality of wiring patterns may be formed such that a plurality of circuits are formed on one surface. Alternatively, the depth of the groove 14 may be smaller than half the thickness of the glass plate 11, and a through-hole may be formed only at a predetermined location by a method described later to connect the wiring patterns 14a and 14b. .

Further, in the glass substrate 10 in which the depth of the groove 14 is smaller than half the thickness of the glass substrate 11,
As will be described later, the opening 16 may be formed by opening the glass plate 11 at a predetermined location using laser light. When the opening 16 is formed in this manner, a step of irradiating a laser beam is required, but the opening 16 can be freely formed at an arbitrary position.

Next, a method of manufacturing a glass substrate according to an embodiment of the present invention will be outlined for each step.

First, as shown in FIG. 2A, a photoresist is applied to both surfaces of the glass plate 11 to form photoresist films 20a and 20b.

Next, as shown in FIG. 2B, exposure, development, and post-baking of the photoresist film 20 (20a, 20b) are performed to form a region for forming a groove of the photoresist film 20, ie, a wiring pattern. Openings 22a and 22b are formed by removing a portion corresponding to a region to be formed.

The processing of the photoresist film 20 and the processing of forming the openings 22 (22a, 22b) after the film formation may be performed one by one. That is, exposure, development, and post-baking are performed after application of the resist on one side to form an opening 22a on one side, and then exposure, development, and post-baking are performed on the other side after application of the resist similarly on the other side. 22b may be formed.

Next, as shown in FIG. 2C, the openings 22a and 22b on both sides of the glass plate 11 are etched.
Are formed in regions corresponding to. By setting the depth of the grooves 12a, 12b to be at least half the thickness of the glass substrate 11, the two grooves 12a, 12b communicate at the intersection. Note that the etching in this case can be performed by wet etching or dry etching, but is preferably performed by wet etching that can be performed relatively easily and in a short time using hydrofluoric acid or the like. The groove 12 may be formed by irradiating the glass plate 11 with a laser beam without performing the steps of applying, exposing and developing a photoresist on the glass plate 11 and the step of etching.

Next, as shown in FIG. 2D, both surfaces of the glass plate 11 are subjected to palladium treatment at once. That is, the glass plate 11 is immersed in a solution of palladium (Pd) colloid, and the catalyst core 42 of palladium is attached to the groove 12 and the photoresist film 20.

Next, as shown in FIG. 2E, the photoresist film 20 is removed, and then electroless plating of nickel is performed to form wiring patterns 14a on both surfaces of the glass plate 11.
14b is formed. At the places where the grooves 12 on both sides intersect, the two-sided patterns 14a and 14b are in a conductive state, and one circuit is formed on both sides.

When the wiring pattern is made finer, the depth of the groove 14 cannot be increased. In such a case, it is preferable that a part of the above steps be changed and performed as described below.

That is, first, as shown in FIG. 3A, resist films 20a, 20b
Then, as shown in FIG. 3B, the photoresist film 20 (20a, 20b) is exposed, developed, and post-baked to remove a portion corresponding to a region where a wiring pattern is to be formed. 22a and 22b are formed. FIG. 3 (C)
As shown in FIG. 5, grooves 12a, 22a, 22b,
12b is formed. Grooves 12 on both sides of glass substrate 11
A portion where a and 12b intersect does not have a through hole as shown.

Then, as shown in FIG. 3D, a laser beam 40 is irradiated. Then, an opening (through hole) 16 is formed in the groove 12. Continuing, FIG.
As shown in (E), the glass plate 11 is made of palladium (P
d) ・ The grooves 12a, 12b are infiltrated with the colloid solution.
Then, a catalyst core 42 of palladium is collectively attached to the photoresist film 20 and the opening 16.

Next, as shown in FIG. 3 (F), the photoresist film 20 is removed, and then both sides of the glass substrate 11 are subjected to electroless plating of nickel at a time to form the wiring patterns 14a and 14b on both sides. Form at the same time. Wiring pattern 1
4 a and 14 b are connected at the opening 16.

FIG. 4 shows steps of another manufacturing method.

First, as shown in FIG. 4A, resist films 20a and 20b are formed on both surfaces of the glass substrate 11, and then, as shown in FIG.
Exposure, development, and post-baking of (20a, 20b) are performed, and portions corresponding to regions where wiring patterns are to be formed are removed to form openings 22a, 22b. As shown in FIG. 4C, the grooves 12a, 1b are formed by etching in regions corresponding to the openings 22a, 22b on both surfaces of the glass plate 11.
2b is formed. Also in the steps up to this point, the openings 22 (22a, 22a) after the photoresist film 20 treatment and film formation are performed.
The formation process of b) may be performed on each side. Next, as shown in FIG. 4 (C), the glass plate 1 is etched.
Grooves 12a, 12b are formed in regions corresponding to the openings 22a, 22b on both surfaces of the first.

Next, as shown in FIG. 4D, the resist films 20a and 20b on both sides are peeled off, and FIG.
As shown in (1), palladium treatment is performed on both surfaces of the glass plate 11 at once. That is, the glass substrate 11 is immersed in a solution of palladium (Pd) colloid, and the catalyst nucleus 42 of palladium is attached to the groove 12 and the photoresist film 20.

Next, as shown in FIG. 4F, electroless plating of nickel is performed on the front surface all at once, and finally, as shown in FIG.
As shown in (G), both surfaces are polished using a polishing method such as CMP (chemical mechanical polishing) until the glass surface of the substrate 11 is exposed in a region other than the wiring portion,
The wiring patterns 14a and 14b are determined on both surfaces of the glass plate 11.

In the above-described example, the wiring pattern is formed by processing both surfaces of the glass substrate 11 collectively. However, as described below, the processing can be performed on each surface.

First, as shown in FIG. 5A, a photoresist is applied to a glass plate 11 and a photoresist film 2 is formed.
0 is formed.

Next, as shown in FIG. 5B, the photoresist film 20 is exposed and developed, and the photoresist film 20 is exposed.
An opening 22 is formed by removing a region corresponding to a region where a groove of 0 is formed, that is, a region corresponding to a region where a wiring pattern is formed.

Next, as shown in FIG. 5C, a groove 12 is formed in a region corresponding to the opening 22 of the glass plate 11 by etching. Note that, as will be described later, when the opening is formed at the intersection of the wiring patterns formed on both surfaces of the glass plate 11, the depth 92 of the groove is set to 2 times the thickness 90 of the glass substrate. In the case where the thickness is made larger than one half and the opening is not formed, the thickness is made smaller than one half of the thickness 90 of the glass substrate. Also,
The groove portion 12 is formed without performing a process of applying, exposing, and developing a photoresist on the glass plate 11 and a process of etching.
It may be formed by irradiating a laser beam.

Next, as shown in FIG. 5D, the glass plate 11 is immersed in a solution of palladium (Pd) colloid, and a catalyst nucleus 42 of palladium is attached to the groove 12 and the photoresist film 20.

Next, as shown in FIG. 5E, the photoresist film 20 is removed, and subsequently, electroless plating of nickel is performed to form a wiring pattern 14a. In the case where the wiring pattern is formed only on one side, the process ends.

Further, as shown in FIG. 6A, a photoresist film 20 is formed on the surface of the glass plate 11 opposite to the surface on which the wiring patterns 14a are formed.

Next, as shown in FIG. 6B, exposure, development and post-baking of the photoresist film 20 are performed to remove a portion corresponding to a region where a wiring pattern is to be formed, thereby forming an opening 22. I do.

Next, as shown in FIG. 6C, a groove 12 is formed in the glass plate 11 by etching. As a result, an opening 16 is formed at the bottom of the groove 12, and the wiring pattern 14a is exposed in the opening 16.

Next, as shown in FIG. 6 (D), the glass plate 11 is immersed in a solution of palladium (Pd) colloid, and the catalyst nucleus 42 of palladium is attached to the groove 12 and the photoresist film 20.

Next, as shown in FIG. 6E, the photoresist film 20 is removed, and then electroless plating of nickel is performed to form a wiring pattern 14b. The wiring patterns 14a and 14b are connected at the opening 16.

In the glass substrate 10 in which the depth of the groove 14 is smaller than half the thickness of the glass substrate 11,
When the wiring patterns 14a and 14b are connected, it is preferable to perform the following as a part of the above-mentioned process with some changes.

That is, first, as shown in FIG. 7A, the wiring pattern 14a is formed on one surface of the glass substrate 11, and the groove 12 is formed on the other surface, that is, as shown in FIG. At a corresponding stage, the groove 12 is irradiated with the laser light 40.

Then, as shown in FIG. 7B, an opening 16 is formed in the groove 12. Subsequently, the glass plate 11 is immersed in a solution of palladium (Pd) / colloid to attach the catalyst core 42 of palladium to the groove 12 and the photoresist film 20.

Next, as shown in FIG. 7C, the photoresist film 20 is removed, and then electroless plating of nickel is performed to form a wiring pattern 14b. The wiring patterns 14a and 14b are connected at the opening 16.

In the case where wiring patterns are formed on both surfaces of the glass substrate and these wiring patterns are connected, the following method may be used for manufacturing the glass substrate.

That is, as shown in FIG. 8A, only the portions serving as contacts for connecting the wiring patterns formed on both surfaces of the glass substrate are shown in FIGS.
Alternatively, it is formed by the method shown in FIG. This allows
The conductive materials 36a and 36b are formed on both surfaces of the glass plate 11 so as to be exposed to the outside.
b is connected via the opening 16.

Next, as shown in FIG.
A palladium / colloidal solution or palladium powder is sprayed onto the wiring pattern formation region including the layer 6a by the industrial inkjet nozzle 38. When palladium powder is sprayed, it is preferable to provide an adhesive or the like that fixes the palladium powder on the glass plate in advance in the wiring pattern forming region.

Next, as shown in FIG. 8C, electroless plating of nickel is performed to form a wiring pattern 14a.

Further, as shown in FIG. 8D, a wiring pattern 14b is formed on the conductive material 36b by the same process.

By the above steps, the wiring patterns 14a,
The glass substrate 10 connected to the opening 14b at the opening 16
Can be formed.

Further, a semiconductor device according to an embodiment of the present invention will be described.

As shown in FIG. 9, the semiconductor device 100
The semiconductor chips 30a, 30b, and 30c are stacked with their active element forming surfaces aligned in the same direction.
The glass substrate 10 is provided on the semiconductor chip 30c in a stacked manner. In addition, the semiconductor chips 30a, 3
Ob and 30c are mutually bonded by insulating resins 32a and 32b. Further, the semiconductor chips 30a, 30
The electrode pads b, 30c (not shown) are formed so as to be exposed on the side surfaces of the semiconductor chips 30a, 30b, 30c, respectively, and are connected to the conductive material 34.

The conductive material 34 is connected to the wiring pattern 14b formed on the glass substrate 10. Also,
An optical waveguide region 18 is formed on the glass substrate 10, and is used for optical communication of a light receiving element and a light emitting element (not shown) provided on the active element forming surface of the semiconductor chip 30c. Further, the wiring pattern 14a is formed on the back surface of the surface on which the wiring pattern 14b is formed, that is, on the surface facing the semiconductor chip 30c. In addition,
The wiring patterns 14a and 14b are mutually connected by the above-described configuration.

According to the embodiment of the present invention described above, the semiconductor chips 30a, 30b and 30c are
4 are connected to the wiring patterns 14a and 14b of the glass substrate via the circuit board 4 to form one circuit as a whole. In addition, since the optical waveguide region 18 is formed on the glass substrate 10, optical communication with an external device is possible by using a light receiving element and a light emitting element (not shown) formed on the semiconductor chip 30c. Therefore, in the semiconductor device 100, electrical connection and optical connection with external devices are possible.

As described above, in the glass substrate 10 according to the embodiment of the present invention, the grooves are provided in the glass plate to increase the connection area between the wiring pattern and the glass plate to enhance the adhesion between them. Therefore, the adhesion of the wiring pattern is better than that of the glass substrate according to the related art. Further, since the wiring patterns are formed on both the front and back surfaces of the glass substrate and the wiring patterns are electrically connected to each other, it is possible to form a complicated and large-scale circuit on a relatively small glass substrate. Further, it is possible to reduce the mounting area of the semiconductor device by using only the glass substrate which can be reduced in size.

[0078]

As described above, according to the present invention, in a glass substrate having a wiring pattern formed on at least one surface, the wiring pattern is formed corresponding to the wiring pattern. Since the structure is formed so as to fill the groove of the glass substrate, the adhesion between the glass and the wiring pattern is improved, and a highly reliable glass substrate can be manufactured. In addition, since the wiring patterns are formed on both surfaces of the glass substrate and the wiring patterns formed on the both surfaces are connected to each other in a through hole formed in the groove, one glass substrate One circuit can be formed by a plurality of wiring patterns formed on both sides of the circuit. As a result, the size of the semiconductor device can be reduced.

[Brief description of the drawings]

FIG. 1 is a perspective view schematically showing a glass substrate according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a first example of a manufacturing process of the glass substrate according to the embodiment of the present invention.

FIG. 3 is a cross-sectional view illustrating a second example of the manufacturing process of the glass substrate according to the embodiment of the present invention.

FIG. 4 is a cross-sectional view illustrating a third example of the manufacturing process of the glass substrate according to the embodiment of the present invention.

FIG. 5 is a cross-sectional view (1) illustrating a fourth example of the manufacturing process of the glass substrate according to the embodiment of the present invention.

FIG. 6 is a sectional view (2) illustrating a fourth example of the manufacturing process of the glass substrate according to the embodiment of the present invention.

FIG. 7 is a cross-sectional view illustrating a fifth example of the manufacturing process of the glass substrate according to the embodiment of the present invention.

FIG. 8 is a sectional view illustrating a sixth example of the manufacturing process of the glass substrate according to the embodiment of the present invention.

FIG. 9 is a perspective view schematically showing a semiconductor device according to an embodiment of the present invention.

[Explanation of symbols]

 10 Glass substrate 11 Glass plate 12 Groove 14a Wiring pattern 14b Wiring pattern 16 Opening 18 Optical waveguide region 20 Photoresist film 22 Opening 30a Semiconductor chip 30b Semiconductor chip 30c Semiconductor chip 32a Insulating resin 32b Insulating resin 34 Conductive material 36a Conductive material 36b ... conductive material 38 ... inkjet nozzle 40 ... laser beam 42 ... catalyst core 90 ... thickness of glass substrate 92 ... depth of groove 100 ... semiconductor device

Claims (14)

[Claims] 1. A glass substrate having a wiring pattern formed on at least one surface thereof, wherein the wiring pattern is formed so as to fill a groove of the glass substrate formed corresponding to the wiring pattern. A glass substrate, characterized in that: 2. The method according to claim 1, wherein the wiring patterns are formed on both surfaces of the glass substrate, and the wiring patterns formed on the both surfaces are connected to each other in a through hole formed in the groove. Item 2. The glass substrate according to Item 1. 3. The glass substrate according to claim 1, wherein the groove is formed by etching. 4. The wiring pattern according to claim 1, wherein said wiring pattern is formed by electroless plating.
The glass substrate according to any one of the above. 5. The glass substrate according to claim 1, wherein an optical waveguide is formed on the glass substrate. 6. A method for forming a glass substrate, comprising: a first step of forming a groove corresponding to a wiring pattern to be formed on at least one surface of a glass plate; and forming a groove on the surface of the glass plate on which the groove is formed. And a second step of forming a wiring pattern so as to fill the groove. 7. The method according to claim 1, further comprising the step of:
The method for manufacturing a glass substrate according to claim 6, further comprising a step of irradiating a predetermined portion of the groove with a laser beam to form an opening in the groove. 8. The glass according to claim 6, further comprising, after forming a wiring pattern filling the groove, polishing the surface so that the wiring pattern remains only in the groove. Substrate manufacturing method. 9. A method for forming a glass substrate, comprising: a first step of forming grooves corresponding to a wiring pattern to be formed on both surfaces of a glass plate; and forming the grooves on both surfaces of the glass plate where the grooves are formed. A second step of forming a wiring pattern by collective electroless plating so as to fill the groove, and a method of manufacturing a glass substrate. 10. A semiconductor device having at least one semiconductor chip and at least one glass substrate on which the semiconductor chip is mounted, wherein a groove is formed on at least one surface of the glass substrate. And
A semiconductor device comprising a wiring pattern formed so as to fill the groove. 11. The semiconductor device according to claim 8, wherein said groove is formed by etching. 12. The semiconductor device according to claim 8, wherein said wiring pattern is formed by electroless plating. 13. The wiring pattern is formed on both surfaces of the glass substrate, and the wiring patterns formed on both surfaces are connected to each other in a through hole formed in the glass substrate. The semiconductor device according to claim 8. 14. The semiconductor device according to claim 8, wherein an optical waveguide is formed on said glass substrate.