JP2001136057A - Differential input circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To stabilize an output of a gate G11 even when a transmitter side LSI is not connected to the differential input circuit. SOLUTION: A gate G12 being a detection circuit that detects a connection state of the transmitter side LSI outputs a noninverted signal and an inverted signal corresponding to the result of comparison between an input signal level and a level of a reference voltage Vref, uses the noninverted signal to apply on/off control to an N-channel MOS transistor(TR) T11 and uses the inverted signal to apply on/off control to a P-channel MOS TR T12. This on/off control controls a connecting state of a termination resistor R13 to a point of a power supply voltage V and a connecting state of a termination resistor R12 to the ground. Since the connection states of the termination registers are changed depending on the connection state of the transmitter side LSI, the output of the differential input circuit can be stabilized even when the transmitter side LSI is not connected to the differential input circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a differential input circuit, and more particularly to a differential input circuit used for signal transmission between cards (circuit packages).

[0002]

2. Description of the Related Art A conventional differential input circuit will be described with reference to FIG. As shown in the figure, a conventional differential input circuit is a differential circuit G having positive and negative phase input terminals.
21 are included. The differential circuit G21 has a positive-phase input terminal and a negative-phase input terminal, and differential signals S11 and S12 are applied to these terminals. Differential circuit G2
1 performs an operation of transmitting the differential signals S11 and S12 to a subsequent circuit (not shown).

In order to terminate the differential signal S11,
A signal line for transmitting the signal includes a resistor R21 having one end connected to the voltage V and a resistor R22 having one end connected to the ground.
And are connected. Similarly, to terminate the differential signal S12, a signal line transmitting the differential signal S12 is connected to a resistor R23 having one end connected to the voltage V and a resistor R24 having one end connected to the ground. That is, the resistor R21 and the resistor R22 constitute a termination circuit of the signal S11,
23 and the resistor R24 constitute a termination circuit of the signal S12.

[0004]

Now, consider the case where the terminal potentials of the two differential signals S11 and S12 are set to be equal in the conventional differential input circuit shown in FIG. In this case, an unillustrated transmitting LSI (Large Scale In)
If the integrated circuit is not connected to the input side, 2
There is a problem that two differential signals become equipotential and the output of the differential circuit G21 becomes unstable.

[0005] That is, as shown in FIG. 4, the LSI 1,
When the LSI 2 is mounted, there is no problem as long as the transmission LSI 2 is connected to the input side of the differential input circuit of the reception LSI 1. However, when the transmission-side LSI 2 is not connected, such as when the circuit package is not inserted into the slot, the two differential signals have the same potential, and the output of the differential input circuit of the reception-side LSI 1 becomes unstable. . A case where this operation becomes unstable will be described with reference to FIGS.

In the termination circuit, a resistor R21 and a resistor R22
And the resistance R23
When the terminal potential (similarly, VT) set by the resistor R24 and the resistor R24 is equal, as shown in FIG. 5, both of the two differential input signals operate around the terminal potential VT. Become. However, when the transmitting LSI is not connected,
Since the two differential signals have the same potential (VT), there arises a problem that the output of the differential circuit (G21) becomes unstable.

In order to solve this problem, it is conceivable to take measures to set different termination potentials for the two differential signals S11 and S12. That is, by changing the terminal potential, the setting is made so that a potential difference is generated between the terminal potentials of the two differential signals when the transmission side LSI is not connected. By setting the voltage levels to different values VT1 and VT2 so as to generate a potential difference between the terminal potentials of the two differential signals, operation instability is eliminated.

However, when the terminal potentials are set to different values as described above, since there is a potential difference between the terminal potentials of the two differential signals, as shown in FIG. Changes in width, reduction in noise margin, and the like occur. Such a change in the pulse width and a decrease in the noise margin are serious problems in a high-speed waveform, and have a disadvantage that they cannot be tolerated.

The present invention has been made to solve the above-mentioned drawbacks of the prior art, and has as its object the purpose of
It is an object of the present invention to provide a differential input circuit capable of stabilizing the output without causing any other problem even when is not connected.

[0010]

A differential input circuit according to the present invention includes a terminating resistor for terminating a positive-phase signal and a negative-phase signal constituting a differential signal to a predetermined potential, respectively, and a transmission for transmitting the differential signal. A control circuit that changes a connection state of the terminating resistor when the side circuit is not connected to the input side of the own circuit and sets a terminating resistance value for the positive-phase signal and the negative-phase signal to a different value. Features. The control circuit includes a switching element provided between the terminating resistor and the predetermined potential, and a detection circuit that detects a connection state of the transmission side circuit by comparing an input signal level of the own circuit with a predetermined reference level. Wherein the on / off control of the switching element is performed according to the connection state detection result. Note that a MOS transistor or the like in which the output of the detection circuit is applied to a gate terminal may be used as the switching element.

The detection circuit outputs a positive-phase signal and a negative-phase signal corresponding to a result of the comparison between the input signal level and the reference level.
The connection state of the terminating resistor to the predetermined potential is controlled by turning on / off an OS transistor and turning on / off a P-channel MOS transistor by the negative-phase signal. Further, the detection circuit outputs a reverse-phase signal corresponding to a result of comparison between the input signal level and the reference level, and controls the P-channel MOS transistor to be on / off by the reverse-phase signal. The connection state of the terminating resistor may be controlled. Note that the reference level is a value between a value corresponding to a low level of the input signal level and zero volt.

In short, the present circuit changes the connection state of the terminating resistor according to the connection state of the transmission side LSI,
Even when the transmission side LSI is not connected, the output is stabilized.

[0013]

Next, an embodiment of the present invention will be described with reference to the drawings. In the drawings referred to in the following description, the same parts as those in the other drawings are denoted by the same reference numerals.

FIG. 1 is a block diagram showing an embodiment of a differential input circuit according to the present invention. In FIG.
11 and the signal S12 are differential signals input to the differential input circuit. Resistance R11, resistance R12 and N-channel MO
An S (Metal Oxide Semiconductor) transistor (hereinafter abbreviated as an N-channel transistor) T11 is a signal S1
1 and a resistor R13, a resistor R14 and a resistor R13.
A channel MOS transistor (hereinafter abbreviated as a P-channel transistor) T12 forms a termination circuit of the signal S12.

The gate G11 is connected to the signal S11 and the signal S1.
This is a differential circuit having 2 as an input. The gate G12 compares the signal S12 with the reference voltage Vref, and turns on the N-channel transistor T11 and the P-channel transistor T12.
It functions as a control circuit that turns N or OFF. That is, the gate G11 is a detection circuit that detects the connection state of the transmission side LSI by comparing the input signal level with the predetermined reference level, and controls on / off of a transistor as a switching element according to the connection state detection result. It is.

In the present differential input circuit configured as described above, two differential signals can be terminated at the same potential (VT). In addition, even when the transmission side LSI is not connected, 2
A potential difference can be generated between the two differential signals. As a result, the above-mentioned disadvantages of the prior art can be solved.

That is, in the termination circuit, the termination potential (VT) set by the resistors R11 and R12 is made equal to the termination potential (VT similarly) set by the resistors R13 and R14. As shown in FIG. 5, both of the two differential input signals operate around the terminal potential VT. Further, two differential signals generated when the transmission side LSI is not connected have the same potential (V
T), the problem that the output of the gate G11 as a differential circuit becomes unstable can be solved.

Here, the signal S21 and the signal S22 are LVPECL (Low Voltage) used for high-speed transmission.
e Positive Emitter Couple
dLogic) signal. LVPECL is a signal level in which the termination potential is set to about 1.3 V, the HIGH level is about 2.4 V, and the LOW level is about 1.6 V by the termination circuit.

When the transmission side LSI is not connected, the signal S12 becomes 0 V by the resistor R14. For this reason,
When the reference potential Vref is set to 0.5 V, the N-channel transistor T11
And the P-channel transistor T12 remains OFF. Then, the signal S12 becomes 0 V, the signal S11 becomes the power supply voltage V, and a potential difference occurs between the two differential signals, so that the output of the differential circuit G11 is stabilized.

On the other hand, when the transmission side LSI is connected, the signal S12 is supplied to the reference potential Vref by the resistor R14.
0.5V. However, in this case, 0
V is terminated by a resistor R14.
Although it may fall below the OW level of 1.6 V, it is sufficiently high for 0.5 V. in this way,
The reference potential Vref is set to a value between the value corresponding to the LOW level of the input signal level and zero volt.

Therefore, the N-channel transistor T11 and the P-channel transistor T12 are turned on by the gate G12 which is a control circuit. When the N-channel transistor T11 and the P-channel transistor T12 are turned on, the signal S11 is generated by the resistors R11 and R12, and the signal S12 is generated by the resistors R13 and R14.
This is the general termination method described above. In this case, the terminal potential is about 1.3V.

As described above, by adopting the circuit configuration of FIG. 1, two differential signals can be terminated at the same potential (VT). Can cause a potential difference. Therefore, a stable output can be obtained regardless of the connection state of the transmission side LSI.

FIG. 2 shows another embodiment of the present invention. The circuit shown in FIG.
The channel transistor T11 is replaced with a P-channel transistor T51. Then, the transistors T51 and T12 are turned on using the gate 13 as a control circuit.
It is controlled to the state or the OFF state.

In the case of FIG. 1, a gate G12 serving as a detection circuit
Outputs a positive-phase signal and a negative-phase signal corresponding to the comparison result between the input signal level and the reference level, and outputs N
The on / off control of the channel MOS transistor and the on / off control of the P-channel MOS transistor by the negative-phase signal control the connection state of the terminating resistor to the power supply voltage V or the ground. On the other hand, in the case of FIG. 2, the gate G12, which is a detection circuit, outputs an anti-phase signal corresponding to the comparison result between the input signal level and the reference level,
The connection state of the terminating resistor to the power supply voltage V or the ground is controlled by controlling the ON / OFF of the P-channel MOS transistor by the reverse phase signal.

As described above, the gate 13 as the control circuit
Using a control signal output from the gate (G12 in FIG. 1), a termination circuit (R11 and R12, R13 and R14 in FIG. 1) with resistors R51 and R52 and resistors R53 and R54 is turned on by a transistor. Or OF
It is controlled to the F state. It is apparent that similar effects can be obtained by using a switching element or a switching circuit which can be electrically connected or disconnected without being limited to the transistor.

As described above, in the conventional differential input circuit, when the two differential signals are at the same potential, the differential circuit having the two differential signals as inputs when the transmission side LSI is disconnected. This causes a problem that the output of the circuit becomes unstable.

For this reason, by changing the terminal potential, the transmission-side LSI
May be set (VT1 and VT2) so as to take a countermeasure such that a potential difference occurs between the terminal potentials of the two differential signals when the outputs are not connected. However, in this case, since there is a potential difference between the terminal potentials of the two differential signals, a difference in signal level causes a change in pulse width, a reduction in noise margin, and the like as shown in the waveforms of FIG. The change in the pulse width and the decrease in the noise margin are unacceptable in high-speed waveforms.

In contrast, in the present invention, the two differential signals can be terminated at the same potential (VT),
Since a potential difference can be generated between the two differential signals even when the output of the SI is not connected, the above-described problem in the conventional differential input circuit can be solved.

In the above, the case where the transmitting side LSI is not connected to the input side has been described. However, the present invention is not limited to this, and the present invention can be applied to the case where the power of the transmitting side LSI is off. That is, even if the transmitting-side LSI is connected, the above-described problem similarly occurs when the power is off, and thus the present invention can be solved by applying the present invention.

[0030]

As described above, according to the present invention, the transmission side L
By changing the connection state of the terminating resistor according to the connection state of the SI, even when the transmission side LSI is not connected,
This has the effect of realizing a differential input circuit capable of stabilizing the output.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a differential input circuit according to an embodiment of the present invention.

FIG. 2 is a diagram showing a configuration of a differential input circuit according to another embodiment of the present invention.

FIG. 3 is a diagram showing a configuration of a conventional differential input circuit.

FIG. 4 is a diagram illustrating a connection relationship between an LSI including a differential input circuit and another LSI.

FIG. 5 is a waveform chart showing an operation of the differential input circuit.

FIG. 6 is a waveform diagram showing an operation of a conventional differential input circuit when a transmission side LSI is not connected.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Receiving side LSI 2 Transmission side LSI G11-G13 Gate G21 Differential circuit R11-R14 R21-R24 R51-R54 Resistance T11, T12, T51 Transistor

Claims (6)

[Claims] 1. A terminating resistor for terminating a positive-phase signal and a negative-phase signal constituting a differential signal to a predetermined potential, respectively, and a transmitting circuit for transmitting the differential signal is not connected to an input side of the own circuit. A control circuit for changing a connection state of the terminating resistor to set a terminating resistance value for the positive-phase signal and the negative-phase signal to different values. 2. The control circuit according to claim 1, wherein the control circuit compares a switching element provided between the terminating resistor and the predetermined potential with an input signal level of its own circuit and a predetermined reference level to determine a connection state of the transmission side circuit. 2. A differential input circuit according to claim 1, further comprising a detection circuit for detecting the connection state, wherein the switching element is controlled to be turned on and off in accordance with the connection state detection result. 3. The differential input circuit according to claim 2, wherein said switching element is a MOS transistor to which an output of said detection circuit is applied to a gate terminal. 4. The detection circuit outputs a positive-phase signal and a negative-phase signal corresponding to a result of comparison between the input signal level and the reference level, and outputs an N-channel MOS signal according to the positive-phase signal.
4. The difference according to claim 3, wherein the on / off control of the transistor and the on / off control of the P-channel MOS transistor by the opposite-phase signal control the connection state of the terminating resistor to the predetermined potential. Dynamic input circuit. 5. The detection circuit outputs a negative-phase signal corresponding to a result of comparison between the input signal level and the reference level, and controls the P-channel MOS transistor on / off by the negative-phase signal to obtain the predetermined potential. 4. The differential input circuit according to claim 3, wherein a connection state of the terminating resistor to the terminal is controlled. 6. The differential input according to claim 2, wherein the reference level is a value between a value corresponding to a low level of the input signal level and zero volt. circuit.