JP2001124872A - Electronic clock with power saving function - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve such problem on an electronic clock to be put into a power saving condition by detecting non-power generation that a timer times up with the continuous detection of the non-power generation for switching from a non-power saving condition to a power saving condition and the continuous detection of the non-power generation is also required until a pointer stop position is reached to possibly cause the increase of a consumed current with the detection of power generation. SOLUTION: The pointer stop position is provided where a pointer is stopped in the power saved condition. The detection of power generation during non- power saving is carried out from a preset time before reaching the pointer stop position to a time when reaching the pointer stop position. A pointer position where a timer times up with the continuous detection of non-power generation is the pointer stop position where the power saving condition is established.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an electronic timepiece with a power saving function.

[0002]

2. Description of the Related Art First, the prior art will be described. An electronic timepiece with a power saving function is a known technique. An appropriate publicly known document that discloses this technique is Japanese Patent Publication No. Hei 5-60075 filed by the present applicant.

In the configuration of the embodiment shown in FIG. 1 of the publication, 10 is a charging device, 11 is a solar cell, 12 is a diode, 13 is a resistor, 14 is an oscillating circuit, 15 is a frequency dividing circuit,
6 is a hand operation pulse generation circuit, 17 is a fast-forward pulse generation circuit, 18 is a pulse motor drive circuit, 19 is a pulse motor, 20 is a display device, 20a is an hour hand, 20b is a minute hand,
1 is a voltage detection circuit, 22 is a display control circuit, 23 is a hand movement pulse storage circuit, 24 is a zero detection circuit, 25 is an RS flip-flop, 26, 27 and 29 are AND gates, 28 is O
R gate, 30 is an illuminance detection circuit, 31 is a timer, 32
Is an RS flip-flop, and 33 is a pulse circuit.

[0004] In the description of the operation, if the wearer removes the electronic watch from his / her wrist and pulls it out of the desk and leaves it for a while in a state where charging is not being performed, if the incidental light disappears due to being left unattended At the same time when the charging of the charging device 10 is stopped, the output signal Sl of the illuminance detection circuit 30 becomes “0”.
And the AND gate 29 is turned off, and the timer 31 starts operating. And 30 after leaving
When the minute has elapsed, the end signal Pe is generated from the timer 31, and the output terminal QB is inverted to “0” by setting the RS-FF 32, and the AND gate 27 is turned off.
To As a result, the switching operation is performed when the control terminal C of the signal switching circuit 22 becomes “0”, the hand operation pulse φt is selectively output to the output terminal O2, and the UD counter 23 is output.
, And starts counting. That is, after 30 minutes have passed since the light incidence on the solar cell 11 has stopped, the charging device that is no longer charged by stopping the driving of the pulse motor 19 and counting and storing the hand operation pulse φt generated during this time in the UD counter 23. The power consumption is kept as low as possible and the time information is maintained.

However, in this conventional example, after the output signal Sl of the illuminance detection circuit 30 is first inverted to "0",
The drive of the pulse motor 19 was stopped after the elapse of 0 minutes, but the stop position was not constant. Therefore, apart from the case where it is left in the drawer of the desk as in this conventional example, if it is dark but the eyes can be seen when the eyes become clear, such as at night, the stop position is not constant. There was a problem of not knowing that it had failed.

[0006] As a publicly known document which discloses a technique for solving this problem, Japanese Patent Application Laid-Open No. 9-304555 is cited.

In the configuration of the embodiment shown in FIG. 1 of the publication, reference numeral 1 denotes an electronic timepiece, 2 denotes a first motor for moving a second hand, 3
Is a second motor for moving the hour hand and the minute hand, 5 is an oscillation frequency dividing circuit, 6 is a monitoring circuit, 10 is a first control block for controlling the first motor 2, and 20 is a second control block for controlling the second motor 3. 2 control blocks, 11 and 21 are drive circuits, 12 and 2
2 is a control circuit, 13 and 23 are timers, 15 and 25 are first counters, 16 and 26 are second counters, 17 is a display counter, 30 is a power supply block composed of a power generator 31 and a power storage device 32, 51 is a second hand and 55 is a crown.

In the description of the operation, the first control block 10
Is provided with a timer 13 which starts counting when it receives a signal Φ5 indicating from the monitoring circuit 6 that the power supply voltage has decreased due to a decrease in the generated power level.
Outputs a signal to the control circuit 12 when a predetermined time is measured (time-up). On the other hand, a signal Φ5 indicating that the power supply voltage has been restored from the monitoring circuit 6 before the time is up.
When receiving (bar), the timer stops counting and resets the counting time. Upon receiving the time-up signal from the timer 13, the control circuit 12 receives the display position counter 1
7 is confirmed, and when the counter 17 becomes 0, the drive circuit 11 is stopped and the operation of the motor 2 is stopped. The display position counter 17 is a 60-digit counter, and the position of the second hand 51 is always reflected by the movement pulse of the second hand 51. The display position counter 17 can be reset by the crown 55. If the display position counter 17 is reset at the position where the second hand is at 12 o'clock, after the timer 13 times out, the display position counter 17 is reset.
Becomes 0, that is, when the second hand reaches the 12 o'clock position, the motor 2 for driving the second hand is stopped. For this reason,
In the electronic timepiece 1 of the present example, the movement of the second hand can be stopped at the position specified by the user at the time of power saving, so that it can be determined that power saving is being performed.

In the prior art example, the stop position of the second hand 41 is fixed, so that the problem of not knowing whether power is being saved or whether the malfunction has occurred has been solved. However, in this conventional example, in order for the second hand 41 to enter the power saving state at the stop position, the monitoring circuit 6 first detects the generated power level until the timer 13 times out, and the content of the display position counter 17 becomes zero. Had to continue until. Therefore, when the power saving operation is started in the shortest time, the content of the display position counter 17 becomes 0 immediately after the timer 13 has timed out. 17 is 0. That is, when the power saving operation is performed for the longest time, the monitoring circuit 6 needs to continue detecting the generated power level until the next display position counter 17 reaches 0 after the timer 13 times out.
There is a problem that the monitoring circuit 6 is operated uselessly and the current consumption increases.

[0010]

SUMMARY OF THE INVENTION An object of the present invention is to provide an electronic timepiece with a power saving function, and particularly to provide an efficient power generation detection system.

[0011]

Means for Solving the Problems A power generating means has an oscillation circuit, a frequency dividing circuit, a waveform shaping circuit, a motor driver circuit, and a time display section, and charges the energy generated by the power generating means to a power storage means as a drive source. In an electronic timepiece having power generation detecting means for detecting whether power is being generated or not generating power, a function of stopping a pointer for power saving when non-power generation is detected, and a means for counting real time during power saving and correcting during non-power saving. ,
A pointer stop position where the pointer stops when power is saved, a timer that operates from a predetermined time before the pointer stop position to the pointer stop position, and a timer that operates the power generation detection unit when power is not saved and always operates when power is saved. Power generation detection control circuit that controls the pointer in the same manner as above, and the power saving control that stops the pointer at the pointer stop position when non-power generation is continuously detected during non-power saving timer operation, and returns the pointer from the pointer stop position when power generation is detected during power saving. A circuit is provided. The hand that stops during power saving is a second hand. Pointer stop position is 0
It is a second position. The timer is set to be within 60 seconds. Return from pointer stop position is 1
It is characterized by high-speed hand movement at Hz or higher.

[0012]

FIG. 1 is a circuit diagram of an embodiment of the present invention.

First, the configuration will be described. 1 is a second hand, 2 is a minute hand, 3 is an hour hand, 4 is a power generation means, 5 is a power storage means, and 6 is a backflow prevention means. 10 is an oscillation circuit, 11 is a frequency dividing circuit, 1
2 is a current second counter in 60 base, 13 is a second waveform shaping circuit, 14 is a second motor driver, 15 is a second hand position counter in 60 base, 16 is a first waveform shaping circuit, 17 is a first motor driver, 18 Is a mismatch circuit for detecting a mismatch between the current second counter 12 and the hand position counter 15, and 19 is a power generation detection permission circuit for detecting 50 to 0 seconds of the current second counter 12. 20 and 21 are AND gates, 22 is a selection circuit for switching and selecting the input of the needle position counter 15 and the first waveform shaping circuit 16, a 64 Hz signal for fast-forwarding at the A input, and a 1 Hz signal via the AND gate 20 at the B input. , Φ input is a selector in which a signal from the AND gate 21 is input,
When the Φ input is “0”, the B input is selectively output from the Q output when the Φ input is “1”. 23 is AND gate, 24 and 2
5 is an OR gate, 26 is an inverter, 27 is a timer whose operation is permitted by the power generation detection permission circuit 19, a signal from the AND gate 23 is input to the Φ input, and an OR gate 25 is input to the R input.
, Is counted up by 10 counts, and a time-up signal P27 is output from the Z output.
Numeral 28 is a power generation detecting means for detecting power generation / non-power generation of the power generating means 4.
When a signal is input to the S input, the signal is "1" level from the Q output, and when the signal is input to the R input, the signal is "0" level, the QB output is a "0" level. Thus, a signal of "1" level is output.

Next, the operation will be described. First, at the initial time, the current second counter 12 and the second hand position counter 1 are used.
5, timer 27 and latch 29 are reset (not shown)
Is done. Since the second counter 12 and the second hand position counter 15 are currently coincident with each other, the non-coincidence circuit 18 outputs a "0" level non-coincidence signal P18. In addition, Z of timer 27
The output is at "0" level, the Q output of the latch 29 is at "0" level, and the QB output is at "1" level. Q of latch 29
Since the B output is at the “1” level, the AND gates 20 and 21 output the 1 Hz signal from the frequency divider 11 and the mismatch signal P 18 from the mismatch circuit 18 as they are. Since the “0” level signal from the AND gate 21 is input to the Φ input of the selection circuit 22, a 1 Hz signal from the B input via the AND gate 20 is selectively output.

Next, the normal state will be described. Current second counter 12, second hand position counter 15, and first waveform shaping circuit 1
6 receives a 1 Hz signal from the frequency dividing circuit 11. Since the second counter 12 and the second hand position counter 15 are currently coincident with each other, the non-coincidence circuit 18 outputs a "0" level non-coincidence signal P18. Subsequently, a 1 Hz signal from the B input via the AND gate 20 is selectively output. Is done. 1
The Hz signal reaches the second hand 1 via the first waveform shaping circuit 16 and the first motor driver 17, and the second hand 1 moves by one second.

When the second hand 1 reaches 50 seconds by the one-second hand movement, the current second counter 12 also counts 50 at the same time.
The power generation detection permission circuit 19 detects 50 counts of the current second counter 12 and starts outputting an operation permission signal of “1” level. The power generation detection permission circuit 19 outputs an operation permission signal of “1” level until the second hand 1 reaches 0 second, that is, until the current second counter 12 detects 0 count. While the operation permission signal is at the “1” level, the operations of the power generation detecting means 28 and the timer 27 are permitted.

If the power generation detecting means 28 continuously detects non-power generation while the operation permission signal is at the "1" level, the timer 27 outputs a "0" level signal to the R input and an AND gate 2 to the Φ input.
Input 1Hz signal through 3 and count 1 in 51 seconds 5
2 counts in 2 seconds 9 counts in 59 seconds, 10 counts in 0 seconds, and a time-up signal P27 is output at the 0 second position. The latch 29 has a time-up signal P2
Since the signal 7 is input, a "0" level signal is output from the QB output, the 1 Hz signal is stopped by the AND gate 20, and the second hand 1 stops moving for one second at the 0 second position to enter a power saving state.

As described above, when the operation permission signal is at the "1" level and the power generation detecting means 28 detects power generation on the way, the timer 27 inputs a "1" level signal to the R input in the middle of 10 counts. Therefore, the time-up signal P27 is not output at the 0 second position. The latch 29 outputs a "0" level signal from the Q output and a "1" level signal as it is from the QB output, and the second hand 1 continues to move for one second.

In the power saving state, the Q output of the latch 29 outputs a "1" level signal.
4, the power generation detecting means 28 is always in an operation permission state. In this state, when the power generation detecting means 28 detects power generation, the Q output of the latch 29 becomes "0" level, and the QB output becomes "1" level. The operation permission of the power generation detecting means 28 is released, and the operation of the AND gates 20 and 21 is permitted. Since the contents of the current second counter 12 and the second hand position counter 15 do not match, the AND gate 21 outputs a "1" level mismatch signal P18 from the mismatch circuit 18. The AND gate 21 outputs a “1” level signal, and the selector 2
2 selects a 64 Hz fast-forward signal on the A input side, and the second hand position counter 15 and the second hand 1 are fast-forwarded at 64 Hz. When the content of the current second counter 12 and the content of the second hand position counter 15 match, the second hand 1 returns to the current second.

At the same time, a non-coincidence signal P18 of "0" level is output from the non-coincidence circuit 18, the output of the AND gate 21 becomes a signal of "0" level, and the selector 22 selects the 1 Hz signal on the B input side, and the second hand The position counter 15 and the second hand 1 are supplied with 1 Hz, and the second hand 1 starts moving for one second.

As described above, in the electronic timepiece with a power saving function of the present invention, the non-power generation is continuously detected when the power is not saved, and the pointer position at which the timer 27 times up is the pointer stop position.

[0022]

According to the present invention, it is possible to realize an electronic timepiece with a power saving function that detects power generation efficiently when power is not saved.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of an embodiment of the present invention.

[Explanation of symbols]

 1 second hand 2 minute hand 3 hour hand 4 power generation means 5 power storage means 6 backflow prevention means 10 oscillation circuit 11 frequency dividing circuit 12 current second counter 13 second waveform shaping circuit 14 second motor drive circuit 15 second hand position counter 16 first waveform shaping circuit 17 First motor drive circuit 18 Mismatch circuit 19 Power generation detection permission circuit 20 AND gate 21 AND gate 22 Selector 23 AND gate 24 OR gate 25 OR gate 26 Inverter 27 Timer 28 Power generation detecting means 29 Latch

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2F001 AA05 AB01 AD00 AE03 AG02 AG16 AH03 2F082 AA01 CC01 DD04 FF01 FF06 HH00 HH01 JJ00 2F084 AA07 GG04 HH15 HH16 HH21 JJ01 JJ06

Claims (5)

[Claims] An energy storage device includes an oscillating circuit, a frequency dividing circuit, a waveform shaping circuit, a motor driver circuit, and a time display unit. In an electronic timepiece having power generation detection means for detecting whether power is not being generated, a function of stopping a pointer for power saving when non-power generation is detected, and means for counting the actual time of power saving and correcting for non-power saving, Stop position, a timer that operates from a predetermined time before the pointer stop position to the pointer stop position, and a power generation detection control circuit that controls the power generation detection means to operate at the time of the timer operation when power is not saved. When detecting non-power generation continuously during timer operation during non-power saving, the pointer stops at the pointer stop position, and when power generation is detected during power saving, the pointer returns from the pointer stop position. Power saving function-equipped electronic timepiece, characterized in that a power-saving control circuit. 2. The electronic timepiece with a power saving function according to claim 1, wherein the hand that stops during power saving is a second hand. 3. The electronic timepiece with a power saving function according to claim 1, wherein the pointer stop position is a 0 second position. 4. The electronic timepiece with a power-saving function according to claim 1, wherein the timer is set within 60 seconds. 5. The electronic timepiece with a power saving function according to claim 1, wherein the return from the pointer stop position is a high-speed hand movement of 1 Hz or more.