JP2001175222A - Ac type pdp device having small number of wiring between signal processing substrate and panel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a size and weight by decreasing the number of electronic parts used for a substrate mounted with signal processing circuits, etc., for driving the panel section of an AC type PDP device and further decreasing the number of wirings between the substrate and the panel. SOLUTION: The driver IC to be exclusively of used which adapts itself to the driving of the panel section of the AC type PDP device and the memory to be exclusively used for the same are used and further, the driver IC is arranged at the outer edge of the panel.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The number of electronic components of an image signal processing circuit, a scanning signal circuit, and a high-voltage FET power supply switching circuit is reduced.
In addition, a board on which these electronic components are mounted and an AC type PDP
Reliable AC with few connection wires between glass panels
Type PDP device.

[0002]

2. Description of the Related Art A standard configuration of an AC type PDP will be described with reference to FIG. FIG. 5 (c) shows a state in which the front glass substrate 1 and the rear glass substrate 8 of the two glasses of the screen display panel are opened, and as shown in FIGS. 5 (a) and 5 (b). 1 and the back glass substrate 8 are installed in parallel and opposed to each other. Below the front glass substrate 1, a first composite electrode 4 (first electrode) extending in the horizontal direction of the screen and comprising a transparent electrode 2 such as an ITO film and a metal electrode 3 serving as a bus bar is disposed next to the first composite electrode 4 (first electrode). And a plurality of second composite electrodes 4 ′ (second electrodes) each including a transparent electrode 2 ′ and a metal electrode 3 ′ serving as a bus bar are disposed at a predetermined first pitch as a pair of display electrode cells. A transparent dielectric 5 is formed so as to cover them, and a thin protective film 7 is formed thereon. Note that there is a black stripe region 13 between the display electrode cell and an adjacent cell. On the other hand, on the rear glass substrate 8, a plurality of rear barrier ribs 11 extending in the vertical direction of the screen are provided at a predetermined second pitch.
A back electrode 9 (third electrode) is provided along each intermediate part of the first electrode 1. Here, the front glass substrate 1 and the rear glass substrate 8 are arranged so that the first and second composite electrodes 4 and 4 ′ and the back electrode 9 for addressing are orthogonal to each other, and cover the back electrode 9. A white dielectric 1 is disposed on a side wall and a bottom surface of a rear partition 11 on which a white dielectric 10 is disposed.
The phosphor 12 is formed so as to cover 0. The first and second composite electrodes 4, 4 'and the back electrode 9 are arranged with their electrode groups facing each other via a discharge gas space, and the first electrode 4 (first electrode) and the The back electrode 9 (third electrode) performs addressing for charging only cells to emit light, and the first composite electrode 4 (first electrode) and the second composite electrode 4 ′ (second electrode) form a surface. This is a three-electrode surface discharge structure that maintains discharge light emission.

[0003] Such an AC type PDP is disclosed in, for example, JP-A-6-267421 and JP-A-11-65515.

A conventional AC PDP device 5 comprising the AC PDP panel as described above and a substrate for driving the same.
0, the circuit configuration mounted on the external board can be roughly divided into a power supply section, a signal processing section, a high-voltage driving circuit section, and the like. In many cases, a switching regulator is mainly used as a power supply. Although there are problems with the voltage conversion efficiency and the life of the electrolytic capacitor used in the circuit, it is technically established.

The problem here is that many electronic components are used in the signal processing board circuit section, which hinders the reduction of the weight of the AC type PDP device and inevitably increases the cost. The point is that they are raised. 3 and 4
FIG. 1 shows a typical conventional AC type PDP device 50. FIG. 3 is a developed external view, and FIG. 4 is a block diagram showing the structure of a glass panel and the operation of a substrate. As can be seen from FIG. 3, driver ICs 27, 28 for driving the panel, hybrid IC 22, G / A 31, 34, 35, 3
6, 37, the FET 24, the memory 33, and many other electronic components. These components include a signal processing board 20, a scanning address signal board 19, a discharge sustaining signal board 18, and a data driving board.
It is mounted on the C board 17 and the like. FIG. 4 illustrates the configuration. Reference numeral 40 denotes a glass panel of the AC type PDP shown in FIG.
And is connected to the scanning address drive circuit group 28 on the substrate 19 via the flexible cable 16. Timing controller G / A35 by external signal
The scanning signal driving IC 28 is controlled by the sequence controller G / A 37 controlled by the microprocessor 38.

On the right side of the front glass substrate 1, there is a wiring circuit for the second electrode group 4 ', and the output line of the high-voltage FET power supply switching circuit 29 on the sustaining signal substrate 18 and the second electrode group 4' Are connected via a flexible cable 16.

A wiring circuit for the third electrode group 9 is provided at the upper end of the opposing rear glass substrate 8. In this embodiment, the wiring circuit is connected to the data driving ICs 27 on the ten data driving IC substrates 17 via the flexible cable 16. I showed the case,
There is a tendency to increase with higher definition.

On the other hand, the signal processing board 20 receives a digital RGB signal (n bits for each color) from the input connector 21 and enters the input controller G / A 31. Through the FIFO memory 32, the data signals for one row are sequentially distributed to the general-purpose memory group 33 by the data conversion circuit G / A 34 for each gradation. Next, the data corresponding to each display cell of each row is sequentially called from the general-purpose memory 33 by the data conversion circuit G / A 34, and the output is output to the data drive IC 27 via the flexible cable 16. Therefore, these are connected by many flexible cables 16, and the number of wires between the PDP glass panel 40 and the substrates 17, 18, 19 is about 54 as shown by the broken line 39 in FIG.
With more than 00 lines, reliability is becoming an issue for higher definition. In addition, due to the use of many electronic components, the package cost, the mounting cost for assembling the components on the board, the weight and the area described above also become problems.

[0009]

DISCLOSURE OF THE INVENTION The present invention has been made in view of the above points, and its object is to provide:
The use of dedicated driver ICs and PDP-specific memories in circuit system design greatly reduces the number of electronic components, and reduces the number of wires connecting the board and the glass panel by arranging them on the drive circuit and the PDP glass panel side. AC type PD with a light and thin, reliable circuit configuration
P.

[0010]

In order to solve the above-mentioned problem, the signal processing board of the present invention and A having a small number of wires between panels are used.
A C-type PDP device includes a substrate unit on which at least an image signal processing circuit, a scanning signal circuit, and a high-voltage pulse generating circuit are mounted;
A glass panel having at least a front plate and a back plate forming an AC-type PDP3 electrode surface discharge structure
In the C-type PDP device, the glass panel front plate is formed in a first side outer edge region in a vertical direction of an inner surface thereof, and an end of a first electrode group in a row direction having a width of the three electrodes. A plurality of scanning drive IC chips mounted on an outer edge of a first side thereof for driving the first electrode group via the wiring circuits, the plurality of scan driving IC chips being connected to the respective wiring circuits; A scan receiving IC chip for inputting a scan signal from a substrate and outputting the scan signal to the scan drive IC chip, a wiring circuit for connecting the IC chips in series, and a second side facing the first side A wiring circuit formed in an outer edge region and connected to an end of a second electrode group in a row direction having a width of the three electrodes, wherein the glass panel back plate has a horizontal surface on an inner surface of the back plate. Formed in the outer peripheral region of the side, for addressing in the column direction with the width of the three poles A wiring circuit group connected to the end of the third electrode group, and a plurality of multi-bit shifters mounted on the horizontal outer edge of the wiring group for driving the third electrode group via the wiring circuits. A data driving IC chip with a register function and an image signal rearranged according to a panel display cell row direction arrangement order are input, and the data driving IC
A data receiving IC chip for outputting to a shift register section of the chip; and a wiring circuit for connecting the IC chips in series.
A B image signal is input, and a digital image signal for displaying one field is rearranged into a gradation display in which the digital image signal is divided into n subfields corresponding to each display cell of the panel.
A PDP dedicated memory for rearranging and outputting the subfield data in the panel display cell row direction arrangement order, and inputting rearranged image data of the PDP dedicated memory, and the data reception IC chip and the scan reception I
A data transmission IC for outputting to a C chip, and a high-voltage FET for applying a high-voltage pulse at a predetermined timing and for a predetermined time between the first and third electrodes and between the first and second electrodes via the respective driving circuits. A power supply switching circuit, and a system control gate array for controlling the power supply switching circuit;
From the chip to the data drive IC chip connected in series, all data is sent for each row by each multi-bit shift register function and then latched, and output to the third electrode group, and the third electrode Addressing is performed by a first electrode to charge a corresponding panel display cell, and surface discharge is maintained by the second electrode and the first electrode.

Further, the data driving IC chip, the data receiving IC chip, the scanning driving IC chip, and the scanning receiving IC chip are chip-on-glass.
ss) connecting the lead wire and the wiring circuit by a technique.

The data transmitting IC compresses and outputs the input image data, and the data receiving IC chip and the scanning receiving IC chip input the compressed data,
The image data is restored and output.

[0013]

1 and 2 show an embodiment of an AC type PDP device 100 of the present invention having a small number of connection wires between a signal processing substrate and a glass panel.

FIG. 1 is a developed external view of the AC PDP device 100, and FIG. 2 is a block diagram showing the structure of a glass panel of the AC PDP device 100 and the operation of the substrate. The AC PDP device 100 includes an AC PDP glass panel 80 and a signal processing board 70. The space between them is connected by a flexible cable 66. In FIG. 2, the boundary line 39 between the substrate 70 and the glass panel 80 is indicated by a broken line, but these are connected by flexible cables 66a, b, c, d, and e.

The glass panel 80 includes a front glass substrate 61 and a rear glass substrate 68.

The front glass substrate 61 has a wiring circuit group connected to the ends of the first electrode group 4 extending in the row direction in the first side outer edge region in the vertical direction of the inner surface of the front plate. In order to drive the first electrode group 4 through the wiring circuit group, a plurality of scan driving IC chips 61b are arranged on the glass panel. Further, a scanning signal is inputted from the substrate 70 and the scanning driving IC chip 61 is inputted.
b, a scanning reception IC chip for outputting to
And a wiring circuit for connecting the chips in series.

Further, the front glass substrate 61 is connected to an end of a second electrode group extending in the row direction to another second side outer edge region facing the first side outer edge on the inner surface of the front plate. Wiring circuit to be formed.

The rear glass substrate 68 is provided with a wiring circuit group connected to an end of the third addressing electrode group extending in the column direction in a horizontal outer edge region of the inner surface of the rear plate, and an outer edge of the glass inner surface. And a plurality of data drive IC chips 68b are arranged on the glass panel to drive the third electrode group 9 via the wiring circuit group. Further, a data receiving IC for inputting image signals rearranged according to the panel display cell row direction arrangement order from the substrate 70 and outputting to the shift register section of the data driving IC chip 68b.
A chip is provided, and a wiring circuit for connecting the IC chips 68a and 68b in series is formed.

On the other hand, the signal processing board 70 receives a digital RGB image signal of n gradations and arranges the digital signal for displaying one field into a gradation display for dividing the digital signal into n subfields corresponding to each display cell. PDP dedicated memory 7 for outputting image data in which the subfield data is rearranged according to the arrangement order of the panel display cells in the row direction.
1 and the image data output from the memory 71,
A data transmission IC that outputs to the data reception IC chip 68a and the scanning reception IC chip via a cable, and a high-voltage pulse applied between the first and third electrodes and between the first and second electrodes via each drive circuit. A high-voltage FET power supply switching circuit that outputs a predetermined timing and a predetermined time, and a system control gate array that controls them are mounted.

The flow of image signals as the AC PDP device 100 in which the glass panel 80 is connected to the signal processing board 70 by the flexible cables 66a, b, c, d, and e is as follows.

The image data generated by the signal processing board 70 and rearranged according to the panel display cell row order is sent from the data transmission IC 73 to the data reception IC chip 68a via the flexible cable 66a. It is sent to the scanning reception IC chip 61a via the flexible cable 66b.

The data receiving IC chip 68a includes a plurality of data driving ICs connected in series with the rearranged image data.
Using the multi-bit shift register function provided in each of the C chips 68b, data is sent row by row and latched every time one row has been sent, and output to the third electrode group 9 there.
At the same time, the scanning signal sent to the scanning reception IC chip 61a is sent to the scanning driving IC chip 61b connected in series and selects the first electrode 4 to be addressed. Therefore,
Addressing is performed by the third electrode group 9 and the first electrode to charge the display cells to be discharged, and the surface discharge is maintained by the second electrode group 4 '.

The data drive IC chip 68b, the data reception IC chip 68a, the scan drive IC chip 61b, and the scan reception IC chip 61a are connected to a wiring circuit by a known chip on glass technology. Are connected and formed.

As described above, the number of electronic components can be significantly reduced, and the number of wirings connecting the substrate 70 and the glass panel 80 can be significantly reduced. It compresses and outputs the compressed data to the data receiving IC chip 68
The scanning receiving IC chip 61a receives the compressed data, restores the image data to image data, and uses a known compressed data transmission method of outputting the image data. The number can be about 30.

[0025]

The AC-type PDP device of the present invention having a small number of wires between the signal processing board and the panel has the following effects. (1) By using a dedicated driver IC and a dedicated memory adapted to a circuit system for driving an AC-type PDP glass panel, the number of electronic components can be significantly reduced. The number of connectors can be reduced to achieve a lightweight, thin, and reliable circuit configuration. (2) By directly installing the driver IC on the glass panel substrate, the number of connection wires between the substrate and the glass panel is greatly reduced, thereby improving the reliability as an AC type PDP device, and reducing the size, size, and weight. Can be reduced.

[Brief description of the drawings]

FIG. 1 is a developed external view of an AC type PDP device of the present invention.

FIG. 2 is a block diagram showing the structure of a glass panel of an AC type PDP device of the present invention and the operation of a signal processing substrate.

FIG. 3 is a developed external view of a conventional AC PDP device.

FIG. 4 is a block diagram showing the structure of a glass panel of a conventional AC type PDP device and the operation of its signal processing substrate, scanning signal substrate, and the like.

5 (c) is a perspective view of a standard AC PDP panel opened, FIG. 5 (a) is a cross-sectional view taken along a plane parallel to the rear partition, and FIG. 5 (b) is a cross-sectional view taken perpendicular to the partition. It is.

[Explanation of symbols]

1,61 Front glass substrate (glass panel front plate) 2,2 'Transparent electrode 3,3' Metal electrode, bus electrode 4 First composite electrode (first electrode) 4 'composed of transparent electrode 2 and metal electrode 3 Second composite electrode (second electrode) composed of transparent electrode 2 'and metal electrode 3' 5 Transparent dielectric 7 Protective film (MgO) 8, 68 Back glass substrate (glass panel back plate) 9 Back electrode (third electrode) 10 Electrode 11 Back wall 12 Phosphor 13 Black stripe region 16, 66, 66a-66e Flexible cable 17 Data drive IC board 18 Discharge sustaining signal board 19 Scanning address signal board 20, 70 Signal processing board 21 Input connector ( Digital RGB signals (8 for each color)
Bit) input section) 22 hybrid IC 24 FET 27 data driving IC 28 scanning signal driving IC 29 high voltage FET power supply switching circuit 30 high voltage power supply 31 input controller G / A 32 FIFO memory 33 general purpose memory 34 data conversion circuit G / A 35 timing controller G / A 36 Memory controller G / A 37 Order controller G / A 38 Microprocessor 39 Boundary between substrate and glass panel 40,80 AC-type PDP glass panel 50,100 AC-type PDP device 61a Scanning reception IC chip 61b Scanning drive IC chip 68a Data reception IC chip 68b Data drive IC chip 71 PDP dedicated memory 72 System controller G / A 73 Data transmission IC 79 Power supply input terminal

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09G 3/28 R

Claims (3)

[Claims] An AC signal processing circuit, a scanning signal circuit, and a high-voltage pulse generating circuit;
A PDP device comprising: a glass panel portion having at least a front plate and a rear plate forming a surface discharge structure of a type PDP3 electrode, wherein the front panel of the glass panel portion has a first inner surface in a vertical direction. A wiring circuit group formed in a side outer edge region and connected to an end of the first electrode group in a row direction having a width of the three electrodes; and the first electrode group via the wiring circuits. A plurality of scan drive IC chips mounted on the outer edge of the first side for driving; a scan reception IC chip for inputting a scan signal from the substrate and outputting the scan signal to the scan drive IC chip; A wiring circuit for connecting the IC chips in series, and a wiring circuit formed in a second side outer edge region facing the first side;
A wiring circuit connected to an end of a second electrode group in a row direction having a width of the three electrodes, wherein the rear panel of the glass panel is formed in an outer peripheral area of one side of the inner surface of the rear panel in the horizontal direction. A wiring circuit group connected to an end of the third electrode group for addressing in the column direction having a width of three poles; and a driving circuit for driving the third electrode group via the wiring circuits. A plurality of data drive IC chips with a multi-bit shift register function mounted on the outer edge in the horizontal direction; and input image signals rearranged according to a panel display cell row direction arrangement order; Data receiving IC chips to be output to the
A wiring circuit for connecting C chips in series, wherein the substrate receives a plurality of n-gradation digital RGB image signals and outputs n fields of digital image signals corresponding to each display cell of the panel. A PDP-only memory that rearranges the gradation display to be divided into sub-fields, and further rearranges and outputs the sub-field data according to the arrangement order of the panel display cells in the row direction; type in,
A data transmission IC for outputting to the data reception IC chip and the scan reception IC chip via a cable; and a predetermined timing between the first and third electrodes and between the first and second electrodes via the respective drive circuits. A high-voltage FET power supply switching circuit for applying a high-voltage pulse for a predetermined time; and a system control gate array for controlling the high-voltage power supply switching circuit.
1 to the chip by its multi-bit shift register function
After all the data has been sent for each row, the data is latched and output to the third electrode group, addressing is performed by the third electrode and the first electrode, and the corresponding panel display cell is charged. An AC-type PDP device having a small number of wires between a signal processing substrate and a panel, wherein a surface discharge is maintained between an electrode and a first electrode. 2. The data drive IC chip, the data reception IC chip, the scan drive IC chip, and the scan reception IC chip are Chip on Glass.
2. The AC type PDP device according to claim 1, wherein the lead wire and the wiring circuit are connected by technology. 3. The data transmitting IC compresses and outputs the input image data, and the data receiving IC chip and the scanning receiving IC chip receive the compressed data, restore the image data, and output the image data. 3. An AC having a small number of wires between the signal processing board and the panel according to claim 1 or 2.
Type PDP device.