JP2001169558A - Power supply - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power supply having no possibility of damaging a circuit element due to a current stress even by changing the impedance of a load. SOLUTION: The power supply comprises an inverter 2 having a series circuit of switching elements Q1, Q2 connected between output terminals of a DC power supply circuit 1. Both elements Q1, Q2 are alternately turned ON and OFF according to a drive signal generated by the inverter 4 and a driving circuit 6. A load circuit 3 has an inductor L1, a capacitor C1 and a discharge lamp La, and the frequency of the drive signal is set higher than the resonance frequency of the circuit 3 in a steady state. When the impedance of the lamp L2 is changed so that the resonance frequency of the circuit 3 becomes higher than the frequency of the drive signal, the pause period of the drive signal is changed, a ratio of both pause periods does not become 1:1 and the output of the inverter 2 is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply for supplying power to a load having a variable impedance, such as a discharge lamp.

[0002]

2. Description of the Related Art Conventionally, a circuit configuration as shown in FIG. 14 has been known as a power supply device (discharge lamp lighting device) for supplying power to a load whose impedance changes with time like a discharge lamp. Have been. This power supply device uses an AC power supply AC such as a commercial power supply as a power point, rectifies the AC power supply AC with a rectifier DB such as a diode bridge, and then performs voltage conversion and smoothing by a DC power supply circuit 1 composed of a chopper circuit. The inverter circuit 2 converts the output voltage of the DC power supply circuit 1 into a high-frequency voltage and supplies high-frequency power to a load circuit 3 including a discharge lamp La as a load.

The illustrated DC power supply circuit 1 is a step-up type chopper circuit, and a series circuit of an inductor L3 and a switching element Q3 is connected between DC output terminals of a rectifier DB.
A series circuit of a diode D3 and a smoothing capacitor C0 is connected between both ends of the switching element Q3. A small-capacity capacitor C3 for preventing noise is connected between the DC output terminals of the rectifier DB. The switching element Q3 uses a MOSFET, and is turned on and off by the chopper control circuit 4 at a frequency higher than the power supply frequency of the AC power supply AC.

The operation of the DC power supply circuit 1 having such a configuration is well known, and the electromagnetic energy accumulated by the current flowing from the rectifier DB to the inductor L3 when the switching element Q3 is turned on is used when the switching element Q3 is turned off. By discharging the DC voltage higher than the peak value of the pulsating voltage output from the rectifier DB to the smoothing capacitor C0, the DC voltage is released to the smoothing capacitor C0 via the diode D3.
Is obtained as a voltage between both ends. Further, in the DC power supply circuit 1 having such a configuration, since the input current to the rectifier DB can flow at a high frequency sufficiently higher than the power supply frequency of the AC power supply AC, a filter circuit for blocking high frequency (omitted in the drawing). Is inserted between the AC power supply AC and the rectifier DB, the input current from the AC power supply AC can have a continuous waveform, and the occurrence of harmonic distortion of the input current can be suppressed. Although not shown, the chopper control circuit 4 controls the on-duty of the switching element Q3 so as to keep the output voltage of the smoothing capacitor C0 substantially constant.

On the other hand, the inverter circuit 2 includes a series circuit of two switching elements Q1 and Q2 connected between both ends of a smoothing capacitor C0 as a DC power supply. One switching element (low-potential side switching element)
A load circuit 3 is connected between both ends of Q2. The switching elements Q1 and Q2 are separately-excited and controlled by driving means including an inverter control circuit 5 and a driving circuit 6, and both switching elements Q1 and Q2 are alternately turned on and off at a high frequency.
MOSFETs are used for the switching elements Q1 and Q2. Further, the inverter control circuit 5 outputs a rectangular wave signal of a predetermined frequency from the terminal Vout, and the driving circuit 6 alternately drives the switching elements Q1 and Q2 to the H level from the rectangular wave signal input to the terminal IN so as to drive the switching elements Q1 and Q2. The following two drive signals are generated and output from terminals HO and LO, respectively. Each drive signal is applied to a gate, which is a control terminal of switching elements Q1 and Q2, through resistors R11 and R21, respectively. Inverter control circuit 5 and drive circuit 6
Is supplied from the control power supply circuit 7 for further stabilizing the voltage across the smoothing capacitor C0.

The load circuit 3 comprises a DC cut capacitor C2, a resonance inductor L1, and a discharge lamp L as a load.
a is connected between both ends of the switching element Q2, and a resonance capacitor C is connected in parallel with the discharge lamp La.
1 are connected. As described later, the capacitor C2 is used to convert a DC voltage to a high-frequency voltage, and the capacitor C2 is connected to the switching element Q1,
Q2, the inverter control circuit 5, and the drive circuit 6 constitute the inverter circuit 2. Here, a discharge lamp La having two filaments, such as a fluorescent lamp, is used. An inductor L1 is connected to one end of one filament, and one end of the other filament is connected to the source of the switching element Q2. Further, a capacitor C1 is connected between the other ends of both filaments.

With this configuration, the switching elements Q1,
By switching on / off of Q2, both switching elements Q1, Q2
Is converted into an AC rectangular wave voltage by charging and discharging of the capacitor C2, and the AC rectangular wave voltage is applied to a resonance circuit including the inductor L1, the capacitor C1, and the discharge lamp La. Become. In other words, when the switching element Q1 is turned on, a current flows from the smoothing capacitor C0 to the resonance circuit through the capacitor C2 to charge the capacitor C2, and when the switching element Q2 is turned on, a current flows to the resonance circuit by discharging the capacitor C2. The operating frequency of the inverter circuit 2 (the on / off frequency of the switching elements Q1 and Q2) is set higher than the resonance frequency of the resonance circuit, and performs a so-called slow phase operation.

[0008]

By the way, in the above-described power supply circuit, when the voltage of the AC power supply AC drops, or when the discharge lamp La reaches the end of its life (a state in which the electron emission material of the filament scatters and electrons are not emitted). In this case, since the impedance of the discharge lamp La changes in the rising direction, stress occurs in the switching elements Q1 and Q2, and in some cases, the switching elements Q1 and Q2 may be broken.

The cause of this problem will be described below. The DC power supply circuit 1
Exceeds the control range of the chopper control circuit 4 provided in the AC power supply AC.
The voltage between both ends of 0 also decreases. As a result, the current flowing through the load circuit 3 decreases, and the lamp current flowing through the discharge lamp La decreases. Since a discharge lamp La such as a fluorescent lamp has a negative resistance characteristic, if the lamp current decreases, the lamp voltage increases. That is, the load impedance increases. When the load impedance increases in this way, the resonance curve of the load circuit 3 shifts from the state shown by the solid line to the state shown by the dashed line in FIG. That is, the resonance frequency of the load circuit 3 increases from fo to fo '. As described above, when the resonance frequency of the load circuit 3 increases, the resonance frequency of the load circuit 3 may be higher than the operation frequency fa of the inverter circuit 2, and in this case, the phase shifts to the phase advance mode. As shown in FIG. 16, when the on / off of the switching elements Q1 and Q2 is switched in the phase advance mode (time t1, t2, t3), both switching elements Q1 and Q2 are switched.
A current having a large peak value (referred to as “simultaneous ON current”) flows simultaneously in Q2. The simultaneous ON current is also called a di / dt current.

The simultaneous on-current is determined by both switching elements Q
Since the current flows through the series circuit of the switching elements Q1 and Q2, both ends of the smoothing capacitor C0 are short-circuited, and very large current stress occurs in the switching elements Q1 and Q2 for a short period of time. . That is, the switching elements Q1 and Q2 may be destroyed.

In order to avoid this kind of problem, it is conceivable to use switching elements Q1 and Q2 having a sufficiently large current capacity. However, since the switching elements having a large current capacity are expensive, the power supply device requires high cost. Problem arises.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a power supply device in which even if the impedance of a load changes, there is no risk of destruction of a circuit element due to current stress.

[0013]

According to a first aspect of the present invention, there is provided at least one series circuit of a pair of switching elements which are alternately turned on and off at a high frequency, and the series circuit is connected between both ends of a DC power supply. An inverter circuit for converting the DC voltage of the DC power supply into a high-frequency voltage, a load for changing the impedance and a resonance inductor and a resonance capacitor, and a load for performing a resonance operation by applying the high-frequency voltage from the inverter circuit. A driving circuit for providing a driving signal so that the inverter circuit alternately turns on and off the pair of switching elements, wherein the resonance circuit detects a resonance frequency of the load circuit when the load is in a steady state. The frequency of the drive signal is set to be high, and the drive unit determines that at least the resonance frequency of the load circuit When the impedance of the load changes so as to be higher than the number, a first pause period from when one of the two switching elements is instructed to turn off to when the other is instructed to turn on, and when the other is turned off. The drive signal is generated so as to be different from the second pause period from when the command is issued to when one of the devices is turned on.

According to a second aspect of the present invention, in the first aspect of the present invention, a configuration is used in which the drive means generates a drive signal of a predetermined frequency and separately controls each switching element.

According to a third aspect of the present invention, in the first or second aspect, a voltage detecting circuit for detecting a voltage applied to the load is added.

According to a fourth aspect of the present invention, in the third aspect of the present invention, a stop means for stopping the operation of the inverter circuit when a voltage detected by the voltage detection circuit becomes equal to or higher than a specified voltage is added.

According to a fifth aspect of the present invention, in the fourth aspect of the present invention, the stopping means operates intermittently.

According to a sixth aspect of the present invention, in any one of the first to fifth aspects of the present invention, the driving means includes
A first switch element that is turned on and off as a low-potential side switching element of a set of switching elements is turned on and off, a second switch element that is turned off when the first switch element is turned on, and a first switch A series circuit of a third switch element that is turned on when the element is turned off, a high-potential-side power supply that applies a DC voltage between both ends of the series circuit, and control of the second switch element when the third switch element is turned on A fourth switch element for forming a path for extracting electric charge from a terminal, wherein a third switching element is connected to a connection point between the pair of switching elements and a high-potential side of the pair of switching elements. A connection point between the second and third switching elements is connected to a control terminal of the switching element on the high potential side so as to be connected to a control terminal of the switching element. It is.

According to a seventh aspect of the present invention, in the sixth aspect of the present invention, there is provided a fifth switch element for forming a path for extracting a charge of a control terminal of the third switch element when the first switch element is turned off. It is a thing.

According to an eighth aspect of the present invention, in the first to seventh aspects, the load is a discharge lamp.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) As shown in FIG. 1, the basic configuration of this embodiment is the same as the conventional configuration shown in FIG. The difference from the above will be described. As can be seen from a comparison between FIG. 1 and FIG. 14, in the present embodiment, the resistor R22 is connected in parallel with the resistor R21 inserted between the gate, which is the control terminal of the switching element Q2 on the low potential side, and the drive circuit 6. This is different from the conventional configuration in that a series circuit with the diode D21 is connected and a capacitor C21 is connected in parallel to the gate and source of the switching element Q2. Although the position of the capacitor C2 and the position of the inductor L1 are reversed, this point does not substantially affect the operation, and the same operation as that of the configuration shown in FIG. 14 is performed.

In the drive circuit 6 of the present embodiment, not only are the two drive signals alternately set to the H level, but also a certain amount of pause from the time when one goes to the L level to the time when the other goes to the H level. There is a period. That is, both drive signals are at the L level during the idle period. However, with respect to the two drive signals output from the terminals HO and LO of the drive circuit 6, the period from when one goes to the L level to when the other goes to the H level (called "dead-off time") is equal to each other. I have.

By the way, the path for supplying the drive signal output from the terminal LO to the switching element Q2 is
2. The following operations are possible by providing the diode D21 and the capacitor C21. That is, when the drive signal output from the terminal LO becomes H level, the capacitor C21 is charged via the resistor R21, and the terminal voltage of the capacitor C21 becomes
When the threshold voltage reaches 2, the switching element Q2 is turned on. As for the switching element Q1, since the drive signal output from the terminal HO is applied to the control terminal only through the resistor R11, the switching elements Q1 and Q2 are turned on after the output levels of the terminals HO and LO become H level. It takes longer for the switching element Q2 to reach. In other words, it can be said that the drive signal output from the drive circuit 6 is delayed by the resistor R21 and the capacitor C21 to turn on the switching element Q2 on the low potential side. Here, each switching element Q
The timing at which the switching elements Q1 and Q2 are turned on is set so that the flywheel current (regenerative current) flows through the body diode after the other switching elements Q1 and Q2 are turned off.

On the other hand, the time from when the output levels of the terminals HO and LO become L level until the switching elements Q1 and Q2 are turned off is the time until the gate potentials of the switching elements Q1 and Q2 fall below the threshold voltage. The time constant is determined by the time constant for removing the charge of the gate-source capacitance for the high-potential side switching element Q1, and the time constant for removing the charge of the gate-source capacitance and the capacitor C21 for the low-potential side switching element Q2. It will be decided by. The drive signal from the terminals HO and LO of the drive circuit 6 is L
The time from switching to the level until the switching element Q1 is turned off is determined by the resistance R1 connected in parallel with the gate-source.
5 and the resistance R11 between the terminal HO and the gate, and the time until the switching element Q2 is turned off is determined by the resistance R23 connected in parallel between the gate and the source and the resistances R21 and R22 between the terminal LO and the gate. Will be. In short, when the terminal LO of the drive circuit 6 becomes H level, the capacitor C21 is charged through the resistor R21, so that the ON of the low-potential side switching element Q2 is delayed. On the other hand, when the terminal LO becomes L level, the charge of the capacitor C21 is reduced. The discharge time constant can be made smaller than the charge time constant by being discharged not only through the resistor R21 but also through the path of the series circuit of the resistor R22 and the diode D21.

By setting the relationship between the drive signal from the drive circuit 6 and the on / off timing of each of the switching elements Q1 and Q2 as described above, each part of the circuit shown in FIG. 1 operates as shown in FIG. I do. FIG. 2A shows the driving signal output from the terminal HO of the driving circuit 6 and the switching element Q.
FIG. 2B shows the drive signal output from the terminal LO of the drive circuit 6 and the gate potential (dot-dash line) of the switching element Q2. The switching elements Q1 and Q2 are turned on and off according to the magnitude of the gate potential and the threshold voltages Vth1 and Vth2. As can be seen from the figure, the time from when the drive signal of the terminal HO becomes H level until the switching element Q1 is turned on, and between the time when the drive signal of the terminal LO becomes H level and the switching element Q2 is turned on. Are made different, but the time from when the drive signals of the terminals HO and LO become L level to when the switching elements Q1 and Q2 are turned off is set equal. FIG. 2 (c)
(D) is a current flowing through each of the switching elements Q1 and Q2, and a period during which the polarity is negative corresponds to a period during which a flywheel current flows through the body diode. FIG. 2E shows the voltage across the switching element Q2.

It can be seen by comparing the currents of the switching elements Q1 and Q2 shown in FIGS. 2C and 2D with the on / off timings of the switching elements Q1 and Q2 shown in FIGS. 2A and 2B. The switching timing of the switching elements Q1 and Q2 through which the current flows is immediately after the switching elements Q1 and Q2 are turned off, and the period during which the current flows through the switching elements Q1 and Q2 is equal.

On the other hand, FIG. 3 shows the operation of each part in the case where the resonance frequency of the load circuit 3 changes in the upward direction due to the change in the impedance of the discharge lamp La as a load, resulting in a phase leading operation. FIGS. 3A and 3B show the driving circuit 6 respectively.
3 (c) and 3 (d) show the drive signal (solid line) output from the terminals HO and LO of FIG. 3 and the gate potential (dotted line) of each of the switching elements Q1 and Q2. Is shown. FIG. 3 (c)
As can be seen from (d), since the phase-advancing operation is performed, the switching timing of the switching elements Q1 and Q2 through which the current flows is immediately after the switching elements Q1 and Q2 are turned on, and the current flows through the switching elements Q1 and Q2. Are flowing for different periods. That is, the switching element Q1
Is turned off, the pause period T12 from when the switching element Q2 is turned on becomes longer than the pause period T21 from when the switching element Q2 is turned off to when the switching element Q1 is turned on. , Q2 are turned on, the switching elements Q1 and Q2 through which the current flows are switched, so that the period during which the current flows through the switching element Q1 is longer than the period during which the current flows through the switching element Q2.

It is generally known that in this type of inverter circuit 2, the output is limited if the on-duties of switching elements Q1 and Q2 are different. That is, when the on-duty is 50% (that is, when the on-periods of the switching elements Q1 and Q2 are 1: 1 and the current flows in substantially equal periods), as shown in FIG. However, if the on-duties of the switching elements Q1 and Q2 are different and the current flows in different periods as in the phase advance operation of the present embodiment, the resonance becomes weaker than when the on-duty is 50%. As a result, the current flowing through the resonance circuit is reduced, and the simultaneous ON current flowing through the switching elements Q1 and Q2 is also reduced, thereby reducing the possibility of destruction of the switching elements Q1 and Q2.

In this embodiment, the dead time of the switching elements Q1 and Q2 when the switching elements Q1 and Q2 are actually turned on and off is changed without changing the dead-off time of the driving signal output from the driving circuit 6. The same operation is performed even if the dead-off time of the drive signal output from the circuit 6 is changed.

(Second Embodiment) In this embodiment, FIG.
As shown in (1), the dead time of the drive signal generated from the drive circuit 6 is made different so that the idle period is made different. Also, the load circuit 3
, Two discharge lamps Laa and Lab are provided.
Resonance capacitors C1a and C1b are connected between one ends of both filaments of the discharge lamps Laa and Lab, respectively. DC discharge capacitors C2a and C2b and a resonance inductor L1 are connected to the discharge lamps Laa and Lab, respectively.
a and L1b are connected in series. That is, a series circuit of the inductors L1a and L1b, the capacitors C2a and C2b, and the discharge lamps Laa and Lab is connected in parallel with each other. However, the configuration of the load circuit 3 is not particularly related to the operation of the present embodiment, and the configuration of the first embodiment may be adopted as the load circuit 3. In this embodiment, the DC power supply circuit 1 is represented by a battery symbol.

The drive circuit 6 supplies a drive signal to the switching element Q1 on the high potential side, a circuit section for supplying a drive signal to the switching element Q2 on the low potential side, and a reference potential of the circuit section on the high potential side. A level shift circuit for setting a potential at a connection point between the two switching elements Q1 and Q2.

The circuit portion on the low potential side is a switch element Q7 composed of an npn-type transistor which is turned on when the rectangular wave signal output from the inverter control circuit 5 is at H level.
And a switch element Q8 formed of a pnp transistor which is turned on when the rectangular wave signal is at L level, and a resistor R21.
, And a resistor R24 is connected to the emitter of the switching element Q8 so that the switching elements Q7 and Q8
A series circuit of a resistor R21 and a resistor R24 is connected between the output terminals of the control power supply circuit 7. The capacitor C22 is connected to the base-emitter of the switch element Q7, and the resistor R25 is connected to the base-emitter of the switch element Q8. Further, a resistor R2 is connected to the base of the switch element Q7.
6, a rectangular wave signal from the inverter control circuit 5 is input, and a diode D2 is connected to the base of the switch element Q8.
2, and a rectangular wave signal is input through the resistor R27.

Therefore, when the rectangular wave signal becomes H level, charging of the capacitor C22 is started via the resistor R26, and when the terminal voltage of the capacitor C22 rises, the switching element Q7 is turned on. When the rectangular wave signal goes to H level, the switching element Q8 turns off. That is, when the switching element Q7 is turned on, the switching element Q2
Gate potential is H level (output voltage of control power supply circuit 7)
become. On the other hand, when the rectangular wave signal goes to L level, the switching element Q8 turns on and the switching element Q2 turns off.

The level shift circuit section includes a switch element Q9 composed of a MOSFET, and an inverter control circuit 5
Is applied to the gate of the switching element Q9 through the resistor R29. Further, a resistor R28 is connected to the gate-source of the switch element Q9. The drain of the switch element Q9 is a diode D11, a resistor R12,
It is connected to the control power supply circuit 7 through a series circuit of R13. A capacitor C11 having one end connected to the connection point of the switching elements Q1 and Q2 and the other end connected to the connection point of the resistors R12 and R13 is controlled via a diode D11 and a resistor R13. Charged by the power supply circuit 7. That is, the capacitor C11 is charged up to the output voltage of the control power supply circuit 7 when the switching element Q2 is turned on, and when the switching element Q3 is turned off, the output voltage of the control power supply circuit 7 is set to the connection point potential of the switching elements Q1 and Q2. A corresponding voltage is obtained as a voltage across the capacitor C11.

The high-potential-side circuit section has a resistor R11 interposed between a switch element Q5 formed of an npn-type transistor and a switch element Q6 formed of a pnp-type transistor, and a resistor R11 connected to the emitter of the switch element Q6.
14, a series circuit of switch elements Q5, Q6, a resistor R11 and a resistor R14 is connected between both ends of a capacitor C11. Also, the gate of the switching element Q1
The resistor R15 and the diode D12 are connected to the source. The base of the switching element Q5 is the switching element Q9.
Is connected via a resistor R16 and a diode D10, and the base of the switch element Q6 is connected via a resistor R17 to the drain of the switch element Q9.
Therefore, when the rectangular wave signal output from the inverter control circuit 5 is at H level and the switching element Q9 is turned on, the switching element Q6 is turned on and the switching element Q1 is turned off. If the rectangular wave signal is at L level and the switching element Q9 is turned off, the capacitor C11
Turns on the switching element Q5 by forward biasing the switching element Q5 via the resistors R16 and R12 and the diode D10, and as a result, the switching element Q1 is turned on. That is, the capacitor C11 functions as a high-potential-side power supply.

In short, when the output of the inverter control circuit 5 becomes H level, the switching element Q2 is turned on with a delay, and at this time, the switching element Q9 is turned on, so that the switching element Q1 is turned off. When the output of the inverter control circuit 5 goes low, the switching element Q2
Is turned off, and at this time, the switching element Q1 is turned on because the switching element Q9 is turned off.

The operation of this embodiment will be described in more detail. When the output of the inverter control circuit 5 becomes H level, the gate-source capacitance of the switch element Q9 is charged through the resistor R29, and at the same time, the charging of the capacitor C22 is started through the resistor R26. Since the gate potential of the switching element Q9 reaches the threshold voltage of the switching element Q9 in a short time, the switching element Q9 is turned on, the switching element Q6 is turned on, and the charge of the gate-source capacitance of the switching element Q1 passes through the resistor R14. Discharged. Thus, when the gate potential of the switching element Q1 falls below the threshold voltage, the switching element Q1 is turned off.

When the switching element Q7 is turned on due to an increase in the terminal voltage of the capacitor C22, the resistance R2
1, the gate-source capacitance of the switching element Q2 is charged, and when the gate potential of the switching element Q2 reaches the threshold voltage of the switching element Q2, the switching element Q2 is turned on. Here, the time from when the rectangular wave signal output from the inverter control circuit 5 becomes H level to when the switching element Q2 is turned on is delayed by the resistor R26 and the capacitor C22, so that the switching element Q1 is turned off. It is longer than the time to become. However, the timing at which the switching element Q2 is turned on is set from the time when the switching element Q1 is turned off to the time when the flywheel current flows through the body diode of the switching element Q2. As described above, after the square wave signal output from the inverter control circuit 5 goes to the H level, the switching element Q9 is turned on, and then the switching element Q1 is turned off.
It operates in the order that the switching element Q2 is turned on,
An idle period can be generated between the time when the switching element Q1 is turned off and the time when the switching element Q2 is turned on.

On the other hand, when the square wave signal output from the inverter control circuit 5 becomes L level, the gate-source capacitance of the switching element Q9 is discharged through the resistor R29,
At the same time, the base current of the switching element Q8 flows through the diode D22 and the resistor R27, and the switching element Q8 is turned on. When the switching element Q8 is turned on, the charge of the gate-source capacitance of the switching element Q2 is discharged through the switching element Q8. When the gate potential of the switching element Q2 becomes equal to or lower than the threshold voltage of the switching element Q2, the switching element Q2 is turned off. Become. Since the charge of the gate-source capacitance of the switching element Q9 is extracted through the resistor R29, the timing at which the switching element Q9 is turned off is later than the timing at which the switching element Q2 is turned off. When the switching element Q9 is turned off,
The drain-source capacitance Cx of the switch element Q9 is charged from the capacitor C11 via the resistor R12, and the voltage across the switch element Q9 increases. When the voltage across the switching element Q9 exceeds the voltage across the switching element Q2, a base current flows from the capacitor C11 to the switching element Q5 through the resistors R12, R16 and the diode D10, turning on the switching element Q5, and turning on the capacitor C11 through the resistor R11. Charges the gate-source capacitance of the switching element Q1. Thus, when the gate potential of the switching element Q1 exceeds the threshold voltage of the switching element Q1, the switching element Q1 turns on. Here, the timing at which the switching element Q1 is turned on is set to a period from when the switching element Q2 is turned off to when a flywheel current flows through the body diode of the switching element Q2.

As described above, if the circuit constants are set appropriately, after the rectangular wave signal output from the inverter control circuit 5 goes low, the switching element Q2
Is turned off, then the switching element Q9 is turned off, and then the switching element Q1 is turned off. After the switching element Q2 is turned off until the switching element Q1 is turned on. A pause can be created.

Here, the time from when the rectangular wave signal output from the inverter control circuit 5 becomes H level to when the switching element Q1 is turned off, and when the switching element Q2 becomes low after the rectangular wave signal becomes L level. The time until turning off is set to be equal.

Therefore, in the steady state, the operation is performed as shown in FIG. FIG. 5A shows a rectangular wave signal output from the inverter control circuit 5, and FIG. 5B shows the gate potential (solid line) of the switching element Q9 and the switching element Q2.
5 (c) shows the gate potential of the switching element Q1. Here, for ease of explanation, it is assumed that threshold voltages Vth of switching elements Q1, Q2 and switching element Q9 are equal. As described above, when the square wave signal from the inverter control circuit 5 goes high, the gate potential of the switch element Q9 rises and turns on, and the gate potential of the switching element Q2 rises with a delay. It turns on with a delay from the switching element Q9. The switching element Q1 is turned off immediately after the switching element Q9 is turned on. In this way, the idle period T12 from turning off the switching element Q1 to turning on the switching element Q2 is generated.

As shown in FIG. 5D, when the switching element Q9 is turned on, the voltage across the switching element Q9 (solid line) immediately becomes zero, and the voltage across the switching element Q1 (dashed line) changes to the switching element Q1. It gradually decreases from off. FIGS. 5E and 5F show the current flowing through each of the switching elements Q1 and Q2, respectively, and the period in which the polarity is negative corresponds to the period in which the flywheel current flows through the body diode.

On the other hand, when the rectangular wave signal output from the inverter control circuit 5 goes low, the switching element Q
The gate potential (dotted line) of No. 2 decreases in a short time, but the drop of the gate potential (solid line) of the switching element Q9 is delayed.
Further, after the switching element Q9 is turned off, the gate potential of the switching element Q1 rises and the switching element Q9 is turned off.
1 turns on. Here, as shown in FIG. 5D, the voltage across the switching element Q2 (dashed line) rises with the switching element Q2 off, and the voltage across the switching element Q9 (solid line) rises with the switching element Q9 off. When the voltage across the switching element Q9 exceeds the voltage across the switching element Q2, the switching element Q1
Starts to rise. Thus, the switching element Q9 is turned off after the switching element Q2 is turned off, and the switching element Q1 is turned off after the switching element Q9 is turned off.
Is turned on, a pause period T21 from the turning off of the switching element Q2 to the turning on of the switching element Q1 is generated.

Since the idle period T12 can be adjusted by the time for charging the capacitor C22, the idle period T12
Is designed to be substantially equal to the pause period T21. Further, as described above, the time from when the rectangular wave signal output from the inverter control circuit 5 becomes H level to when the switching element Q1 is turned off, and when the rectangular wave signal becomes L level and the switching element Q2 Is set to be equal to the time until it is turned off, and in the delay operation shown in FIG. 5, the period in which current flows through both switching elements Q1 and Q2 is equal.

Next, FIG. 6 shows the operation of each part in the case where the resonance frequency of the load circuit 3 changes in the upward direction due to the change in the impedance of the discharge lamp La as a load, resulting in a phase leading operation. FIG. 6A shows a rectangular wave signal output from the inverter control circuit 5. As shown in FIG. 6B, the gate potential (solid line) of the switching element Q9 and the gate potential (dashed-dotted line) of the switching element Q2 are It changes as in the case of the lag operation. Further, as shown in FIG. 6C, the gate potential of the switching element Q1 also changes in the same manner as in the case of the lag operation. However, in the phase advance operation, when the gate potentials of the switching elements Q1 and Q2 become equal to or lower than the threshold voltage Vth and the switching elements Q1 and Q2 are turned off, FIG.
Since the flywheel current flows through each of the switching elements Q1 and Q2 as shown in (e) and (f), when the voltage at both ends of the switching element Q2 changes in phase as shown in FIG. Will be shifted. In other words, the period during which the current flows through each of the switching elements Q1 and Q2 starts from the turning-off of each of the switching elements Q1 and Q2 in the phase-lag operation, whereas the phase of the current flows through the switching elements Q1 and Q2 in the phase-advance operation. It will depend on ON.

As a result, the time from when the rectangular wave signal output from the inverter control circuit 5 becomes H level to when the switching element Q2 is turned off, and when the switching element Q1 becomes low after the rectangular wave signal becomes L level. There is a difference in the time to turn off. That is, the switching element Q
1 is set to be different from a rest period T12 from turning off the switching element Q2 to turning on the switching element Q2, and a rest period T21 from turning off the switching element Q2 to turning on the switching element Q1. In this manner, the duty of the switching elements Q1 and Q2 can be changed, the resonance of the resonance circuit is weakened, the simultaneous ON current is reduced, and the possibility of destruction of the switching elements Q1 and Q2 can be reduced. . Other configurations and operations are the same as those of the first embodiment.

(Third Embodiment) This embodiment is different from FIG.
, Four switching elements Q11, Q1
This uses a full-bridge type inverter circuit in which the second, Q13, and Q14 are bridge-connected, and includes two drive circuits 6a and 6b having the same configuration as that of the second embodiment. Therefore, the present embodiment has a configuration in which the dead-off time of the drive signal differs, as in the second embodiment. The two switching elements Q11 to Q14 are connected in series each two, and each of the two switching elements Q11, Q12, Q13, and Q14 connected in series becomes each arm of the bridge circuit. Both arms are connected between both ends of the DC power supply circuit 1. Each of the drive circuits 6a and 6b drives a switching element Q11 and a switching element Q12, and a switching element Q13 and a switching element Q14, which constitute each arm. That is,
The switching elements Q11 and Q12 are controlled to be turned on and off alternately by the drive circuit 6a, and the switching elements Q13 and Q14 are controlled to be turned on and off alternately by the drive circuit 6b.

Further, a rectangular wave signal output from the inverter control circuit 5 is directly supplied to one drive circuit 6a,
The other drive circuit 6b is supplied with a rectangular wave signal via a NOT circuit NOT. With this configuration, switching elements Q11 and Q14, which are diagonal positions of switching elements Q11 to Q14, and switching element Q12 and switching element Q13 are controlled so as to have periods in which they are simultaneously turned on. That is, the polarity of the voltage applied to the load circuit 3 can be inverted between the period when the switching elements Q11 and Q14 are on and the period when the switching elements Q12 and Q13 are on.

As for the load circuit 3, the inductor L1 is connected in series to the discharge lamp La as a load, and the discharge lamp L
a capacitor C1 for resonance between one end of both filaments
Are connected. In this load circuit 3, a DC cut capacitor is omitted. 4 are the same as those of the circuit shown in FIG. 4 except for the reference numerals a and b, which are the same as those of the drive circuit 6a and 6b shown in FIG. It has the same function as each of the components.

This will be described in more detail. In the present embodiment, since the inverted rectangular wave signals are input to the driving circuits 6a and 6b via the knot circuits NOT, the circuit constants of the driving circuits 6a and 6b are now the same, and the knot circuit N
If the time delay due to the OT is ignored, the switching element Q11 is turned off after the switching element Q11 is turned off.
T12 is a pause period until the switching element Q1 is turned on, and the switching element Q1 is turned off after the switching element Q12 is turned off.
When the rest period until 1 is turned on is T21,
The idle period T34 from when the switching element Q13 turns off to when the switching element Q14 turns on is equal to the idle period T12, and the idle period T43 from when the switching element Q14 turns off to when the switching element Q13 turns on is It is equal to the pause period T21. That is, T12 = T34 and T21 = T43. here,
As described in the second embodiment, T12 ≒ T21 is set in the lagging operation, but T12 ≠ T21 in the lagging operation, so that the simultaneous ON current can be relatively reduced, Switching elements Q11-Q14
Stress can be reduced. Other configurations and operations are the same as those of the first embodiment.

(Fourth Embodiment) This embodiment is different from FIG.
As shown in the figure, the discharge lamp L as a load in the second embodiment
The voltage detection circuit 8 for detecting the peak-to-peak voltage of the voltage across the terminal a is added. However, in this embodiment, the load circuit 3 has one discharge lamp La as a load. The voltage detection circuit 8 includes a series circuit of two resistors R30 and R31 connected between both ends of the discharge lamp La, and a series circuit of a capacitor C30 and a diode D30 is connected in parallel to the resistor R31. Further, a series circuit of a diode D31 and two resistors R32 and R33 is connected in parallel to the diode D30, and a capacitor C3 is connected to the resistor R33.
1 are connected in parallel. Diode D30 and diode D
31 are connected so that currents in opposite directions flow.

Therefore, during the period when the polarity of the voltage across the discharge lamp La is the polarity for charging the capacitor C30 through the diode D31, the capacitor C30 is charged until the terminal voltage reaches the peak value of the voltage across the resistor R31.
When the polarity of the voltage across the discharge lamp La is reversed, the resistance R31
The peak value of a voltage obtained by dividing the voltage obtained by adding the terminal voltage of the capacitor C30 to the terminal voltage of the capacitor C30 by the resistors R32 and R33 is the voltage across the capacitor C31. In other words, the output voltage of the voltage doubling rectifier circuit having the voltage obtained by dividing the voltage across the discharge lamp La by the resistors R30 and R31 as the input voltage is connected to the resistor R3.
2, which corresponds to pressure division by R33.

The voltage between both ends of the discharge lamp La detected by the voltage detection circuit 8 is connected to the terminal E of the inverter control circuit 5.
Input to in. The inverter control circuit 5 used in the present embodiment is configured to stop the output of the rectangular wave signal from the terminal Vout when the voltage applied to the terminal Ein becomes equal to or higher than a specified voltage, and the voltage across the discharge lamp La becomes abnormal. When it rises, the rectangular wave signal is stopped, and the operation of the inverter circuit 2 is stopped. That is, the inverter control circuit 5 functions as a stopping unit.

Here, the operation when the impedance of the discharge lamp La rises will be described. As described above, when the impedance of the discharge lamp La rises, the operation shifts to the phase advance operation, and the rest periods of the switching elements Q1 and Q2 become different, so that the resonance current suddenly decreases. On the other hand, since the discharge lamp La has a negative resistance characteristic, if the resonance current decreases, the voltage across the discharge lamp La increases. That is, if the impedance of the discharge lamp La changes at the time tx shown in FIG. 9 and the impedance gradually changes, the voltage between both ends of the discharge lamp La gradually increases because the impedance increases after the time tx.
In this manner, if the phase shift operation is shifted from the phase delay operation to the phase advance operation at time ty, the resonance current suddenly decreases.
The voltage at both ends of a suddenly rises. In the voltage detection circuit 8 of the present embodiment, the output of the rectangular wave signal from the inverter control circuit 5 is stopped and the inverter circuit 2 is stopped when the voltage across the discharge lamp La suddenly rises.

As described above, in the present embodiment, the voltage detection circuit 8 is used in combination with the inverter circuit 2 having a configuration in which the resonance current decreases when the impedance of the discharge lamp La increases. It is possible to reliably detect an increase in impedance at the end of life or the like. In other words, the half-wave lighting state (Emiless state) caused by the exhaustion of the electron-emitting substance at the end of the life of the discharge lamp La may not be reliably detected only by detecting the voltage between both ends of the discharge lamp La. In the Emiless state, the resonance current is reduced to increase the voltage across the discharge lamp La, so that the Emiless state can be detected reliably. Moreover, in the Emiless state, not only does the resonance current decrease,
Eventually, the operation of the inverter circuit 2 is stopped,
The stress on the switching elements Q1 and Q2 is greatly reduced. Other configurations and operations are the same as those of the first embodiment.

(Fifth Embodiment) This embodiment is different from FIG.
0, an intermittent timer circuit 9 for intermittently operating the inverter control circuit 5 is added to the configuration of the fourth embodiment. In addition, the inverter control circuit 5
Has a function of not only stopping the output of the rectangular wave signal from the terminal Vout when the voltage applied to the terminal Ein becomes higher than the specified voltage, but also setting the output of the terminal Eout to the H level. When the voltage becomes equal to or higher than the predetermined voltage, regardless of the voltage applied to the terminal Ein, the state is returned to the state in which the rectangular wave signal is output from the terminal Vout and the output of the terminal Eout is lowered to the L level.

The intermittent timer circuit 9 has a current mirror having two switch elements Q81 and Q82, and a switch element Q80 is connected in series to the input side switch element Q81. This current mirror charges the capacitor C80 with the current flowing through the switch element Q82 on the output side. The resistors R81 and R82 are connected to the emitters of the switching elements Q81 and Q82, and the resistor R80 is connected to the base-emitter of the transistor R80. The base of the switch element Q80 is connected to the terminal Eout. Therefore, when the output of the terminal Eout of the inverter control circuit 5 becomes H level, the switch element Q80 is turned on, and charging of the capacitor C80 by the current mirror is started.

On the other hand, a series circuit of a resistor R83 and a switch element Q83 is connected between both ends of the capacitor C80. The switching element Q84 is connected to the base-emitter of the switching element Q83, and the resistor R84 is connected to the base-emitter of the switching element Q84. The base of the switch element Q84 is connected to the terminal Eo of the inverter control circuit 5.
ut, and the collector is connected to the control power supply circuit 7 via the resistor R85. Therefore, when the output of the terminal Eout of the inverter control circuit 5 is at the H level, the switching element Q84 is turned on and the switching element Q83 is turned off, and the charge of the capacitor C80 is maintained. One terminal Eo
When the output of ut is at the L level, the switch element Q83 is turned on, and the capacitor C80 is discharged via the resistor R83.

As described above, the intermittent timer circuit 9 charges and discharges the capacitor C80 according to the output level of the terminal Eout of the inverter control circuit 5. The terminal voltage of the capacitor C80 is applied to the terminal A of the inverter control circuit 5. As described above, when the voltage applied to the terminal A exceeds a predetermined voltage, the inverter control circuit 5 outputs a rectangular wave signal from the terminal Vout and Since the output of the terminal Eout is lowered to the L level, when the voltage applied to the terminal A of the inverter control circuit 5 reaches a predetermined voltage while the output level of the terminal Eout is at the H level and the capacitor C80 is being charged, the terminal A rectangular wave voltage is output from Vout, and the output of the terminal Eout returns to the L level. When the output of the terminal Eout becomes L level in this way,
The capacitor C80 is discharged, and the voltage applied to the terminal A decreases.

If the Emiless state at the end of the life of the discharge lamp La has not been eliminated, the inverter control circuit 5 sets the output of the terminal Eout to the H level again.
By repeating the above operation, the inverter control circuit 5 intermittently outputs the rectangular wave signal. That is, the inverter circuit 2 operates intermittently. in this way,
In the present embodiment, the stopping means includes the inverter control circuit 5 and the intermittent timer circuit 9. In the configuration of the fourth embodiment in which the intermittent timer circuit 9 is not provided, when the inverter circuit 2 performs the phase advance operation, the discharge lamp La cannot be turned on again until the power is turned on again. In the configuration of the embodiment, the cause of the stoppage of the inverter control circuit 5 is not the continuous state such as the end of the life of the discharge lamp La, but the DC power supply circuit 1 uses the commercial power supply as the power supply, and the instantaneous power failure or the temporary voltage drop occurs. For example, when the impedance of the discharge lamp La temporarily increases, the operation of the inverter circuit 2 can be automatically returned to the original state when the power is restored. Other configurations and operations are the same as those of the first embodiment.

(Sixth Embodiment) This embodiment is different from FIG.
As shown in FIG. 1, in the circuit section on the high potential side of the drive circuit 6 in the configuration of the second embodiment, the polarity with the switch element Q5 side as the anode between the base of the switch element Q5 and the emitter of the switch element Q6. And a diode D13 is connected between the gate of the switching element Q1 and the emitter of the switching element Q6 with a polarity having the gate side of the switching element Q1 as an anode.

In the configuration of this embodiment, similarly to the second embodiment, when a rectangular wave signal from the terminal Vout of the inverter control circuit 5 rises in a steady state, the switching element Q9 is turned on, and the switching element Q5 is turned on. The current supply to the base is stopped, and the switching element Q6
Try to turn on. Here, if the residual charge at the base of the switching element Q5 is large, the on state of the switching element Q5 continues, and a state occurs in which both the switching elements Q5 and Q6 are simultaneously turned on. As described above, when the switching elements Q5 and Q6 are simultaneously turned on, the switching element Q5
The gate potential of 1 is a potential during a state when one of the switch elements Q5 and Q6 is on and the other is off. In this state, if the gate potential of switching element Q1 exceeds threshold voltage Vth of switching element Q1, switching element Q1 is turned on. Since the switching element Q2 is turned on when the rectangular wave signal rises, if the on state of the switching element Q1 continues until after the switching element Q2 is turned on, both the switching elements Q1 and Q2 are simultaneously turned on.

In this embodiment, when the switching element Q6 is turned on, the switching element Q5
Of the base of the switching element Q5, it is possible to avoid the state where the switching elements Q5 and Q6 are simultaneously turned on even when the residual charge of the base of the switching element Q5 is large, and as a result, the switching elements Q5 and Q6 Are turned on at the same time, the switching elements Q1, Q
2 can be prevented from being turned on at the same time. That is, the stress on the switching elements Q1 and Q2 can be reduced, and the possibility of failure can be reduced. Other configurations and operations are the same as those of the first embodiment. Further, the technology of this embodiment is applicable to any of the above-described embodiments.

(Seventh Embodiment) This embodiment is different from the one shown in FIG.
As shown in FIG. 2, the collector-emitter of an npn-type transistor Q10 is connected to the emitter-base of a pnp-type switch element Q6 in the circuit section on the high potential side of the drive circuit 6 in the configuration of the sixth embodiment. The cathode of the diode D13 is connected to the collector of the transistor Q10. Further, a diode D15 is connected to the base-emitter of the transistor Q10 in the reverse direction. Further, a resistor R18 is inserted between the base of the switch element Q6 and the resistor R17, and a series circuit of the diode D15 and the capacitor C12 is connected in parallel to the resistor R18.

In the configuration of this embodiment, similarly to the second embodiment, when the rectangular wave signal from the terminal Vout of the inverter control circuit 5 falls in the steady state, the voltage across the switching element Q2 starts to rise. Thereafter, the switching element Q6 continues to be on until the voltage across the switching element Q9 becomes equal to or higher than the voltage across the switching element Q2. Thereafter, the transistor element Q6 is turned off, and the switch element Q5 is turned on. Here, if the residual charge of the switching element Q6 is large, the off state of the switching element Q6 continues even if the voltage across the switching element Q9 becomes equal to or higher than the voltage across the switching element Q2. Assuming that the off state of the switching element Q6 continues until the flywheel current stops flowing through the switching element Q1, and then the switching element Q6 is turned on, as shown in FIG. On-current will flow. 13 (a) and 13 (b) show currents flowing through the switching elements Q1 and Q2, respectively.

In this embodiment, the switching element Q2-diode D12-diode is provided between the time when the voltage across the switching element Q2 starts to rise and the time when the voltage across the switching element Q9 becomes equal to or higher than the voltage across the switching element Q2. D14-switch element Q6-diode D15
The capacitor C12 is charged through the path of the capacitor C12, the resistor R17, and the switch element Q9, and the switch element Q9
When the voltage between both ends becomes equal to or more than the voltage across the switching element Q2, the transistor Q10 is turned on and the switching element Q6 is turned off by using the capacitor C12 as a power supply. As a result, it is possible to prevent a simultaneous ON current from flowing through the switching elements Q1 and Q2 even when the residual charge of the switching element Q6 is large. That is, the switching element Q
1, Q2 can be reduced to reduce the possibility of failure. Other configurations and operations are the same as those of the first embodiment. Further, the technology of this embodiment is applicable to any of the above-described embodiments.

[0068]

According to the first aspect of the present invention, at least one set of a series circuit of a pair of switching elements which are alternately turned on and off at a high frequency is provided, and the series circuit is connected between both ends of the DC power supply. An inverter circuit that converts the DC voltage into a high-frequency voltage, a load circuit that includes a resonance inductor and a resonance capacitor, and a load whose impedance changes, and a high-frequency voltage from the inverter circuit is applied to perform a resonance operation. A driving means for providing a driving signal so that the inverter circuit alternately turns on and off the pair of switching elements, wherein a frequency of the driving signal is calculated based on a resonance frequency of the load circuit when the load is in a steady state. Is set high, and the driving means
When the impedance of the load changes so that at least the resonance frequency of the load circuit becomes higher than the frequency of the drive signal, one of the two switching elements is instructed to turn off, and the other is instructed to turn on. A drive signal is generated so as to make a first pause period until the first pause period is different from a second pause period from when the other is instructed to be turned off to when one is instructed to be turned on. When the phase-advance operation is performed, the length of the idle period of the drive signal that instructs on / off of both switching elements is changed,
The output of the inverter circuit can be reduced from the steady state, and as a result, the stress on the circuit elements due to the simultaneous turning on of the switching elements can be reduced. That is, even if the switching element is manufactured at a relatively low cost using a switching element having a relatively small power capacity, there is no risk of failure at the time of a change in the impedance of the load, which contributes to cost reduction.

According to a second aspect of the present invention, in the first aspect of the present invention, a configuration is used in which the drive means generates a drive signal of a predetermined frequency to separately control each switching element, which is separately controlled. Therefore, it is relatively easy to generate a drive signal such that the idle periods are equal in the steady state of the delayed operation, and the idle periods are different in the abnormal phase operation.

According to a third aspect of the present invention, in the first or second aspect of the present invention, a voltage detecting circuit for detecting a voltage applied to the load is added, and a change in impedance of the load is detected by the voltage detecting circuit. It can be detected by a circuit. In particular, when the load has a negative resistance characteristic like a discharge lamp, when the output of the inverter circuit decreases due to the change in the impedance of the load in the increasing direction, the voltage across the load greatly increases. An increase in the load impedance can be reliably detected.

According to a fourth aspect of the present invention, in the third aspect of the present invention, a stop means for stopping the operation of the inverter circuit when the voltage detected by the voltage detection circuit becomes equal to or higher than a specified voltage is added. When the voltage across the load changes due to a change in the impedance of the load, not only does the output of the inverter circuit drop, but also the output of the inverter circuit stops, so the stress on the circuit elements should be reduced more reliably to protect the circuit elements. Can be.

According to a fifth aspect of the present invention, in the fourth aspect of the present invention, the stop means operates intermittently. When the impedance of the load changes, the output of the inverter circuit is reduced. And the operation is alternately repeated, so that when the change in the impedance of the load is temporary, the operation of the inverter circuit can be automatically returned to the normal operation.

According to a sixth aspect of the present invention, in any one of the first to fifth aspects of the present invention, the driving means includes
A first switch element that is turned on and off as a low-potential side switching element of a set of switching elements is turned on and off, a second switch element that is turned off when the first switch element is turned on, and a first switch A series circuit of a third switch element that is turned on when the element is turned off, a high-potential-side power supply that applies a DC voltage between both ends of the series circuit, and control of the second switch element when the third switch element is turned on A fourth switch element for forming a path for extracting electric charge from a terminal, wherein a third switching element is connected to a connection point between the pair of switching elements and a high-potential side of the pair of switching elements. A connection point between the second and third switching elements is connected to a control terminal of the switching element on the high potential side so as to be connected to a control terminal of the switching element. In it, it is possible to shorten the fall time of the drive signal applied to enhance the responsiveness of the second switching element to the switching element of the high-potential side. That is,
It is possible to reduce the possibility that the two switching elements are turned on at the same time.

According to a seventh aspect of the present invention, in the sixth aspect of the present invention, a fifth switch element is provided which forms a path for extracting a charge of a control terminal of the third switch element when the first switch element is turned off. Therefore, the responsiveness of the third switching element can be improved, and the possibility of simultaneous turning on of one set of two switching elements can be further reduced.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is an explanatory diagram of the same operation in a steady state according to the first embodiment.

FIG. 3 is an operation explanatory diagram in a state where a load impedance is changed in the same as above.

FIG. 4 is a circuit diagram showing a second embodiment of the present invention.

FIG. 5 is an explanatory diagram of an operation in a steady state according to the first embodiment;

FIG. 6 is an operation explanatory diagram in a state where the load impedance changes in the above.

FIG. 7 is a circuit diagram showing a third embodiment of the present invention.

FIG. 8 is a circuit diagram showing a fourth embodiment of the present invention.

FIG. 9 is an operation explanatory view of the above.

FIG. 10 is a circuit diagram showing a fifth embodiment of the present invention.

FIG. 11 is a circuit diagram showing a sixth embodiment of the present invention.

FIG. 12 is a circuit diagram showing a seventh embodiment of the present invention.

FIG. 13 is an explanatory diagram of the operation of the above.

FIG. 14 is a circuit diagram showing a conventional example.

FIG. 15 is an explanatory diagram of the operation of the above.

FIG. 16 is an operation explanatory view of the above.

[Explanation of symbols]

 Reference Signs List 1 DC power supply circuit 2 Inverter circuit 3 Load circuit 5 Inverter control circuit 6 Drive circuit 8 Voltage detection circuit 9 Intermittent timer circuit C1 Capacitor D13 Diode (fourth switch element) D14 Diode L1 Inductor La Discharge lamp Q1, Q2 Switching element Q5 ( (Second) switch element Q6 (third) switch element Q9 (first) switch element Q10 Transistor (fifth switch element)

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Katsuyoshi Niho 1-55 Yoshida Shimojima, Higashi-Osaka City, Osaka Asahi National Lighting Co., Ltd. (72) Inventor Tsutomu Yoshino 1-55 Yoshida Shimojima, Higashi-Osaka City, Osaka Prefecture Asahi National Lighting Co., Ltd. (72) Inventor Hidefumi Kataoka 1-55 Yoshida Shimojima, Higashiosaka-shi, Osaka Asahi National Lighting Co., Ltd. F-term (reference) 3K072 AA02 AB02 BA03 BA05 BC01 BC03 CA16 DB03 DD04 DE04 EB05 GA03 GB12 GB18 GC04 5H007 AA08 BB03 CA02 CB09 CB17 CC12 DB03 DC05

Claims (8)

[Claims] At least one series circuit of a pair of switching elements alternately turned on and off at a high frequency is provided, said series circuit is connected between both ends of a DC power supply, and the DC voltage of the DC power supply is converted to a high frequency voltage. An inverter circuit for conversion; a load circuit having a resonance inductor, a resonance capacitor, and a load having a variable impedance; and a load circuit having a high-frequency voltage applied from the inverter circuit and performing a resonance operation. A driving means for supplying a driving signal so as to alternately turn on and off a set of switching elements, wherein a frequency of the driving signal is set higher than a resonance frequency of the load circuit when the load is in a steady state; The means may include: When the impedance changes, a first pause period from when one of the two switching elements is instructed to turn off to when the other is instructed to turn on,
A power supply device for generating a drive signal so as to have a different second pause period from when the other is instructed to turn off to when one is instructed to turn on. 2. The power supply device according to claim 1, wherein said drive means generates a drive signal of a predetermined frequency and separately controls each switching element. 3. The power supply device according to claim 1, further comprising a voltage detection circuit for detecting a voltage applied to the load. 4. A stopping means for stopping the operation of the inverter circuit when a voltage detected by the voltage detecting circuit becomes equal to or higher than a specified voltage.
The power supply as described. 5. The power supply according to claim 4, wherein said stopping means operates intermittently. 6. A first switch element which is turned on / off in accordance with on / off of a low-potential-side switching element of the pair of switching elements;
The second switch element which is turned off when the first switch element is turned on and the third switch which is turned on when the first switch element is turned off
, A high-potential-side power supply for applying a DC voltage across the series circuit, and a path for extracting charge from the control terminal of the second switch element when the third switch element is turned on. A fourth switch element,
A third switching element connected between a connection point of the pair of switching elements and a control terminal of a switching element on the high potential side of the pair of switching elements, and The power supply device according to any one of claims 1 to 5, wherein a connection point of the third switch element is connected to a control terminal of the high-potential side switching element. 7. The power supply according to claim 6, further comprising a fifth switch element for forming a path for extracting a charge from a control terminal of the third switch element when the first switch element is turned off. apparatus. 8. The power supply device according to claim 1, wherein the load is a discharge lamp.