JP2001057339A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a silicon film which is excellent in crystallinity and controlled in the direction of crystal growth and to form a semiconductor device by the use of the above silicon film. SOLUTION: A metal element (e.g. nickel element) which selectively promotes the crystallization of an amorphous silicon film is introduced into an amorphous silicon film formed on a glass substrate. Then, the glass substrate is subjected to a thermal treatment, by which a crystal growth starts taking place from a region where metal element is introduced in a direction in parallel with the lengthwise direction of the substrate. The crystal growth happens in a (111) direction. The substrate is lower in conductivity in a (111) axial direction than the other directions. A device is so formed as to enable carriers to move in the direction of crystal growth, by which the device of high electric properties can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a structure of a semiconductor device using a thin film semiconductor and a method for manufacturing the same. For example, the present invention relates to a configuration and a body device of a TFT (thin film transistor) provided on an insulating substrate such as glass, and a manufacturing method thereof.

[0002]

2. Description of the Related Art Thin film transistors (hereinafter referred to as TFTs) using thin film semiconductors are known. This TFT is formed by forming a thin-film semiconductor on a substrate and using the thin-film semiconductor. This TFT is used in various integrated circuits. In particular, a switching element provided in each pixel of an electro-optical device, particularly an active matrix type liquid crystal display device, and a driver formed in a peripheral circuit portion for driving the pixel. It is attracting attention as an element.

[0003] Thin film silicon semiconductors are generally used for TFTs used in these devices. Thin-film silicon semiconductors are roughly classified into two types: those made of an amorphous silicon semiconductor (a-Si) and those made of a crystalline silicon semiconductor. Amorphous silicon semiconductors are most commonly used because they have a low manufacturing temperature, can be manufactured relatively easily by a gas phase method, and have high mass productivity. Since it is inferior to a silicon semiconductor having
In order to obtain higher-speed characteristics in the future, it has been strongly required to establish a method for manufacturing a TFT made of a crystalline silicon semiconductor. Note that, as a silicon semiconductor having crystallinity, polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystal component, semi-amorphous silicon having an intermediate state between crystalline and amorphous, and the like are known. .

A method for obtaining a silicon semiconductor in the form of a thin film having crystallinity is as follows: (1) A film having crystallinity is directly formed at the time of film formation. (2) An amorphous semiconductor film is formed, and crystallinity is imparted by the energy of laser light. (3) An amorphous semiconductor film is formed and crystallinity is imparted by applying thermal energy. Is known.

However, in the method (1), it is technically difficult to uniformly form a film having good semiconductor properties over the entire surface of the substrate, and the film forming temperature is as high as 600 ° C. or more. However, there is a cost problem that an inexpensive glass substrate cannot be used. In the method (2), taking an excimer laser, which is currently most commonly used, as an example, there is a problem that the irradiation area of the laser beam is small, so that the throughput is low. The laser stability is not enough to uniformly process
There is a strong sense of next-generation technology. Method (3) is
Compared to the methods (1) and (2), there is an advantage that a large area can be dealt with, but it is still necessary to set the heating temperature to a high temperature of 600 ° C. or higher, and considering using an inexpensive glass substrate. It is necessary to further lower the heating temperature. In particular, in the case of the current liquid crystal display device, the screen size is increasing, and therefore, it is necessary to use a large glass substrate as well. When such a large glass substrate is used, shrinkage or distortion in a heating step which is indispensable for semiconductor fabrication lowers the accuracy of mask alignment and the like, and is a serious problem. Especially in the case of Corning 7059 glass, which is currently most commonly used,
Since the strain point is 593 ° C., the conventional heating crystallization method causes large deformation. In addition to the problem of the temperature, the heating time required for crystallization in the current process is several tens of hours or more, so that it is necessary to further shorten the heating time.

[0006] As a further problem, the silicon thin film having crystallinity produced by these methods is based on accidental nucleation and crystal growth therefrom.
That is, the particle size, orientation and the like could hardly be controlled.
There have been many attempts to control these from the past to the present, for example,
Patents such as those shown in US Pat.
However, even in the method shown in this patent, incidental nuclei within a limited range are used only, and the orientation of the film is not completely controlled and the particle size is not controlled. The reality is that no control is performed.

[0007]

SUMMARY OF THE INVENTION The present invention provides means for solving the above problems. More specifically, in a method for producing a thin film made of a crystalline silicon semiconductor using a method of crystallizing a thin film made of amorphous silicon by heating, the temperature required for crystallization is lowered and the time is shortened. The aim is to provide a process that balances Of course, a crystalline silicon semiconductor manufactured using the process provided by the present invention has physical properties equal to or higher than those manufactured by the conventional technology, and can be used for the active layer region of the TFT. It goes without saying that there is something.

In this case, the present invention provides a new method for producing a crystalline silicon thin film instead of the conventional method utilizing accidental nucleation. This method is a method for producing a crystalline silicon thin film having a sufficient productivity at a relatively low temperature, and at the same time, a method having a considerably high controllability of the particle size control and orientation.

[0009]

[Background of the Invention] The inventors of the present invention have proposed thermal crystallization in order to solve the problems associated with the crystallization of amorphous silicon as described in the section of the prior art. The following experiments and discussions were conducted in order to study a method for accelerating the formation and a method for controlling the particle size and orientation.

First, a method for promoting thermal crystallization will be described. First, as an experimental fact, an amorphous silicon film is formed on a glass substrate, and the mechanism of crystallizing the film by heating is investigated. Crystal growth starts from the interface between the glass substrate and amorphous silicon, and to some extent Up to the film thickness or more, it was recognized that it progressed in a columnar shape perpendicular to the substrate surface.

The above phenomenon is caused by the fact that a crystal nucleus (a seed serving as a base for crystal growth) exists at the interface between the glass substrate and the amorphous silicon film, and a crystal grows from the nucleus. It is considered to be due to going. Such a crystal nucleus
A small amount of impurity metal elements present on the substrate surface, crystal components on the glass surface (likely crystallized glass, it is thought that silicon oxide crystal components exist on the glass substrate surface) or due to stress It is considered to be something to do.

Therefore, it was considered that the crystallization temperature could be lowered by more actively introducing crystal nuclei, and in order to confirm the effect, a small amount of another metal was deposited on the substrate. An experiment was conducted in which a thin film made of amorphous silicon was formed thereon and then heated and crystallized. As a result, when some metals were formed on the substrate, a decrease in the crystallization temperature was confirmed, and it was suggested that crystal growth using foreign matters as crystal nuclei was occurring. Therefore, the mechanism of a plurality of impurity metals whose temperature could be reduced was investigated in more detail.

[0013] Crystallization can be considered in two stages: initial nucleation and crystal growth from the nucleus. Here, the initial nucleation rate is observed by measuring the time required for the generation of point-like fine crystals at a constant temperature. The case was also shortened, and the effect of introducing crystal nuclei on lowering the crystallization temperature was confirmed. In addition, unexpectedly, when the growth of crystal grains after nucleation was examined by changing the heating time, after the formation of a certain metal, the amorphous silicon thin film In crystallization, it was observed that the rate of crystal growth after nucleation increased dramatically. This mechanism will be described in detail later.

In any case, due to the above two effects, when a thin film made of amorphous silicon is formed after a certain metal is formed in a very small amount, and then the film is heated and crystallized, it has not been considered conventionally. It has been found that sufficient crystallinity can be obtained at a temperature of 580 ° C. or less for about 4 hours. Among the impurity metals having such an effect, the effect is most remarkable, and a material selected by us is nickel.

One example of the effect of nickel is as follows. On a substrate on which no treatment is performed, that is, a thin film of nickel is not formed (Corning 70
59) In the case where a thin film made of amorphous silicon formed by a plasma CVD method is crystallized by heating in a nitrogen atmosphere, when the heating temperature is 600 ° C., the heating time is 10 hours or more. Although it was necessary, when a thin film made of amorphous silicon was used on a substrate on which a thin film of nickel was formed, a similar crystallization state could be obtained by heating for about 4 hours. In this case, the crystallization was determined using Raman spectroscopy. From this alone, it can be seen that the effect of nickel is very large.

As can be seen from the above description, when a thin film of amorphous silicon is formed on a thin film of nickel, a lower crystallization temperature and a shorter time required for crystallization are obtained. It is possible. Therefore, a more detailed description will be given on the assumption that this process is used for manufacturing a TFT. As will be described later in detail, the nickel thin film has the same effect of lowering the temperature even when it is formed not only on the substrate but also on amorphous silicon. Hereinafter, in the present specification, these series of processes will be referred to as “addition of a small amount of nickel”.

First, a method for adding a trace amount of nickel will be described. The addition of a small amount of nickel is also possible by forming a small amount of nickel thin film on a substrate and then forming amorphous silicon.
A method in which amorphous silicon is formed first and then a small amount of nickel thin film is formed thereon has an effect of lowering the temperature similarly, and the film formation method is sputtering, vapor deposition, or plasma processing. However, it has been found that the film formation method is not limited. Plasma treatment refers to the use of a material containing a catalyst element as an electrode in a parallel plate type or positive column type plasma CVD apparatus, and generation of plasma in an atmosphere such as nitrogen or hydrogen to form a catalyst element on an amorphous silicon film. This is a method of adding. However, when a very small amount of nickel thin film is formed on a substrate, a silicon oxide thin film is formed on the same substrate and a very small amount of nickel thin film is formed thereon rather than directly on a 7059 glass substrate. The effect is more remarkable when a thin nickel thin film is formed.
One possible reason for this is that direct contact between silicon and nickel is important for the low-temperature crystallization, and in the case of 7059 glass, components other than silicon inhibit the contact or reaction between the two. It may be that.

As a method of adding a trace amount, almost the same effect has been confirmed by adding nickel by ion implantation, in addition to forming a thin film in contact with above or below amorphous silicon. For the amount of nickel, 1 × 10 ¹⁵ a
It has been confirmed that the temperature is lowered when the amount of addition is equal to or more than toms / cm ³ , but when the amount of addition is equal to or more than 1 × 10 ²¹ atoms / cm ³ , the shape of the peak of the Raman spectroscopy spectrum is clearly different from that of simple silicon Because of the difference, the actual use is only 1 × 10 ¹⁵ atoms / cm ^{3 to} 5 ×
It appears to be in the range of 10 ¹⁹ atoms / cm ³ . Considering that the semiconductor material is used for the active layer of the TFT, the amount is set to 1 × 10 ¹⁵ atoms / cm ³ to
It is necessary to suppress it to 1 × 10 ¹⁹ atoms / cm ³ . However, the presence of a large amount of such elements in a semiconductor impairs the reliability and electrical stability of a device using such a semiconductor, and is not preferable.

In other words, the above-described elements that promote crystallization such as nickel (elements that promote crystallization are referred to as catalyst elements in the present specification) are necessary when crystallizing amorphous silicon. It is desirable that the crystallized silicon is not contained as much as possible. In order to achieve this purpose, at the same time as selecting a catalyst element that has a strong tendency to be inactive in crystalline silicon, the amount of the catalyst element required for crystallization is minimized,
Crystallization must be performed in a minimum amount. For this amount, the nickel concentration in the active layer is 1 × 10 ¹⁹ atoms cm
^It has been found that if it is not less than ^-3 , device characteristics are adversely affected. For that purpose, it is necessary to precisely control the amount of the catalyst element to be introduced.

When nickel was used as a catalytic element, an amorphous silicon film was formed, nickel was added by a plasma treatment method to produce a crystalline silicon film, and the crystallization process and the like were examined in detail. The following matters were found. (1) When nickel is introduced onto an amorphous silicon film by plasma treatment, nickel has already penetrated to a considerable depth in the amorphous silicon film before heat treatment. (2) The initial nucleation of the crystal occurs from the surface into which nickel is introduced. (3) Even when nickel is formed on an amorphous silicon film by a vapor deposition method, crystallization occurs as in the case where plasma processing is performed.

From the above, it is concluded that all the nickel introduced by the plasma treatment is not functioning effectively. That is, it is considered that some nickel does not function sufficiently even if a large amount of nickel is introduced. From this, it is considered that the point (plane) where nickel and silicon are in contact functions at the time of low-temperature crystallization.
It is concluded that it is necessary for nickel to be dispersed as finely as possible. In other words, it is concluded that "what is necessary is to introduce as low a concentration of nickel as possible in the form of atoms in the vicinity of the surface of the amorphous silicon film in a range where low-temperature crystallization is possible".

A method for introducing a trace amount of nickel only near the surface of the amorphous silicon film, in other words, a method for introducing a trace amount of a catalytic element for promoting crystallization only near the surface of the amorphous silicon film. Can be exemplified by a vapor deposition method, but the vapor deposition method has a problem that controllability is poor and it is difficult to strictly control the introduction amount of the catalyst element.

Further, it is necessary that the amount of the catalyst element introduced is as small as possible. In this case, however, there arises a problem that crystallinity becomes poor, and it is important to control an appropriate amount of the catalyst element. As a means for solving these problems, the inventors of the present invention have invented a method of adding a catalyst element using a solution, but the details thereof will be omitted in this specification. By using this method, 1 × 10 ¹⁶ atoms cm ⁻³ to 1 × 10 ¹⁹ atoms cm ⁻³
It has been found that the concentration of the catalytic element can be controlled within the range of (1). In addition to nickel, Pd, Pt, Cu, Ag, Au, I
Research by the inventors has revealed that one or more elements selected from n, Sn, Pb, As, and Sb can be used.

Next, the characteristics of crystal growth and crystal morphology in the case where a trace amount of nickel is added will be described, and the crystallization mechanism deduced therefrom will be described.

As described above, when nickel is not added, nuclei are generated at random from crystal nuclei at the substrate interface and the like, and crystal growth from the nuclei is also random, and depending on the manufacturing method, (110) or ( 111), it is reported that relatively oriented crystals can be obtained. Naturally, almost uniform crystal growth is observed over the entire thin film.

First, in order to confirm this mechanism, an analysis was performed using a DSC (differential scanning calorimeter). An amorphous silicon thin film formed on a substrate by plasma CVD was filled in a sample container while remaining on the substrate, and the temperature was raised at a constant rate. Then
A clear exothermic peak was observed at about 700 ° C., and crystallization was observed. This temperature naturally shifts when the rate of temperature rise is changed. For example, when the temperature is increased at a rate of 10 ° C./min, crystallization starts at 700.9 ° C. Next, three kinds of heating rates were measured, and the activation energy of crystal growth after initial nucleation was determined by the Ozawa method. Then, a value of about 3.04 eV was obtained. In addition, when the reaction rate equation was obtained from fitting with a theoretical curve, it was found that the reaction was best explained by disorder nucleation and its growth model, and nuclei were generated randomly from crystal nuclei at the substrate interface and the like. The validity of the model of crystal growth from the nucleus was confirmed.

The same measurement as described above was performed on a sample to which a small amount of nickel was added. Then 10 ° C /
When the temperature was raised at a rate of min, crystallization started at 619.9 ° C., and the activation energy of crystal growth determined from a series of these measurements was approximately 1.87 eV, which indicated that crystal growth was easy. It became clear numerically that it had become. Moreover, the reaction rate equation obtained from the fitting with the theoretical curve was close to a one-dimensional interface rate-determining model, suggesting that the crystal growth has a certain directionality.

The data obtained by the above thermal analysis are shown in Table 1 below.

The activation energies shown in Table 5 are obtained by measuring the amount of heat released from the sample at the stage of heating the sample, and calculating from the result by an analysis means called the Ozawa method.

[0030]

[Table 1]

The activation energy in Table 1 is a parameter indicating the ease of crystallization. The larger the value, the harder the crystallization, and the smaller the value, the easier the crystallization. From Table 1, it can be seen that the activation energy of the nickel-added sample decreases as the crystallization proceeds. That is, it is shown that crystallization is more easily performed as crystallization proceeds.
On the other hand, in the case of a crystalline silicon film formed by a conventional method without addition of nickel, it is shown that the activation energy increases as crystallization proceeds. This indicates that crystallization becomes more difficult as crystallization proceeds. Also, comparing the average activation energy,
The value of the silicon film crystallized by nickel addition is about 62% of that of the crystalline silicon film without nickel addition, which suggests that the amorphous silicon film with nickel addition is easily crystallized. Is done.

Next, the results of the TEM (transmission electron microscope) observation of the crystal morphology of the sample in which a trace amount of nickel was added this time using amorphous silicon of 800 ° as a starting film are shown. As a characteristic phenomenon found from the result of the TEM observation, there is a difference in crystal growth between a region to which nickel is added and a portion in the vicinity thereof. That is, when the region to which nickel is added is observed from a cross section,
Moire or fringes that appear to be lattice images are observed almost perpendicular to the substrate, which means that the added nickel or its compound with silicon becomes the crystal nucleus, and the crystals are almost perpendicular to the substrate as in the case without nickel added. It is considered to indicate growth. Further, in the peripheral region to which nickel was added, it was observed that crystals were grown in a needle-like or columnar shape in a direction parallel to the substrate.

In describing these phenomena in more detail, the following symbols will be used, although they are the basis of crystallography. First, {hkl} is a symbol indicating a plane including all planes equivalent to the (hkl) plane. Similarly, <hkl> is a symbol indicating an axis that includes all axes equivalent to the [hkl] axis.

The observation results of the crystal form near the nickel-added region are shown. Firstly, it was unexpected that the region where nickel was not directly added in a small amount crystallized itself was unexpected. However, a nickel added portion, a lateral crystal growth portion in the vicinity thereof (hereinafter abbreviated as a lateral growth portion), Further, the concentration of nickel in the distant amorphous portion (the amorphous portion remains at a portion far away where low-temperature crystallization is not performed and the amorphous portion remains) is increased by SIMS.
As a result of examination by (secondary ion mass spectrometry), as shown in FIG. 17, a small concentration was detected in the laterally grown portion from the nickel-added portion, and the amount of the amorphous portion was further reduced by about one digit. That is, nickel is diffused over a fairly wide range, and crystallization of a region near the region to which nickel is added is also considered to be an effect of the addition of a small amount of nickel.

First, FIG. 13 shows a surface TEM image near the region where nickel is added using amorphous silicon of 800 °. As is clear from the figure, a characteristic needle-like or columnar crystal having a uniform width is observed in a direction substantially parallel to the substrate.
Further, it was observed that a layer having a contrast different from that of the other crystal portions was present at the tip of the crystal. From the results of the subsequent high-resolution TEM and TEM-EDX, this portion was NiSi ₂ , N perpendicular to the growth direction
It has been found that an iSi ₂ layer is present (this depends on the film thickness, which will be described in detail later). The lateral growth substantially parallel to this substrate is from a region where a small amount of nickel is added, to several hundred μm in a large one.
Was also observed to grow, and it was also found that the growth amount increased in proportion to the increase in time and the temperature. As an example, a growth of about 20 μm was observed at 550 ° C. for 4 hours. Next, FIG. 14 shows TED patterns (electron diffraction images) of the three points where the needles or columns are grown. This TED pattern is taken from a direction perpendicular to the substrate. This pattern shows the crystal structure of the silicon film. Looking at this pattern,
It can be seen that the pattern is very simple, and a single crystal or at most a twin crystal can be seen, and the crystal orientation is very uniform. From this pattern, the above 80
It can be seen that the axial direction of the crystal laterally grown using the 0 ° amorphous silicon film as the starting film is the <111> direction. FIG. 16 shows this relationship.

Based on the above experimental facts, the inventors believe that crystallization proceeds by the following mechanism.

First, when considering vertical growth, nucleation occurs in the initial stage of crystallization, and the activation energy at this time is reduced by adding a small amount of nickel. This is obvious from the fact that crystallization occurs from a lower temperature by adding nickel. The reason for this is that, besides the effect of nickel as foreign matter, amorphous silicon is more likely to crystallize. It is considered that one of the intermetallic compounds (NiSi ₂ ) composed of nickel and silicon generated at a low temperature acts as a crystal nucleus because the lattice constant is close to that of crystalline silicon. In addition, since this nucleation occurs almost simultaneously on the entire surface of the region to which nickel is added, the crystal growth has a mechanism of growing as a plane. In this case, the reaction rate equation is a one-dimensional interface rate-determining process, and Crystals obtained by crystal growth in a substantially vertical direction are obtained. However, due to the limitation of the film thickness and the influence of stress and the like, the crystal axes do not always have to be completely aligned.

However, since the horizontal direction of the substrate is more uniform than the vertical direction, columnar or needle-like crystals grow laterally in alignment with the nickel-added portion as nuclei.
The direction of the growth surface is <111>, for example, 800 °
When the amorphous silicon film is used, the crystal growth direction is also <111>. Of course, also in this case, the reaction rate equation is expected to be a one-dimensional interface rate-determining type. Since the activation energy for crystal growth is reduced by the addition of nickel as described above, this lateral growth rate is expected to be very high, which is the case.

Next, the electrical characteristics of the nickel-added portion and the lateral growth portion in the vicinity thereof will be described. The electrical characteristics of the nickel-added portion are substantially the same as those of a film to which nickel is not substantially added, that is, a film which has been crystallized at about 600 ° C. for several tens of hours. When the activation energy was determined from the properties, the amount of nickel added was 10 ¹⁷ atoms / cm ³ as described above.
When the concentration was set to about 10 ¹⁸ atoms / cm ^3, no behavior that might be caused by the nickel level was observed. That is, it is considered from this experimental fact that the above-described concentration can be used as an active layer of a TFT or the like.

On the other hand, the laterally grown portion has an electric conductivity one order of magnitude higher than that of the nickel-added portion, and has a considerably high value as a crystalline silicon semiconductor. This is considered to be due to the fact that the current path direction coincided with the lateral growth direction of the crystal, so that few or no grain boundaries existed during the passage of electrons between the electrodes.
It is consistent with the result of the transmission electron micrograph. That is, it can be considered that the carrier moves along the grain boundary of the crystal grown in the shape of a needle or a column, so that the carrier can easily move.

FIG. 15 is a TEM photograph showing the crystal structure of silicon in which the tip portion where the crystal has grown into a needle or column shape shown in FIG. 13 is enlarged. In FIG. 15, a black portion appears at the end, and this portion is NiS
It has been found to be a i _2. That is, nickel is concentrated at the tip of a crystal that grows in a needle or column shape parallel to the substrate, and in the intermediate region, nickel is present.
It is understood that the nickel concentration is low.

Therefore, one of the effects of the invention disclosed in this specification is that the direction roughly along the crystal grain boundary and the direction in which carriers move in a semiconductor device (for example, a TFT) are made to substantially match. Improving the mobility of carriers can be mentioned. Further, avoiding the tip of the region where the crystal has grown in the direction parallel to the substrate, an intermediate region thereof, that is,
By utilizing the intermediate region between the growth end portion of the crystalline silicon film grown in the lateral direction and the region to which nickel is added, the crystalline silicon film in which carriers can easily move is used, and the nickel concentration is low. A configuration using an area can be given.

The direction along the crystal grain boundaries is the growth direction of the crystal growth in the shape of needles or columns, and this growth direction is at a film thickness of 800 ° (more precisely, at a film thickness of more than 800 °). It turns out to be the same)
This is a direction having crystallinity in the <111> axial direction, and this direction is a direction having selectively high conductivity with respect to another direction (for example, a direction perpendicular to crystal growth) as described above. is there. Also, as a practical problem, it is difficult for the crystal growth direction to completely match the carrier flowing direction, and the crystal does not completely grow in a uniform direction over the entire surface. Therefore, as a practical matter, the direction of crystal growth is determined as an average direction. In addition, it is assumed that the direction coincides with the direction in which carriers flow within a range of about ± 20 °, and when the amorphous silicon film of 800 ° is used, the direction completely falls within this range. Is known.

Next, a method for controlling the particle size and the orientation will be described. X-ray diffraction was performed on the sample crystallized by introducing a catalytic element, and the following contents were examined as parameters at that time.

Comparison between the case where the catalyst element is introduced to the surface of the amorphous silicon thin film and the case where the catalyst element is introduced to the interface with the base. The region where the catalyst is added (vertical growth and described in this specification), Comparison of the lateral growth region around it. Dependency when the film thickness of the amorphous silicon film is changed. Dependency when the catalyst concentration is changed. When the lateral growth process is used, the lateral growth region Comparison between a structure in which silicon oxide is sandwiched between upper and lower sides and a structure in which the upper surface is free of silicon oxide

When the above parameters are changed, the (111) orientation ratio is defined as shown in the following equation 1 in order to quantitatively evaluate the obtained tendency.
The (111) orientation ratio is 0.67 or more (in a completely random powder, the (111) orientation ratio is 0.33 according to the above definition, and the (111) orientation ratio is 0.33, which is more than twice the ratio). If there is a ratio, it is considered that there is no problem even if it is called (111) orientation).

[0047]

(Equation 1)

As a result of evaluation based on the (111) orientation ratio, the following trends shown in Tables 2, 3, 4, and 5 and FIG. 1 were observed.

[0049]

[Table 2]

[0050]

[Table 3]

[0051]

[Table 4]

[0052]

[Table 5]

The preparation method was the same except for the parameters shown in the table. Nickel was used as a catalyst element, and the addition method was a method of adding nickel from a solution (hereinafter abbreviated as a liquid phase method). For those not shown as lateral growth, vertical growth when applied to the silicon surface was used. However, in an experiment for comparing the presence or absence of a silicon oxide film on the upper surface in the lateral growth process, an SOG such as an OCD was used to realize a lateral growth process without silicon oxide on the upper surface.
A structure in which nickel is added to a solution for use, and the OCD is left only in the directly added region (vertical growth region), contrary to other lateral growth processes, and there is no silicon oxide on the region to be laterally grown. did. In addition, solid phase growth (also referred to as SPC in the figure) is carried out at 550 ° C. for 8 hours, followed by laser crystallization (which can drastically increase crystallinity by performing auxiliary) at 300 mJ / cm. ^{And 2} .

Table 2 shows the results when the catalyst addition site was changed as shown in the table, and a specific tendency was observed that the orientation was completely different only by the difference in the addition site. Regarding the particle size, almost no dependence on the addition location was observed, and when the particle size distribution was measured at an arbitrary location, the width of the distribution was about half that when no catalyst element was added, and the uniform particle size was observed. Was found to have been obtained.

Table 3 shows the results obtained when the crystal growth method was changed.
This is a comparison with a portion obtained by forming a silicon oxide film on amorphous silicon (cover silicon oxide), patterning the silicon oxide, opening a window for adding a catalytic element, and laterally growing from the window. As a result, the vertical growth portion is relatively random, and the horizontal growth portion having the silicon oxide film on the upper surface is almost completely (11) depending on the film thickness (the film thickness dependency will be described later).
1) It had orientation.

Table 4 shows the dependence on the film thickness. When an experiment was conducted at a film thickness of 300 ° to 5000 °, it is clear that the thinner the film thickness, the stronger the (111) orientation becomes in the lateral growth portion. It was confirmed. Among them, linearity was found within a range of error from 400 ° to 800 °, as shown in FIG. Note that no clear tendency was observed in the vertical growth portion because it was originally random. Table 5 shows the results of an experiment comparing the presence or absence of a silicon oxide film on the upper surface in the lateral growth process. The orientation of the sample in the lateral growth process having no silicon oxide on the upper surface changes depending on the film thickness. In contrast to the orientation other than the (111) orientation, the orientation of crystalline silicon obtained by the lateral growth process when silicon oxide is present on the upper surface has a strong (111) orientation, and is particularly strongly suggested from FIG. As described above, at 800 ° or less, the (111) orientation is quite strong, as described above. And from this,
It is concluded that the (111) orientation can be strengthened by setting the film thickness to 800 ° or less.

FIG. 1 is a graph plotting the dependency when the amount of nickel added is changed using vertical growth. The horizontal axis indicates the liquid phase addition using nickel acetate or nitrate. The vertical axis on the left side shows the dose amount (11
1) The orientation ratio, and the vertical axis on the right side indicates the ratio of the area of the silicon film before laser crystallization that has been crystallized by solid phase growth. According to this figure, the (111) orientation ratio is changed from random to (11) depending on the concentration of the catalyst element.
1) It is understood that the orientation can be freely changed. In addition, it can be seen that these completely match the change in the rate of solid phase growth before laser crystallization, which means that instead of changing the concentration, the heating temperature and heating time were changed before laser crystallization. It was confirmed that the same tendency was observed even when the growth rate in solid phase growth was changed.

Next, although not shown in the figure, regarding the particle size, the particle size observed by an optical microscope (whether or not this is a single crystal has not yet been determined so far) is shown. As the dose is increased, from 33 μm to 20
It was confirmed that the particle diameter was reduced to μm.

Although the above experimental results depend on the mechanism, all of the orientations can be interpreted based on the degree of the influence of the silicon-silicon oxide interface during solid phase growth. It is possible. Interpreting the above phenomenon from such a point of view results in the following.

The results shown in Table 2 indicate that when a catalytic element is introduced into the interface of the base, the base is already affected at the time of nucleation, and there is a high possibility that (111) orientation will occur at this point. . In contrast, when nuclei are generated on the surface, random nuclei can be generated without being affected by the base. And it is thought that it has the history throughout the crystal growth.

In the results shown in Table 3, the vertical growth portion has the same mechanism as described above, and the lateral growth is greatly affected by the growth point where the growth point comes in contact with the silicon oxide of the base and the cover. It is considered easy.

Regarding the film thickness dependency in Table 4, as the film thickness increases, the ratio of the energy at the interface with the underlying silicon oxide to the free energy of the entire system relatively decreases, and (11)
It is considered that the force for orienting in 1) is weakened.

In the results of the two lateral growths shown in Table 5 (with and without the silicon oxide film on the upper surface), those with the upper surface covered with silicon oxide are consequently surrounded on the upper and lower sides by silicon oxide. In order to stabilize the interface, (1
11) It is considered that orientation is obtained. On the other hand, in the lateral growth process without silicon oxide on the upper surface, the contribution of this interface is reduced by half, so that the binding force is correspondingly weakened and it is considered that the orientation other than (111) is exhibited. By the way, as described above, in the lateral growth process without silicon oxide on the upper surface,
There was a clear correlation between film thickness and orientation. For example, 500
When amorphous silicon was used, the orientation of (200) or (311) was strongly observed. About this, from the crystallographic analysis and the photograph as shown in FIG.
It can be considered that crystal growth is occurring by a mechanism such as 19. That is, the crystal growth surface 501 or 506 is a (111) plane, which is always constant, but what angle this plane has with respect to the substrate is almost uniquely determined by its film thickness. It is to decide. As a result, if the film thickness changes, for example, at a film thickness of 800 °, the apparent crystal growth direction 504 and the crystal growth surface 501
Is almost perpendicular, and as a result, the orientation perpendicular to the <111> axis is observed as the orientation (the orientation generally refers to the orientation perpendicular to the substrate). However, at a film thickness of 500 °, the crystal growth surface 506 is not perpendicular to the apparent crystal growth direction 505, and thus the orientation changes. That is, in a lateral growth process in which silicon oxide is not present on the upper surface, the orientation can be controlled by changing the film thickness. The results of FIG. 1 are easily explained by recognizing that laser crystallization is in the (111) orientation, in addition to the above-mentioned vertical growth being random.
FIG. 2 schematically shows the mechanism. A in the figure is an example in which the dose of the catalytic element is small, the number of random portions crystallized by solid phase growth before laser crystallization is small, and the number of laser crystallized (111) -oriented portions is larger than that. In the figure, B in the figure is an example in which almost all are solid-phase grown, and there is almost no (111) oriented portion crystallized by laser. As an experiment supporting this, an experiment was performed in which the energy density and irradiation time during laser crystallization were changed. Then, it was found that the (111) orientation ratio increased as the energy density and the irradiation time increased. This result is considered to indicate that increasing the rate of crystallization by laser is directly linked to increasing the (111) orientation ratio.

Next, regarding the particle diameter, in order to explain the above-mentioned phenomenon, in the case where a catalyst element is used, the nucleation density is uniquely determined by the dose amount of the catalyst element regardless of the place of addition. However, it can be explained by considering that the size at which the crystal can be grown is determined as a result.

Therefore, when these are summarized, the method of controlling the crystallization at low temperature and the orientation is as follows.

First, it is assumed that a method of adding a catalytic element typified by nickel from the surface by a liquid phase method is used, and solid phase growth and laser crystallization are used for crystallization. By adding a small amount of the catalyst element in this way, it is possible to lower the crystallization temperature and to drastically reduce the required time.

When a film having a high (111) orientation is desired to be obtained, a lateral growth process is used or the crystallization ratio before laser crystallization is reduced. By using this method, (1)
11) It is possible to arbitrarily control the orientation ratio between 0.67 and 1. As a method of lowering the crystallization ratio, either a method of reducing the dose of the catalyst element or a method of changing the solid phase growth condition may be selected.

When a random film is to be obtained The crystallization ratio before laser crystallization is increased by using a vertical growth process. As a method of increasing the crystallization ratio, either a method of increasing the dose of the catalyst element or a method of changing the solid phase growth conditions may be selected.

When a film having the above-mentioned intermediate orientation is to be obtained: A vertical growth process is used, and the crystallization ratio before laser crystallization is made appropriate. By using this process, (1
11) It is possible to arbitrarily control the orientation ratio between 0.33 and 1. As a method of setting the crystallization ratio to an appropriate value, either a method of changing the dose of the catalytic element or a method of changing the solid-phase growth condition may be selected.

When a film of another orientation is desired to be obtained, the orientation is controlled by changing the film thickness using a lateral growth process without silicon oxide on the upper surface. At this time, it is desirable from the viewpoint of controllability that the film thickness is changed between 800 ° and 300 °. When the thickness is larger than that, the width of the columnar crystal is smaller than the film thickness, and the tendency tends to be random.

Next, the means for changing the crystal grain size may be as follows. -When increasing the particle size, lower the concentration of the added catalytic element.

When reducing the particle size, increase the concentration of the catalyst element to be added.

It is effective to control the temperature and time of solid phase growth simultaneously with controlling the amount of the catalyst element added. However, the maximum extent to which the particle size can be increased is uniquely determined by the amount of the catalyst element added.

In the present invention, the most remarkable effect can be obtained when nickel is used as the catalyst element. However, other types of catalyst elements that can be used are preferably Pt, Cu, Ag, Au, In, and In. Sn, Pd, P,
As and Sb can be used. These elements are interstitial elements with respect to silicon, and have an effect of diffusing into a silicon film and promoting crystallization.

The method for introducing the catalytic element is not limited to the liquid phase method using an aqueous solution or a solution such as alcohol, and a substance containing the catalytic element can be widely used. For example, a metal compound or oxide containing a catalyst element can be used.

Finally, a method of applying the present invention to a TFT based on the above various characteristics will be described. Where TF
As an application field of T, an active matrix type liquid crystal display device using TFTs for driving pixels is assumed. As described above, in recent large-screen active-matrix liquid crystal display devices, it is important to suppress the shrinkage of the glass substrate. Therefore, crystallization can be performed at a sufficiently low temperature, which is particularly preferable.
According to the present invention, a part where amorphous silicon is conventionally used is added with a trace amount of nickel,
By crystallizing for about a time, it is possible to easily replace the silicon with crystalline silicon. Of course, it is necessary to change the design rules and the like accordingly. However, it is considered that the conventional apparatus and process can sufficiently cope with this, and the merits thereof are considered to be great. In this specification, a thin film transistor (TF
Although the example of T) is mainly shown, the invention disclosed in the present specification can be widely used for an element using a thin film semiconductor. For example, thin-film diodes, thin-film bipolar transistors,
Further, it can be used for a photoelectric conversion device using a thin film semiconductor.

[0077]

Embodiment 1 In this embodiment, a silicon oxide film of 1200 ° is selectively provided, nickel is selectively introduced using the silicon oxide film as a mask, and lateral growth is performed.
1) This is an example in which a silicon film with high orientation is manufactured.

FIG. 3 shows an outline of a manufacturing process in this embodiment. First, the glass substrate 11 (Corning 7059, 1
Amorphous silicon film 12 (0 cm square)
A silicon oxide film 21 (cover silicon oxide) serving as a mask is formed to a thickness of 1000 ° or more, here 1200 °, on the (00 ° film). Regarding the thickness of the silicon oxide film 21,
According to experiments by the inventors, it has been confirmed that there is no problem even at 500 °, and it is considered that a thinner film may be used if the film quality is dense.

Then, the silicon oxide film 21 is subjected to a necessary pattern by a usual photolithography patterning process. Then, a thin silicon oxide film 20 is formed by ultraviolet irradiation in an oxygen atmosphere. This silicon oxide film is formed for the purpose of improving wettability and uniformly applying a solution containing nickel to be introduced later. The production of the silicon oxide film 20 is performed by irradiating UV light for 5 minutes in an oxygen atmosphere. The silicon oxide film 20
Is considered to be about 20-50 °. (FIG. 3
(A))

In this state, 5 ml of an acetate solution containing 100 ppm of nickel is dropped (in the case of a 10 cm square substrate). Also, at this time, 50 rpm with the spinner 15
For 10 seconds to form a uniform water film 14 on the entire surface of the substrate. Further, in this state, after holding for 1 minute, spin dry is performed at 2000 rpm for 60 seconds using a spinner. This holding may be performed while rotating the spinner at 0 to 100 rpm.
(FIG. 3 (B))

Then, the amorphous silicon film 12 is crystallized by performing a heat treatment at 550 ° C. (nitrogen atmosphere) for 8 hours. At this time, crystal growth is performed in the lateral direction from the region of the portion 22 where nickel has been introduced to the region where nickel has not been introduced as indicated by 23. Under this condition, a lateral growth amount of about 30 μm was obtained. Then, the cover silicon oxide was peeled off using buffered hydrofluoric acid, and laser crystallization was performed with a KrF excimer laser (248 nm) at a power density of 300 mJ / cm ² .

When the silicon film thus obtained was subjected to X-ray diffraction, the (111) orientation ratio was found to be 0.91.
7 and films having very high (111) orientation were obtained. FIG. 4 shows the results.

[Embodiment 2] In this embodiment, the same process as in Embodiment 1 is used, and only the thickness of the amorphous silicon film is reduced by 40%.
This is an example in which two types of 0 ° and 800 ° were tried.

The results were obtained from X-ray diffraction (11
1) With respect to the orientation ratio, the sample at 400 ° is a film having almost completely (111) orientation of about 1.0, and the sample at 800 ° is slightly weaker in (111) orientation than 0.720 and 500 °. Turned out to be.

[Embodiment 3] In this embodiment, a catalyst element for promoting crystallization is contained in an aqueous solution, applied onto an amorphous silicon film, and then crystallized by heating, and further irradiated with laser light. This is an example in which the crystallinity is improved by the method. This configuration corresponds to vertical growth in the above description, and a film having a relatively random orientation can be obtained.

With reference to FIG. 5, the process up to the point where the catalytic element (here, nickel is used) is introduced will be described. In this embodiment, Corning 7059 glass is used as the substrate 11. The size is 100mm x 100mm
And

First, the amorphous silicon film 12 is formed by plasma CVD.
Is formed at a temperature of 100 to 1500 ° by an LPCVD method. Here, the amorphous silicon film 12 is formed to a thickness of 500 ° by a plasma CVD method. (FIG. 5 (A))

Then, a hydrofluoric acid treatment is performed to remove the dirt and the natural oxide film.
Å is formed. If the contamination can be ignored, the oxide film 13
Instead, a natural oxide film may be used as it is.

Although the exact thickness of the oxide film 13 is unknown because it is extremely thin, it is considered to be about 20 °.
Here, the oxide film 1 is irradiated with UV light in an oxygen atmosphere.
3 is formed. Film formation conditions are UV in oxygen atmosphere.
For 5 minutes. This oxide film 1
As the film forming method of No. 3, a thermal oxidation method may be used.
Further, a treatment by hydrogen peroxide may be used.

This oxide film 13 is used to spread the acetate solution over the entire surface of the amorphous silicon film in the subsequent step of applying an acetate solution containing nickel, that is, to improve the wettability. It is. For example, when an acetate solution is directly applied to the surface of an amorphous silicon film, nickel cannot be introduced into the entire surface of the amorphous silicon film because the amorphous silicon repels the acetate solution. That is, uniform crystallization cannot be performed.

Next, an aqueous solution of nickel acetate is prepared.
The concentration of nickel is 25 ppm. Then, 2 ml of this acetate solution is applied to the surface of the oxide film 13 on the amorphous silicon film 12.
By dripping, a water film 14 is formed. This state is maintained for 5 minutes. Then, spin dry using a spinner (200
0 rpm, 60 seconds). (FIGS. 5C and 5D)

The concentration of nickel in the acetic acid solution is 1
If it is not less than ppm, it is practical, but in consideration of desired orientation, it was set to 25 ppm in this case. When a nonpolar solvent such as a toluene solution of nickel 2-ethylhexanoate is used as the solution, the oxide film 13 is unnecessary, and the catalyst element can be directly introduced onto the amorphous silicon film.

This nickel solution coating step is performed once to plural times to form a layer containing nickel having an average film thickness of several to several hundreds on the surface of the amorphous silicon film 12 after spin drying. Can be formed. In this case, nickel in this layer diffuses into the amorphous silicon film in the subsequent heating step and acts as a catalyst for promoting crystallization. Note that this layer is not necessarily a complete film. In this example, the number of application was one.

After the application of the solution, the state is maintained for one minute. Although the concentration of nickel contained in the silicon film 12 can be finally controlled by the holding time, the largest controlling factor is the concentration of the solution.

Then, in a heating furnace, heat treatment is performed at 550 ° C. for 8 hours in a nitrogen atmosphere. As a result,
Partially crystalline silicon thin film 1 formed on substrate 11
2 can be obtained. The crystallization ratio at this stage was determined by image analysis using a computer.
84%.

The above heat treatment can be carried out at a temperature of 450 ° C. or higher. However, if the temperature is low, the heating time must be lengthened and the production efficiency decreases. Further, if the temperature is 550 degrees or more, the problem of heat resistance of a glass substrate used as a substrate will surface.

In this embodiment, the method of introducing a catalytic element on the amorphous silicon film has been described, but a method of introducing a catalytic element below the amorphous silicon film may be employed. However, in such a case, it should be noted that the (111) orientation becomes extremely high as described above.

After the silicon film 12 having partial crystallinity is obtained by the heat treatment, a KrF excimer laser (wavelength: 248 nm) is used.
m, pulse width 30 nsec) in a nitrogen atmosphere.
00~350mJ / cm ² of power density number Shoto, in the present embodiment 1 shot irradiated at 300 mJ / cm ^2, completely allowed to crystallize the silicon film 12. This step may be performed by irradiation with infrared light.

The silicon film having crystallinity thus obtained was subjected to X-ray diffraction to evaluate the orientation. FIG. 6 shows the result. The peaks of (111), (220), and (311) were clearly observed, and the (111) orientation ratio was calculated to be 0.405, indicating that a random film was obtained as desired.

[Embodiment 4] In this embodiment, the concentration of the nickel salt as a catalyst element in Embodiment 3 is 1 ppm. All other processing is the same as in the third embodiment. With such a configuration, it is possible to increase one crystal grain size. In this example, an experiment was performed under two solid-phase growth conditions, one for 4 hours and the other for 16 hours. As a result of microscopic observation of the thin film after the heat treatment, the sample in which the concentration was reduced in this manner and the solid phase growth time was 4 hours had more amorphous silicon portions and the crystalline silicon The number of crystal nuclei consisting of also decreased. Next, the sample after laser crystallization was subjected to SECO etching and then SE.
Observed by M. As a result, it was found that the size of one crystal grain can be increased as compared with the case of Example 2 by reducing the solution concentration as in this case.

Further, when the sample after laser crystallization was subjected to X-ray diffraction, it was found that the sample after 4 hours of solid phase growth was (11)
1) A film having an orientation ratio of 0.730 and a (111) orientation was obtained. Further, the film subjected to the solid phase growth for 16 hours had the same orientation ratio lowered to about 0.4, and was a random film. [Embodiment 5] In this embodiment, a TFT is obtained using a crystalline silicon film manufactured by using the method of the invention disclosed in this specification. The TFT of this embodiment can be used for a driver circuit or a pixel portion of an active matrix type liquid crystal display device. It is needless to say that TFTs can be applied not only to liquid crystal display devices but also to thin film integrated circuits generally referred to.

FIG. 7 shows an outline of the manufacturing process of this embodiment.
First, an underlying silicon oxide film (not shown) is formed on a glass substrate 11.
Is formed to a thickness of 2000 mm. This silicon oxide film is provided to prevent diffusion of impurities from the glass substrate.

Then, an amorphous silicon film is formed to a thickness of 500 ° in the same manner as in the first embodiment. After the hydrofluoric acid treatment for removing the natural oxide film, a thin oxide film is
The film is formed to a thickness of about a degree by irradiation with UV light in an oxygen atmosphere. The thin oxide film may be formed by a method using a water treatment or thermal oxidation.

Then, an acetate solution containing 25 ppm of nickel is applied, held for 1 minute, and spin-dried using a spinner. Thereafter, the silicon oxide films 20 and 21 are removed with buffered hydrofluoric acid, and the silicon film is crystallized by heating at 550 ° C. for 8 hours. (Up to this point, the same as the manufacturing method shown in Example 1)

By performing the above heat treatment, a silicon film in which an amorphous component and a crystalline component are mixed can be obtained. This crystal component has a crystal nucleus. Further, the crystallinity of the silicon film is promoted by irradiating a KrF excimer laser beam at 200 to 300 mJ / cm ² , in this embodiment, at 300 mJ / cm ² . In this laser light irradiation step, the substrate is heated to about 400 ° C. This step further enhances crystallization.

Next, an island-shaped region 104 is formed by patterning the crystallized silicon film. This island-shaped area 10
4 constitutes an active layer of the TFT. And the thickness 200 ~
A silicon oxide film 105 of 1500 °, here 1000 °, is formed. This silicon oxide film functions as a gate insulating film. (FIG. 7 (A))

Care must be taken in manufacturing the silicon oxide film 105. Here, TEOS is used as a raw material, and a substrate temperature is 150 to 600 ° C., preferably 300 to 45 ° C. together with oxygen.
Decomposition and deposition were performed at 0 ° C. by an RF plasma CVD method. TE
The pressure ratio between OS and oxygen is 1: 1 to 1: 3, the pressure is 0.05 to 0.5 torr, and the RF power is 100 to 25.
0 W. Alternatively, TEOS is used as a raw material together with ozone gas by a low pressure CVD method or a normal pressure CVD method.
The substrate temperature is set to 350 to 600 ° C, preferably 400 to 55.
Formed at 0 ° C. After the film formation, annealing was performed at 400 to 600 ° C. for 30 to 60 minutes in an atmosphere of oxygen or ozone.

In this state, crystallization of the silicon region 104 may be promoted by irradiating a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) or strong light equivalent thereto. In particular, RTA using infrared light
(Rapid thermal annealing) can selectively heat only silicon without heating the glass substrate, and can reduce the interface state at the interface between silicon and the silicon oxide film. It is useful in manufacturing a field-effect semiconductor device.

Thereafter, an aluminum film having a thickness of 2000 to 1 μm is formed by an electron beam evaporation method, and is patterned to form a gate electrode 106. Aluminum may be doped with scandium (Sc) by 0.15 to 0.2% by weight. Next, the substrate is adjusted to pH ≒.
7, immersed in an ethylene glycol solution of 1 to 3% tartaric acid, and anodized using platinum as a cathode and the aluminum gate electrode as an anode. The anodic oxidation is performed by first increasing the voltage to 220 V with a constant current and maintaining the state for one hour to complete the process. In this embodiment, in the constant current state, the voltage rising speed is suitably 2 to 5 V / min. Thus, anodic oxide 109 having a thickness of 1500 to 3500 °, for example, 2000 ° is formed. (FIG. 7 (B))

Thereafter, an impurity (phosphorus) is implanted in a self-aligned manner into the island-like silicon film of each TFT by ion doping (also called plasma doping) using the gate electrode portion as a mask. Phosphine (PH ₃ ) is used as a doping gas. Dose amount is 1-4 × 10
¹⁵ cm ^-2 .

Further, as shown in FIG. 7C, a KrF excimer laser (wavelength 248 nm, pulse width 20 ns)
ec) is applied to improve the crystallinity of the portion where the crystallinity is deteriorated by the introduction of the impurity region. The energy density of the laser is 150 to 400 mJ / cm ² , preferably 200 to 250 mJ / cm ² . Thus, N-type impurity (phosphorus) regions 108 and 109 are formed. The sheet resistance in these regions is 200 to 800 Ω / □.

In this step, instead of using a laser beam, a flash lamp is used for a short period of time.
The temperature is raised to １1200 ° C. (temperature of the silicon monitor), and the sample is heated. Here, irradiation of intense light equivalent to so-called laser light such as RTA (rapid thermal annealing) (RTP, also called rapid thermal process) may be used.

Then, an interlayer insulator 110 is formed on the entire surface.
Plasma CVD of TEOS as raw material and oxygen
Method, reduced pressure CVD method with ozone, or normal pressure CV
A silicon oxide film having a thickness of 3000 is formed by method D. The substrate temperature is 250 to 450 ° C., for example, 350 ° C.
After the film formation, the silicon oxide film is mechanically polished to obtain a flat surface. (FIG. 7 (D))

Then, the interlayer insulator 110 is etched, contact holes are formed in the source / drain of the TFT as shown in FIG. 7E, and wirings 112 and 113 of chromium or titanium nitride are formed.

Finally, at 300 to 400 ° C. in hydrogen at 0.
Anneal for 1-2 hours to complete silicon hydrogenation. Thus, the TFT is completed. Then, a large number of TFTs manufactured at the same time are arranged in a matrix to complete an active matrix liquid crystal display device.
This TFT has source / drain regions 108/109 and a channel formation region 114. 115 is N
It becomes an electrical junction of I.

When the structure of this embodiment is adopted, the concentration of nickel present in the active layer is about 3 × 10 ¹⁸ cm ⁻³ or less, and 1 × 10 ¹⁶ atoms cm ^{−3 to} 3 × 10 3
It is considered to be ¹⁸ atoms cm ^-3 .

The TFT manufactured in this embodiment has an N-channel mobility of 75 cm ² / Vs or more. It has also been confirmed that V _th is small and has good characteristics. Further, it has been confirmed that the variation in the mobility is within ± 5%. It is considered that this small variation is due to the random orientation of the device and the absence of anisotropy in the operating characteristics of the device. When only laser light is used, the N-channel type is 100 cm ² /
Although it is possible to easily obtain a material having a voltage of Vs or more, the dispersion is large and uniformity as in this embodiment cannot be obtained.

[Embodiment 6] In this embodiment, the nickel concentration of Embodiment 5 is set to 1 ppm, and the crystal grain size is increased. The other configuration is exactly the same as that of the fifth embodiment.

As a result, the mobility is 15 for the N channel.
Those having a density of 0 cm ² / Vs or more were obtained. This is considered to be an effect of increasing the crystal grain size. However, the mobility variation was about ± 30%, and the uniformity was not so high. The reason for this is not clear,
It is presumed that the device has a certain degree of (111) orientation, which may have caused anisotropy in the device.

[Embodiment 7] In this embodiment, as shown in Embodiment 2, nickel is selectively introduced, and an electron is formed by using a region where crystal growth is performed in a lateral direction (a direction parallel to the substrate) from that portion. 4 shows an example of forming a device. When such a configuration is employed, the nickel concentration in the active layer region of the device can be further reduced, and a highly preferable configuration can be obtained from the viewpoint of electrical stability and reliability of the device. By setting the thickness of the amorphous silicon film to 400 °, it is possible to obtain a film with (111) orientation almost completely.

FIG. 8 shows a manufacturing process of this embodiment. First,
The substrate 201 is washed, and a 2000-nm-thick silicon oxide base film 202 is formed by a plasma CVD method using TEOS (tetraethoxysilane) and oxygen as source gases. Then, a thickness of 300 to
In this embodiment, an intrinsic (I-type) amorphous silicon film 203 of 1500 ° and 400 ° is formed. Then continuously 500 thickness
A silicon oxide film 205 having a thickness of 2000 to 2000, for example, 1000 is formed by a plasma CVD method. Then, the silicon oxide film 205 is selectively etched to form a region 206 where amorphous silicon is exposed.

Then, a solution (here, an acetate solution) containing nickel, which is a catalyst element for promoting crystallization, is applied by the method shown in Example 2. The concentration of nickel in the acetic acid solution is 100 ppm. Other detailed steps and conditions are the same as those described in the first embodiment.
This step may be performed by the method described in the fifth or sixth embodiment.

Thereafter, 500 to 620 in a nitrogen atmosphere.
C., for example, at 550.degree. C. for 8 hours, to crystallize the silicon film 203. FIG. In the crystallization, the crystal growth proceeds in a direction parallel to the substrate as indicated by an arrow, starting from a region 206 where the nickel and silicon films are in contact. In the drawing, a region 204 indicates a portion crystallized by directly introducing nickel, and a region 203 indicates a portion crystallized in the lateral direction. The crystal in the horizontal direction indicated by 203 is 2
It is about 5 μm. (FIG. 8A)

After the crystallization step by the heat treatment, the crystallinity of the silicon film 203 is further promoted by irradiating a laser beam. This step is exactly the same as that of the first embodiment, but in order to perform laser crystallization without removing the silicon oxide film 205, the energy is higher than that of the first embodiment, and 350 mJ / cm ² in the present embodiment. Crystallization was performed.

Next, the silicon oxide film 205 is removed. At this time, the oxide film formed on the surface of the region 206 is also removed at the same time. Then, after patterning the silicon film 204, dry etching is performed to form an island-shaped active layer region 208.
At this time, a region indicated by 206 in FIG. 8A is a region where nickel is directly introduced, and is a region where nickel is present at a high concentration. It has also been confirmed that nickel also exists at a high concentration at the tip of crystal growth. It has been found that in these regions, the nickel concentration is higher than in the intermediate region. Therefore, in the present embodiment, in the active layer 208, these regions where the nickel concentration is high do not overlap with the channel formation region.

Thereafter, 10% by volume containing 100% by volume of water vapor was
The surface of the active layer (silicon film) 208 is oxidized by leaving it for 1 hour in an atmosphere of atmospheric pressure at 500 to 600 ° C., typically 550 ° C.
To form The thickness of the silicon oxide film is 1000 °. After the silicon oxide film 209 is formed by thermal oxidation, the substrate is placed in an ammonia atmosphere (1 atm, 100%) at 400 ° C.
To be held. Then, in this state, the substrate is irradiated with infrared light having a peak at a wavelength of 0.6 to 4 μm, for example, 0.8 to 1.4 μm for 30 to 180 seconds.
9 is subjected to a nitriding treatment. At this time, 0.
HCl of 1 to 10% may be mixed. (FIG. 8 (B))

Subsequently, by the sputtering method,
Aluminum (including 0.01 to 0.2% scandium) having a thickness of 3000 to 8000 °, for example, 6000 ° is formed. Then, the gate electrode 210 is formed by patterning the aluminum film. (FIG. 8 (C))

Further, the surface of the aluminum electrode is anodized to form an oxide layer 211 on the surface. This anodization is performed in an ethylene glycol solution containing tartaric acid at 1 to 5%. The thickness of the obtained oxide layer 211 is 2
000. Note that the oxide 211 has a thickness for forming an offset gate region in a later ion doping process, so that the length of the offset gate region can be determined in the anodic oxidation process. (FIG. 8
(D))

Next, the gate electrode portion, that is, the gate electrode 210 and the surrounding oxide layer 211 are used as masks in the active layer region (forming the source / drain and channel) by ion doping (plasma doping). In addition, an impurity (here, phosphorus) which imparts the N conductivity type in a self-aligned manner is added. Phosphine (PH ₃ ) is used as the doping gas, and the acceleration voltage is set to 60 to 90 kV, for example, 80 kV. Dose amount is 1 × 10 ¹⁵ to 8 × 10
¹⁵ cm ^-2 , for example, 4 × 10 ¹⁵ cm ^-2 . As a result, N-type impurity regions 212 and 213 can be formed. As is clear from the figure, the impurity region and the gate electrode are offset from each other by a distance x. Such an offset state is particularly effective in reducing a leakage current (also referred to as an off-state current) when a reverse voltage (minus in the case of an N-channel TFT) is applied to the gate electrode.
In particular, in the TFT for controlling the pixels of the active matrix as in the present embodiment, it is desired that the leakage current is low so that the electric charge accumulated in the pixel electrode does not escape in order to obtain a good image, so that an offset is provided. That is valid.

Thereafter, annealing is performed by laser light irradiation. As the laser light, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) is used, but another laser may be used. The irradiation condition of the laser beam is such that the energy density is 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ^2, and ² to 10
A shot, for example, two shots was irradiated. The effect may be increased by heating the substrate to about 200 to 450 ° C. during the irradiation with the laser light. (FIG. 8 (E))

Subsequently, a silicon oxide film 21 having a thickness of 6000.degree.
4 is formed as an interlayer insulator by a plasma CVD method. Further, a transparent polyimide film 215 is formed by spin coating, and the surface is flattened.

Then, contact holes are formed in the interlayer insulators 214 and 215, and the electrodes / wirings 217 and 218 of the TFT are formed of a metal material, for example, a multilayer film of titanium nitride and aluminum. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere at 1 atm to complete an active matrix pixel circuit having a TFT. (FIG. 8
(F))

Since the TFT manufactured in this embodiment can obtain high mobility, it can be used for a driver circuit of an active matrix type liquid crystal display device. Specifically, an N channel having a mobility of 250 cm ² / Vs or more was obtained. This is considered to be due to the fact that the crystal orientation became very high, and the potential barrier at the grain boundaries was lowered.

[Embodiment 8] This embodiment is a modification of the lateral growth method of Embodiment 7 to a method using OCD.
That is, the silicon oxide film 205 having a thickness of 500 to 2,000 Å, for example, 1000 し た continuously formed after the intrinsic (I-type) amorphous silicon film 203 of 500 省略 is omitted, and instead, SOG containing nickel is used. Membrane, here OCD Type-2 non-doped material Si-5 manufactured by Tokyo Ohka
Using 9000-SG, a film containing a nickel compound therein was formed. Prior to film formation, the surface is exposed to ozone to form a very thin oxide film.
Was formed. Thereafter, prebaking at 80 ° C. and 150 ° C. was performed, and then curing at 250 ° C. was performed. If the temperature of this cure is too high, care must be taken because nickel already diffuses into the amorphous silicon in this step. Also, it is necessary to be careful that the very thin oxide film generated by ozone acts as a diffusion barrier in this curing step, and without this, nickel is sufficiently diffused even at 250 ° C. Next, predetermined patterning is performed. This patterning was performed by using the mask of Example 7 and inverting the film with a resist. In the etching after patterning, a drain process is more preferable than a wet process because the OCD etching rate is very fast. The following steps are substantially the same as in the seventh embodiment, and will not be described. The characteristics of the obtained TFT were almost the same as those of Example 7. The gate portion of the obtained TFT was peeled off, and the orientation of the active layer portion thereunder was examined by electron beam diffraction. As a result, it was observed that the TFT had a substantially (200) orientation.

[Embodiment 9] This embodiment relates to a P-channel type TFT using a crystalline silicon film formed on a glass substrate.
This is an example of forming a circuit in which a TFT (referred to as PTFT) and an N-channel TFT (referred to as NTFT) are combined in a complementary manner. The configuration of this embodiment can be used for a switching element of a pixel electrode and a peripheral driver circuit of an active type liquid crystal display device, as well as an image sensor and an integrated circuit. FIG. 10 shows a cross-sectional view of a manufacturing process of this example. First,
On a substrate (Corning 7059) 301, a 2000-nm-thick silicon oxide base film 302 is formed by a sputtering method. Next, a mask 303 formed using a metal mask, a silicon oxide film, or the like is provided. This mask 30
3 exposes the base film 302 in a slit shape in a region 300. That is, when the state of FIG. 10A is viewed from above, the base film 302 is exposed in a slit shape, and the other portions are masked.

After the mask 303 is provided, a nickel silicide film (NiSi _x , 0.4 ≦ x ≦ 2.
5, for example, x = 2.0) is selectively formed in a region of 300.

Then, an intrinsic (I-type) film having a thickness of 500 to 1500 °, for example, 1000 ° is formed by a plasma CVD method.
Of the amorphous silicon film 304 is formed. Then, the mixture is placed in a hydrogen reducing atmosphere (preferably, a partial pressure of hydrogen is 0.1 to 1 atm) at 550 ° C. or in an inert atmosphere (atmospheric pressure).
Anneal at 50 ° C. for 4 hours to crystallize. On this occasion,
In the region 300 where the nickel silicide film is selectively formed, the amorphous silicon film 3 is perpendicular to the substrate 301.
Crystallization of 04 occurs. Then, in a region other than the region 300, as indicated by an arrow 305, crystal growth is performed in a lateral direction (a direction parallel to the substrate) from the region 300.

As a result of the above steps, the amorphous silicon film 304 can be crystallized to obtain a crystalline silicon film. Thereafter, a silicon oxide film 306 having a thickness of 1000 ° is formed as a gate insulating film by a sputtering method. For sputtering, silicon oxide was used as a target, and the substrate temperature during sputtering was 200 to 400 ° C., for example, 350 ° C.
C., the sputtering atmosphere is oxygen and argon, and argon / oxygen = 0 to 0.5, for example, 0.1 or less. Then, isolation between elements is performed to determine an active layer region of the TFT. At this time, it is important that the tip of crystal growth indicated by 305 does not exist in a portion to be a channel formation region. This makes it possible to prevent carriers moving between the source and the drain from being affected by the nickel element in the channel formation region.

Subsequently, by the sputtering method,
Aluminum (containing 0.1 to 2% of silicon) having a thickness of 6000 to 8000 °, for example, 6000 ° is deposited.

Then, the aluminum film is patterned to form gate electrodes 307 and 309. Further, the surface of the aluminum electrode is anodized to form oxide layers 308 and 310 on the surface. This anodization was performed in an ethylene glycol solution containing tartaric acid at 1 to 5%. The thickness of the obtained oxide layers 308 and 310 is 200
It was 0 °. Note that the oxides 308 and 310
In the later ion doping step, the thickness is such that the offset gate region is formed, so that the length of the offset gate region can be determined in the anodic oxidation step.

Next, an impurity imparting one conductivity type is added to the active layer region (constituting the source / drain and channel) by ion implantation. In this doping step, impurities (phosphorus and boron) are implanted using the gate electrode 307 and the surrounding oxide layer 308 and the gate electrode 309 and the surrounding oxide layer 310 as masks. Phosphine (PH ₃ ) and diborane (B
₂ H ₆ ), and in the former case, the accelerating voltage is 60 to 90
kV, for example 80 kV, in the latter case 40-80 k
V, for example, 65 kV. Dose amount is 1 × 10 ¹⁵ -8
× 10 ¹⁵ cm ^-2 , for example, phosphorus is 2 × 10 ¹⁵ cm ^-2 and boron is 5 × 10 ¹⁵ . At the time of doping, each element is selectively doped by covering one region with a photoresist. As a result, N-type impurity regions 314 and 316 and P-type impurity regions 311 and 31
3 is formed, and a region of a P-channel TFT (PTFT) and a region of an N-channel TFT (NTFT) can be formed.

Thereafter, annealing is performed by laser light irradiation. As the laser light, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) was used, but another laser may be used. The irradiation condition of the laser beam is such that the energy density is 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ^2, and ² to 10
A shot, for example, two shots is irradiated. It is useful to heat the substrate to about 200 to 450 ° C. at the time of this laser light irradiation. In this laser annealing step, nickel is diffused in the previously crystallized region, so that the laser light irradiation facilitates recrystallization, and the impurity doped with an impurity imparting a P-type. Area 3
The impurity regions 11 and 313 and the impurity regions 314 and 316 doped with an impurity for imparting N can be easily activated.

In this step, infrared rays (for example, 1.2 μm)
May be used. Infrared rays are easily absorbed by silicon, and effective annealing comparable to thermal annealing of 1000 degrees or more can be performed. On the other hand, since it is hardly absorbed by the glass substrate, it is not necessary to heat the glass substrate to a high temperature, and the process can be performed in a short time. .

Subsequently, a silicon oxide film 31 having a thickness of 6000.degree.
8 is formed as an interlayer insulator by a plasma CVD method, a contact hole is formed therein, and a metal material, for example, TF is formed by a multilayer film of titanium nitride and aluminum.
The T electrodes / wirings 317, 320, and 319 are formed. Finally, annealing was performed at 350 ° C. for 30 minutes in a hydrogen atmosphere at 1 atm to complete a semiconductor circuit having a complementary TFT. (Fig. 10 (D))

The above-described circuit has a CMOS structure in which PTFT and NTFT are provided in a complementary manner. In the above-described process, two TFTs are formed at the same time and cut at the center, whereby two independent TFTs are simultaneously formed. It is also possible to produce.

FIG. 11 shows an outline of FIG. 10D as viewed from above. The reference numerals in FIG. 11 correspond to those in FIG. FIG.
As shown in (1), the direction of crystallization is the direction indicated by the arrow, and the crystal is grown in the direction of the source / drain region (the line direction connecting the source region and the drain region). During the operation of the TFT having this configuration, carriers move between the source and the drain along the crystal grown in a needle or column shape. That is, the carriers move along the crystal grain boundaries of needle-like or columnar crystals. Therefore, it is possible to reduce the resistance received when the carrier moves, and to obtain a TF having a high mobility.
T can be obtained.

In this embodiment, as a method for introducing Ni, Ni is selectively thinned on the base film 302 under the amorphous silicon film 304 (it is difficult to observe Ni as a thin film). Although the method of forming a crystal and performing crystal growth from this portion is adopted, a method of selectively forming a nickel silicide film after forming the amorphous silicon film 304 may be used. That is, crystal growth may be performed from the upper surface of the amorphous silicon film or from the lower surface. Alternatively, a method in which an amorphous silicon film is formed in advance and nickel ions are selectively implanted into the amorphous silicon film 304 using an ion doping method may be employed. This case has a feature that the concentration of the nickel element can be controlled. The means for introducing nickel into the amorphous silicon film may be a method using a plasma treatment or a CVD method.

[Embodiment 10] This embodiment is an example in which an N-channel TFT is provided in each pixel as a switching element in an active liquid crystal display device. Hereinafter, one pixel will be described, but a large number (generally, hundreds of thousands) of other pixels are formed in a similar structure. Also, N
It goes without saying that a P-channel type may be used instead of a channel type. Further, it can be used not only for the pixel portion of the liquid crystal display device but also for the peripheral circuit portion. Further, it can be used for image sensors and other devices. That is, as long as it is used as a thin film transistor, its use is not particularly limited.

FIG. 12 shows an outline of the manufacturing process of this embodiment.
In this embodiment, the substrate 401 is Corning 70
59 glass substrate (1.1 mm thick, 300 × 400 m
m) was used. First, a base film 402 (silicon oxide) is formed to a thickness of 2000 ° by a sputtering method. Thereafter, in order to selectively introduce nickel, a mask 40 is formed using a metal mask, a silicon oxide film, a photoresist, or the like.
Form 3 Then, a nickel silicide film is formed by a sputtering method. This nickel silicide film is formed to a thickness of 5 to 200 °, for example, 20 ° by a sputtering method. This nickel silicide film has the chemical formula NiS
_{i x, 0.4 ≦ x ≦ 2.5} , for example, represented by x = 2.0. Thus, a nickel silicide film is selectively formed in the region 404.

Thereafter, LPCVD or plasma C
An amorphous silicon film 405 is formed to a thickness of 1000 ° by the VD method, dehydrogenated at 400 ° C. for 1 hour, and then crystallized by heat annealing. This annealing step was performed at 550 ° C. for 4 hours under a hydrogen reducing atmosphere (preferably, a partial pressure of hydrogen was 0.1 to 1 atm). This heat annealing step may be performed in an inert atmosphere such as nitrogen.

In this annealing step, since a nickel silicide film is formed in a part of the region under the amorphous silicon film 405, crystallization occurs from this part. At the time of this crystallization, as shown by the arrow in FIG. 12B, in the portion 404 where the nickel silicide is formed, crystal growth of silicon proceeds in a direction perpendicular to the substrate 401. Similarly, as indicated by an arrow, in a region where nickel silicide is not formed (a region other than the region 404),
Crystal growth occurs in parallel directions.

Thus, the semiconductor film 4 made of crystalline silicon
05 can be obtained. Next, the semiconductor film 405 is patterned to form an island-shaped semiconductor region (TFT active layer).
To form At this time, it is important that the tip of the crystal grown as indicated by the arrow does not exist in the active layer, particularly in the channel formation region. Specifically, when the tip of the arrow in FIG. 12B is the end point (end) for crystal growth, the crystallinity of the portion 404 where nickel is introduced and the end of the arrow (left end in the drawing) It is useful to remove the silicon film 405 by etching and use the intermediate portion of the crystalline silicon film 405 that has grown in a direction parallel to the substrate as an active layer. This is based on the fact that nickel is concentrated at the tip of crystal growth,
This is to prevent adverse effects on the characteristics of the device.

Further, tetraethoxysilane (TEO)
S) as a raw material, a gate insulating film of silicon oxide (thickness of 70 to 120 n) is formed by a plasma CVD method in an oxygen atmosphere.
m, typically 100 nm) 406. The substrate temperature is set to 400 ° C. or less, preferably 200 to 350 ° C. in order to prevent shrinkage and warpage of the glass.

Next, a known film containing silicon as a main component is
By forming by CVD method and performing patterning,
A gate electrode 407 is formed. Then, with N-type impurities
Implant phosphorus by ion implantation and self-align
Region 408, channel formation region 409, drain region
Step 410 is formed. Then, a KrF laser beam is irradiated.
Crystallinity deteriorated due to ion implantation
Improve the crystallinity of the silicon film. At this time the laser light
Energy density of 250-300 mJ / cm ^TwoToss
You. By this laser irradiation, the source of this TFT /
The sheet resistance of the drain is 300-800Ω / cm^TwoTona
You. This annealing step is performed by infrared lamp annealing.
Is useful.

Thereafter, the interlayer insulator 41 is formed by silicon oxide.
1 is formed, and the pixel electrode 412 is formed by ITO. Then, a contact hole is formed and TF
The electrodes 413 and 414 are formed of a chromium / aluminum multilayer film in the source / drain region of T, and one of the electrodes 414 is also connected to the ITO 412. Finally, annealing in hydrogen at 200 to 300 ° C. for 2 hours,
Complete silicon hydrogenation. In this way, the TFT
To complete. This process is performed simultaneously in many other pixel regions.

In the TFT manufactured in this embodiment, a crystalline silicon film grown in the direction in which carriers flow is used as an active layer constituting a source region, a channel formation region, and a drain region. , Ie, the carriers move along the crystal grain boundaries of the needle-like or columnar crystals, so that a TFT with high carrier mobility can be obtained. The TFT manufactured in this example is an N-channel type, and has a mobility of 9
0 to 130 (cm ² / Vs). Conventional 600
This is large compared to the fact that the transfer to an N-channel TFT using a crystalline silicon film obtained by crystallization by thermal annealing at 48 ° C. for 48 hours is 80 to 100 (cm ² / Vs). It is an improvement in characteristics.

Further, a P-channel TFT was manufactured by the same manufacturing method as in the above steps, and its mobility was measured to be 50 to 80 (cm ² / Vs). This is also a conventional P-channel type TFT using a crystalline silicon film obtained by crystallization by thermal annealing at 600 ° C. for 48 hours.
This is a great improvement in characteristics as compared with the case where the movement was 30 to 60 (cm ² / Vs).

[Embodiment 11] This embodiment is an example in which the source / drain is provided in a direction substantially perpendicular to the crystal growth direction in the TFT shown in Embodiment 10. That is, in this example, the moving direction is perpendicular to the crystal growth direction, and the carrier moves so as to cross the crystal grain boundaries of the acicular or columnar crystals. With such a configuration,
The resistance between the source and the drain can be increased. This is because the carriers must move across the crystal grain boundaries of the crystal grown in a needle or column shape. In order to realize the configuration of this embodiment, in the configuration shown in the tenth embodiment, it is sufficient to simply set the direction in which the TFT is provided.

[Embodiment 12] In this embodiment, in the configuration shown in Embodiment 10, the direction of providing the TFT (here, the source /
It is defined by a line connecting the drain regions. That is, the characteristic of the TFT is selected by setting the direction of the TFT according to the direction in which carriers flow) at an arbitrary angle with respect to the crystal growth direction of the crystalline silicon film with respect to the substrate surface.

As described above, when carriers are moved in the crystal growth direction, the carriers move along the crystal grain boundaries, so that the mobility can be improved. on the other hand,
When moving carriers in a direction perpendicular to the crystal growth direction, the carriers have to cross many grain boundaries, so that the carrier mobility decreases.

Therefore, the angle between the two states, that is, the angle between the crystal growth direction and the direction in which carriers move, is set to 0 to 90.
By setting within the range of °, the mobility of the carrier can be controlled. From another viewpoint, the resistance between the source / drain regions can be controlled by setting the angle between the crystal growth direction and the direction in which carriers move. Of course, this configuration can also be used for the configuration shown in FIG. In this case, FIG.
The slit-shaped nickel trace addition region 300 shown in FIG.
Rotation is performed within a range of 90 °, and the angle between the crystal growth direction indicated by arrow 305 and the line connecting the source / drain regions is 0 to 9
It will be selected in the 0 ° range. When the angle is close to 0 °, the mobility is large and the electrical resistance between the source and the drain can be small. When this angle is close to 90 °, a structure with low mobility and high resistance between source / drain can be obtained.

[0162]

When a non-single-crystal silicon semiconductor film having crystallinity provided on a substrate and grown in a direction parallel to the surface of the substrate and having crystallinity is used for the TFT, the direction of flow of carriers moving in the TFT is controlled by the crystal growth. The carrier movement along the grain boundaries of the crystals grown in a needle-like or columnar shape (parallel) to obtain a TFT having high mobility. I can do this.

In addition, since the metal element for promoting crystallization is concentrated at the tip where the crystal has grown in the direction parallel to the substrate, the TFT is formed by avoiding this region. The stability and reliability of the operation of the TFT can be improved. Furthermore, by introducing a catalytic element to crystallize in a short time at a low temperature and further manufacturing a semiconductor device using a crystalline silicon film irradiated with laser light or strong light, high productivity and good characteristics are obtained. You can get the device.

[Brief description of the drawings]

FIG. 1 shows the catalytic element concentration dependency of the orientation in a crystalline silicon film.

FIG. 2 is a model diagram illustrating a crystallization mechanism.

FIG. 3 shows a manufacturing process of an example.

FIG. 4 shows a result of X-ray diffraction of a crystalline silicon film.

FIG. 5 shows a manufacturing process of an example.

FIG. 6 shows a result of X-ray diffraction of a crystalline silicon film.

FIG. 7 shows a manufacturing process of an example.

FIG. 8 shows a manufacturing process of the example.

FIG. 9 shows the relationship between the thickness of a crystalline silicon film and the orientation.

FIG. 10 shows a manufacturing process of the example.

FIG. 11 shows an outline of an embodiment.

FIG. 12 illustrates a manufacturing process of the example.

FIG. 13 is a photograph showing a crystal structure of a silicon film.

FIG. 14 is a photograph showing a crystal structure of a silicon film.

FIG. 15 is a photograph showing a crystal structure of a silicon film.

FIG. 16 is a schematic diagram illustrating a crystal orientation of a silicon film.

FIG. 17 shows the concentration of nickel in a silicon film.

FIG. 18 is a photograph showing a state of a silicon thin film.

FIG. 19 is a schematic diagram illustrating a crystallization mechanism of a silicon film.

[Explanation of symbols]

 11: Glass substrate 12: Amorphous silicon film 20: Silicon oxide film 14: Nickel-containing acetic acid solution film 15: Spinner 21: Mask Silicon oxide film 22 Vertical growth portion 23 Horizontal growth portion 13 Silicon oxide film 104 Active layer 105 Silicon oxide film 106 Gate electrode 109 Oxide layer 108 source / drain region 109 drain / source region 110 interlayer insulating film (silicon oxide film) 112 electrode 113 electrode 114 channel formation region 201 ..Glass substrate 202... Base film 203... Silicon film 205... Silicon oxide film for mask 206. ... Oxidation Base film 210: Gate electrode 211: Oxide 212: N-type impurity region 213: N-type impurity region 214: Silicon oxide film (interlayer insulator) 215: Interlayer insulation Object 217: Electrode / wire 218 ... Electrode / wire 301 Glass substrate 302 Underlayer (silicon oxide film) 303 Mask 304 Silicon film 305 Crystallization direction 306 Gate insulating film 307 Gate electrode 308 Anodized layer 309 Gate electrode 310 Anodized layer 311 Source / drain region 312 Channel formation region 313 Drain / source region 314 Source / drain region 315 Channel formation region 316 Drain / source region 317 Electrode 318 Interlayer insulator 320 Electrode 319 Electrode 401 Glass substrate 402 Glass substrate 402 Silicon film) 403 Mask 404 Nick Micro-addition region 405 Silicon film 406 Gate insulating film 407 Gate electrode 408 Source / drain region 409 Channel formation region 410 Drain / source region 411 Interlayer insulator 413 Electrode 414 Electrode 412 ITO (pixel electrode) 501 Crystal growth surface 502 Crystalline silicon 503 Amorphous silicon 504 Apparent crystal growth direction 505 Apparent crystal growth direction 506 Crystal growth surface

Continued on the front page (72) Inventor Toru Takayama 398 Hase, Atsugi-shi, Kanagawa Prefecture Inside Semi-Conductor Energy Laboratory Co., Ltd. Person Shoji Miyanaga 398 Hase, Atsugi-shi, Kanagawa Semiconductor Energy Research Institute, Inc.

Claims (20)

[Claims] 1. A semiconductor device using a non-single-crystal silicon semiconductor film having crystallinity provided on a substrate, wherein the non-single-crystal silicon semiconductor film having crystallinity is substantially parallel to the surface of the substrate. A semiconductor device comprising a crystal grown in a needle or column shape in a direction, and a crystal growth surface is substantially a (111) plane. 2. A semiconductor device using a non-single-crystal silicon semiconductor film having crystallinity provided on a substrate, wherein the non-single-crystal silicon semiconductor film having crystallinity contains a metal element. The non-single-crystal silicon semiconductor film having crystallinity includes crystals grown in a needle-like or columnar shape in a direction substantially parallel to the substrate surface, and a crystal growth surface is substantially a (111) plane. Semiconductor device. 3. The method according to claim 2, wherein Ni, Pd, Pt, Cu, Ag, A
A semiconductor device comprising one or more elements selected from u, In, Sn, Pb, As, and Sb. 4. The method according to claim 2, wherein the concentration of the metal element is 1 × 10 ¹⁶ atoms cm ⁻³ to 1 × 10 6.
A semiconductor device characterized by being ¹⁹ atoms cm ⁻³ . 5. A semiconductor device using a non-single-crystal silicon semiconductor film having crystallinity provided on a substrate, wherein the non-single-crystal silicon semiconductor film having crystallinity is substantially parallel to a surface of the substrate. The crystal growth direction substantially coincides with the direction of the <111> axis, and the crystal growth direction substantially coincides with the direction in which carriers move in the semiconductor device. A semiconductor device characterized by the above-mentioned. 6. A semiconductor device using a non-single-crystal silicon semiconductor film having crystallinity provided on a substrate, wherein the non-single-crystal silicon semiconductor film having crystallinity is substantially parallel to a surface of the substrate. Including crystals grown in a needle-like or columnar shape, and having a crystal grain boundary along a direction substantially parallel to the substrate surface, wherein the direction along the crystal grain boundary and the direction in which carriers in the semiconductor device move are defined as: A semiconductor device characterized by being substantially matched. 7. A semiconductor device using a non-single-crystal silicon semiconductor film having crystallinity provided on a substrate, wherein the non-single-crystal silicon semiconductor film having crystallinity is in a direction substantially parallel to a substrate surface. The crystal growth direction has high conductivity with respect to other directions, and the crystal growth direction and the direction in which carriers move in the semiconductor device are substantially matched. A semiconductor device characterized by the above-mentioned. 8. A thin film transistor using a non-single-crystal silicon semiconductor film having crystallinity provided on a substrate, wherein the non-single-crystal silicon semiconductor film having crystallinity is arranged in a direction substantially parallel to a surface of the substrate. A semiconductor device comprising a crystal grown in a needle-like or columnar shape, wherein the crystal growth direction and the direction of a carrier flowing in a channel of the thin-film transistor are substantially matched. 9. A thin film transistor using a non-single-crystal silicon semiconductor film having crystallinity provided on a substrate, wherein the non-single-crystal silicon semiconductor film having crystallinity is arranged in a direction substantially parallel to a surface of the substrate. A crystal having a needle-like or columnar shape, wherein the crystal growth direction has a substantially <111> axis direction, and that the crystal growth direction and the direction of the carrier flowing in the channel of the thin film transistor are substantially matched. Characteristic semiconductor device. 10. A semiconductor device using a non-single-crystal silicon semiconductor film having crystallinity provided on a substrate, wherein the non-single-crystal silicon semiconductor film having crystallinity is substantially parallel to a surface of the substrate. The semiconductor device is formed in an intermediate region of crystal growth in a region where the crystal grows in a direction substantially parallel to the substrate surface. A semiconductor device, wherein the direction substantially matches the direction in which carriers move in the semiconductor device. 11. A step of introducing a metal element that promotes crystallization of an amorphous silicon film on a substrate having an insulating surface, and a step of forming an amorphous silicon film on the substrate into which the metal element has been introduced. A step of performing a heat treatment to crystallize a part or all of the amorphous silicon film, and a step of irradiating laser light or strong light to obtain a crystalline silicon film. Has a general (111) orientation. 12. A crystalline silicon film formed on a substrate, wherein the crystalline silicon film is crystal-grown from a metal element that promotes crystallization introduced at an interface with the substrate, A semiconductor, wherein the crystalline silicon film is substantially (111) oriented. 13. A non-single-crystal silicon semiconductor film having crystallinity provided on a substrate, wherein the non-single-crystal silicon semiconductor film has grown into a needle or column shape in a direction substantially parallel to the substrate surface. A semiconductor element containing a metal element that promotes crystallization. 14. A non-single-crystal silicon semiconductor film having crystallinity provided on a substrate, wherein the non-single-crystal silicon semiconductor film grows in a needle shape or a column shape in a direction substantially parallel to the substrate surface. And a crystal comprising crystals grown in a uniform direction. 15. A semiconductor device having a crystalline silicon film, wherein the silicon film has a (111) orientation ratio of 0.33 to 1, and a metal element which promotes crystallization in the silicon film. A semiconductor device, characterized in that is added. 16. A semiconductor device having a crystalline silicon film formed on a substrate having an insulating surface, wherein the crystalline silicon film has a portion where a crystal is grown in a direction parallel to the substrate. The portion where (111) orientation ratio is 0.6
7. A semiconductor device, comprising: a metal element that promotes crystallization in the crystalline silicon film. 17. A semiconductor device having a crystalline silicon film formed on a substrate having an insulating surface, wherein the crystalline silicon film has a portion where a crystal is grown in a direction parallel to the substrate. The (111) orientation ratio is 0.7
A semiconductor device, wherein the crystalline silicon film has a thickness of 800 ° or less, and a metal element that promotes crystallization is added to the crystalline silicon film. 18. A semiconductor device having a crystalline silicon film into which a metal element that promotes crystallization is introduced, wherein the grain size of the crystalline silicon film is determined by the amount of the metal element that promotes crystallinity. A semiconductor device characterized by being controlled by: 19. The method according to claim 18, wherein Ni, Pd, Pt, Cu, Ag, A
A semiconductor device comprising one or more elements selected from u, In, Sn, Pb, As, and Sb. 20. The method according to claim 18, wherein the concentration of the metal element is 1 × 10 ¹⁶ atoms cm ⁻³ to 1 × 10
A semiconductor device characterized by being ¹⁹ atoms cm ⁻³ .