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JP2000502238A - Method of manufacturing contacts suitable for flip chip assembly of electrical components - Google Patents

Method of manufacturing contacts suitable for flip chip assembly of electrical components

Info

Publication number
JP2000502238A
JP2000502238A JP09523212A JP52321297A JP2000502238A JP 2000502238 A JP2000502238 A JP 2000502238A JP 09523212 A JP09523212 A JP 09523212A JP 52321297 A JP52321297 A JP 52321297A JP 2000502238 A JP2000502238 A JP 2000502238A
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JP
Japan
Prior art keywords
film
cover
conductive
chip assembly
deposited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP09523212A
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Japanese (ja)
Other versions
JP4413278B2 (en
Inventor
パール、ウォルフガング
シュテルツル、アロイス
クリューガー、ハンス
Original Assignee
シーメンス マツシタ コンポーネンツ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング ウント コンパニ コマンデイート ゲゼルシヤフト
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by シーメンス マツシタ コンポーネンツ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング ウント コンパニ コマンデイート ゲゼルシヤフト filed Critical シーメンス マツシタ コンポーネンツ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング ウント コンパニ コマンデイート ゲゼルシヤフト
Publication of JP2000502238A publication Critical patent/JP2000502238A/en
Application granted granted Critical
Publication of JP4413278B2 publication Critical patent/JP4413278B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/08Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of resonators or networks using surface acoustic waves
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3171Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Acoustics & Sound (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】 基板(1)上に設けられた導電構造(3)がカバー(2)により密封されているSAW素子のフリップチップアセンブリーに適した接触の製造方法において、カバー(2)が作られた後、導電構造(3)のパッドと接触するろう接可能な膜(4)が形成される。 (57) [Summary] In a method of manufacturing a contact suitable for a flip chip assembly of a SAW element, a conductive structure (3) provided on a substrate (1) is sealed by a cover (2). Is formed, a brazeable film (4) is formed which contacts the pads of the conductive structure (3).

Description

【発明の詳細な説明】 電気部品のフリップチップアセンブリーに適した接触の製造方法 この発明は、請求項1の上位概念による、電気部品のフリップチップアセンブ リーに適した接触の製造方法に関する。 先のドイツ特許出願P44415411.9には、基板上の部品構造を封止す るキャップを備えた電子部品のための密封構造が記載され、この密封構造におい てはキャップは基板上に設けられたカバーにより形成され、このカバーは部品構 造の範囲においてこれを収納する空所を持っている。このような密封構造は部品 構造を周囲の影響から保護し、その結果このように密封された電子部品は別の容 器を使用することなく直接さらに使用可能である。 小形化が益々進むに連れ、必要とする容器容積が最小でかつ構造高さも低い部 品が求められる。このような要求は、例えば、テレホンカードやクレジットカー ドのようなチップカードに電子部品を適用する際に課せられる。前記の先のドイ ツ特許出願による密封構造を備えた部品はこれらの要求を最適に満たす。特に、 部品がフリップチップアセンブリーに適した構成に実現されているときにそうで ある。 従来、フリップチップアセンブリーに適した部品は容器、特にセラミック容器 内にマウントされる。その場合、部品系の端子接続面(パッド)に、隆起部(バ ンプ)を備えた選択的にろう接可能な膜が設けられねばならず、このために一連 のプロセス工程が必要であり、この工程は特に表面波(SAW)素子に対しては 、重なり合う面状のフィンガー構造のために短絡の可能性が大きくなるので非常 に問題がある。 この発明の課題は、部品構造を損傷することなくフリップチップアセンブリー に適した接触のためのろう接可能な膜を作ることが可能な方法を提供することに ある。 この課題は冒頭に挙げた種類の方法において、この発明によれば請求項1の特 徴部の特徴事項により解決される。 この発明のさらなる構成は請求項2以下の対象である。 以下にこの発明を図面に示した実施例を参照して詳細に説明する。 図1はこの発明の方法により製造された表面波(SAW)部品の概略図を示し 、図2は図1の部品の部分概略平面図を示す。 図1において、SAW部品は一般に圧電基板1とその上に設けられた導電構造 3とからなり、これは例えばインタデジタル型変換器、共振器或いは反射器の接 触フィンガーを対象とすることができる。冒頭に挙げた先のドイツ特許出願に記 載されているように、導電構造3はキャップ2により覆われており、キャップ2 は構造を環境の影響から保護し、部品は容器としてのカバー2と基板1と共に直 接さらに使用可能である。 この発明によれば、導電構造3の電気的接触のためにフリップチップアセンブ リーに適した接触を作ることが行われる。図1から概略的に分かるように、カバ ー2には窓6が設けられ、この窓を通して導電構造3の(図示されてない)端子 接続面、いわゆるパッドと接触するろう接可能な膜4が設けられる。ろう接可能 な膜4は、その場合、図2から明らかなように、カバー2の部分上にも載ってい る。このろう接可能な膜4としては例えばクロム/クロム銅/銅/金の膜を対象 とすることができる。 ろう接可能な膜を作るために、この発明の1実施例によれば、先ずろう接可能 な物質からなる膜が全面に、即ち全カバー2上にも蒸着され、この膜はそれから 構造化され、それぞれ導電構造3のパッドと接触する個々のろう接可能な膜4が 生じる。 他の実施例によれば、電気的にろう接可能な膜4はまたその膜寸法を決めるマ スクを通して蒸着することもできる。 ろう接可能な膜4を作った後、窓6にはろう接可能な膜4と接触することにな るバンプ7が挿入され、膜4とろう接される。このバンプ7を介して部品は電気 回路に取付けることができる。 この発明による方法は、ろう接可能な膜4とバンプ7とが、部品構造を環境の 影響から保護するカバー2を取りつけた後に初めて作られるという利点を持って いる。従って、部品構造はろう接可能な膜やバンプを作る際の工程から生ずる影 響によってもはや損傷を受けることがない。さらに別の利点は、ろう接可能な膜 が大面積に作られ、その寸法は従って(図示されてない)パッドのそれに対して 大きくすることができるという点にある。 全面にわたって蒸着された膜4の構造化を回避するために、カバー2の窓6は 、それが導電性の膜4のためのマスクとして機能し、同時にその縁部には蒸着さ れないように形成することができる。DETAILED DESCRIPTION OF THE INVENTION       Method of manufacturing contacts suitable for flip chip assembly of electrical components   The invention provides a flip-chip assembly of an electrical component according to the preamble of claim 1. The present invention relates to a method for producing a contact suitable for a lead.   In the earlier German patent application P4445411.9, the component structure on the substrate is encapsulated. A sealing structure for an electronic component with a cap is described. The cap is formed by a cover provided on the substrate, and this cover It has a space to store it in the construction area. Such a sealed structure is a part Protects the structure from surrounding influences, so that the electronic components thus sealed have different It can be further used directly without using a vessel.   As the miniaturization progresses, the required container volume is minimum and the structural height is low. Goods are required. Such requests can be made, for example, by telephone cards or credit cards. Imposed when electronic components are applied to chip cards such as cards. Doi ahead A component with a sealing structure according to the patent application meets these requirements optimally. In particular, This is the case when the components are implemented in a configuration suitable for flip chip assembly. is there.   Conventionally, components suitable for flip chip assembly are containers, especially ceramic containers Mounted inside. In this case, the bumps (bars) should be Must be provided with a selectively brazeable membrane with Is necessary, and this step is particularly necessary for a surface acoustic wave (SAW) element. Very high potential for short circuit due to overlapping planar finger structures There is a problem.   An object of the present invention is to provide a flip chip assembly without damaging the component structure. To provide a method capable of producing a brazeable membrane for suitable contact is there.   This object is achieved in a method of the type mentioned at the beginning according to the invention by the features of claim 1. It is solved by the characteristics of the sign.   A further configuration of the present invention is the subject matter of claim 2.   Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings.   FIG. 1 shows a schematic diagram of a surface acoustic wave (SAW) component manufactured by the method of the present invention. FIG. 2 shows a partial schematic plan view of the component of FIG.   In FIG. 1, a SAW component generally includes a piezoelectric substrate 1 and a conductive structure provided thereon. 3 which is, for example, the connection of an interdigital converter, a resonator or a reflector. Tactile fingers can be targeted. As noted in the earlier German patent application As shown, the conductive structure 3 is covered by the cap 2 Protects the structure from environmental influences and the parts are directly It can be used further.   According to the invention, the flip-chip assembly for the electrical contact of the conductive structure 3 is provided. Making contact suitable for Lee is performed. As can be seen schematically from FIG. 2 is provided with a window 6 through which terminals (not shown) of the conductive structure 3 are provided. A brazingable film 4 is provided which is in contact with a connection surface, a so-called pad. Brazing possible In this case, the transparent film 4 also rests on the part of the cover 2 as is evident from FIG. You. The film 4 capable of being soldered is, for example, a chromium / chromium copper / copper / gold film. It can be.   According to one embodiment of the present invention, to form a brazeable membrane, first a brazeable A film made of a substance is deposited on the entire surface, that is, on the entire cover 2, and this film is then Structured individual brazeable membranes 4, each in contact with a pad of conductive structure 3, Occurs.   According to another embodiment, the electrically solderable membrane 4 also has a dimensioning mechanism. It can also be deposited through a mask.   After making the brazeable membrane 4, the window 6 will come into contact with the brazeable membrane 4. Bump 7 is inserted and brazed to the membrane 4. Parts are electrically connected via the bumps 7 Can be mounted on circuits.   In the method according to the invention, the solderable film 4 and the bumps 7 make the component structure environmentally friendly. With the advantage that it is made only after attaching the cover 2 that protects from the effects I have. Therefore, the component structure is affected by the process of making brazing films and bumps. No longer damaged by sound. Yet another advantage is the brazeable membrane Is made in a large area, and its dimensions are therefore relative to that of the pad (not shown). The point is that it can be enlarged.   In order to avoid structuring of the film 4 deposited over the entire surface, the window 6 of the cover 2 , It functions as a mask for the conductive film 4 and at the same time is deposited on its edges It can be formed not to be.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 シュテルツル、アロイス ドイツ連邦共和国 デー―81549 ミュン ヘン トラウンシュタインシュトラーセ 33 (72)発明者 クリューガー、ハンス ドイツ連邦共和国 デー―81737 ミュン ヘン ペラローシュトラーセ 13────────────────────────────────────────────────── ─── Continuation of front page    (72) Inventors Steltzl, Alois             Germany Day-81549 Mün             Hen Traunsteinstrasse             33 (72) Kruger, Hans, inventor             Germany Day-81737 Mün             Hen Pera Strasse 13

Claims (1)

【特許請求の範囲】 1.基板(1)上に設けられた導電構造(3)がキャップ状のカバー(2)によ ―り環境の影響に対して密封されている電気部品、特に音響表面波で作動する部 品(SAW素子)の、フリップチップアセンブリーに適した接触を製造するため の方法であって、カバー(2)が作られた後、このカバー(2)の窓(6)を通 して導電構造(3)の端子接続面(パッド)と接触するろう接可能な膜(4)が 形成されることを特徴とする電気部品のフリップチップアセンブリーに適した接 触の製造方法。 2.先ずろう接可能な物質からなる膜が全面にわたって蒸着され、この全面にわ たる膜が、それぞれ導電構造(3)のパッドと接触するろう接可能な個々の膜( 4)が生ずるように構造化されることを特徴とする請求項1に記載の方法。 3.導電性の膜(4)がマスクを通して蒸着されることを特徴とする請求項1に 記載の方法。 4.導電性の膜(4)の寸法が導電構造(3)のパッドの寸法に対して大きいこ とを特徴とする請求項1乃至3のいずれか1つに記載の方法。 5.カバー(2)の窓にろう接可能な膜(4)と接触するバンプ(7)が形成さ れることを特徴とする請求項1乃至4のいずれか1つに記載の方法。 6.導電性の膜(4)が全面にわたって蒸着され、その際カバー(2)が、導電 性の膜(4)の上に蒸着された膜がカバー(2)の上に蒸着された膜と非導電的 に接続されているようにマスクとして使用されることを特徴とする請求項1乃至 5のいずれか1つに記載の方法。[Claims] 1. The conductive structure (3) provided on the substrate (1) is formed by a cap-shaped cover (2). --Electrical components that are sealed against environmental influences, especially those that operate with acoustic surface waves To produce contacts suitable for flip-chip assembly of products (SAW devices) After the cover (2) is made, the cover (2) is passed through the window (6). To form a solderable film (4) in contact with the terminal connection surface (pad) of the conductive structure (3). A connection suitable for flip-chip assembly of electrical components characterized by being formed Manufacturing method of touch. 2. First, a film made of a brazeable material is deposited over the entire surface, and a Barrel films are solderable individual films (in each case in contact with the pads of the conductive structure (3)) Method according to claim 1, characterized in that structure (4) is effected. 3. 2. The method according to claim 1, wherein the conductive film is deposited through a mask. The described method. 4. The size of the conductive film (4) is larger than the size of the pad of the conductive structure (3). The method according to any one of claims 1 to 3, wherein: 5. A bump (7) is formed in the window of the cover (2) in contact with the film (4) that can be soldered. The method according to claim 1, wherein the method is performed. 6. A conductive film (4) is deposited over the entire surface, with the cover (2) being electrically conductive. The film deposited on the conductive film (4) is electrically non-conductive with the film deposited on the cover (2). 4. The method according to claim 1, wherein the mask is used as connected to a mask. A method according to any one of the preceding claims.
JP52321297A 1995-12-21 1996-12-16 Method of making a brazeable film for contact suitable for flip chip assembly of electronic components Expired - Lifetime JP4413278B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19548046A DE19548046C2 (en) 1995-12-21 1995-12-21 Method for producing contacts of electrical components suitable for flip-chip assembly
DE19548046.5 1995-12-21
PCT/DE1996/002412 WO1997023904A1 (en) 1995-12-21 1996-12-16 Process for producing contacts on electrical components suitable for a flip-chip assembly

Publications (2)

Publication Number Publication Date
JP2000502238A true JP2000502238A (en) 2000-02-22
JP4413278B2 JP4413278B2 (en) 2010-02-10

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JP52321297A Expired - Lifetime JP4413278B2 (en) 1995-12-21 1996-12-16 Method of making a brazeable film for contact suitable for flip chip assembly of electronic components

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US (1) US6057222A (en)
EP (1) EP0868744A1 (en)
JP (1) JP4413278B2 (en)
KR (1) KR100445569B1 (en)
CN (1) CN1105397C (en)
CA (1) CA2241037A1 (en)
DE (1) DE19548046C2 (en)
WO (1) WO1997023904A1 (en)

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CN1205800A (en) 1999-01-20
DE19548046C2 (en) 1998-01-15
CN1105397C (en) 2003-04-09
KR100445569B1 (en) 2004-10-15
US6057222A (en) 2000-05-02
EP0868744A1 (en) 1998-10-07
CA2241037A1 (en) 1997-07-03
DE19548046A1 (en) 1997-06-26
WO1997023904A1 (en) 1997-07-03
JP4413278B2 (en) 2010-02-10
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