JP2000341961A - Three level inverter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the effect of parasitic inductance in wiring structure by arranging main circuit conductors such that a first conductor runs in parallel with second and third conductors. SOLUTION: A second conductor 32a is stood from the positive potential side of a first switching element 21a perpendicularly to the axis of a stack 23 and then shifted to the center while substantially keeping parallelism with the axis of the stack. On the other hand, a third conductor 32b is stood from the negative potential side of a fourth switching element 21d perpendicularly to the axis of the stack 23 and then shifted to the center while substantially keeping parallelism with the axis of the stack. Furthermore, a first conductor 33 is laid between the second and third conductor 32a, 32b substantially in parallel therewith. Since currents flow in reverse direction at the part of current route running in parallel, self inductance is canceled by mutual inductance and the total inductance can be minimized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a three-level inverter device using a main switching element and a coupling diode as a flat-type pressure-contact element, and more particularly to a three-level inverter device for suppressing the influence of parasitic inductance in a wiring structure. It is about.

[0002]

2. Description of the Related Art Generally, an inverter device is widely used as a means for driving an induction motor used for a mill fan pump of a rolling plant or the like at a variable speed.

Conventionally, a so-called two-level inverter device having switching elements connected in series has been used as a main circuit of this type of inverter device.

In this two-level inverter device, a large current flows through each switching element of the upper and lower arms, and a high voltage may be applied when the switching element is turned off. This voltage increases as the inductance of the circuit wiring increases. In order to reduce the wiring inductance, recently, for example, Japanese Patent Application No. 6-093620 and Japanese Patent Application No. 6-36030.
As described in Japanese Unexamined Patent Application Publication No. 10-164857, a structure in which a wide conductor plate and an insulator are laminated has been proposed.

[0005]

SUMMARY OF THE INVENTION These proposals are to reduce the inductance of the wiring structure in a module type switching element, but the inductance in an inverter circuit structure using a flat type switching element which needs to be pressed and held. Not enough attention has been paid to the reduction of

In particular, in recent years, as a circuit corresponding to an increase in capacity, a so-called 3 in which switching elements are connected in 4 series,
Level inverter devices have been applied.

FIG. 14 is a circuit diagram showing a configuration example of a main circuit (arm) of a conventional three-level inverter device of this kind.

As shown in FIG. 14, a three-level inverter device 1 includes main circuits (arms) 2a, 2b, 2c for each phase,
3a, 3b are connected between the positive potential side P and the negative potential side N of the DC voltage source by four main switching elements 5a, 5b, 5c,
A series circuit of 5d is connected, an AC terminal is derived from a connection point of the main switching elements 5b and 5d, and an induction motor 4 to be driven is connected.

The main switching elements 5a and 5b
And the intermediate potential point of the DC voltage source (the connection point of the two smoothing capacitors 3a and 3b connected in series between the positive potential side P and the negative potential side N of the DC voltage source) C The diode 7a is connected, and the coupling diode 7b is connected between the connection point of the main switching elements 5c and 5d and the intermediate potential point C of the DC voltage source.

Furthermore, the main switching elements 5a, 5b,
In parallel with 5c, 5d, freewheeling diodes 6a, 6b, 6
c and 6d are connected respectively.

Here, the main switching elements 5a, 5b,
In the case of applying a flat switching element that requires pressure holding as 5c and 5d, the technique of laminating the wide conductor plate and the insulator described above cannot be used.

That is, unlike the module type, the pressure contact type element does not have the electrode terminals in a plane, and the disk-shaped both sides are the electrodes of the anode electrode and the cathode electrode. This is because the reduction in inductance due to the laminate of the metal and the insulator cannot be employed as it is.

In the three-level inverter device, coupling diodes 7a and 7b are added, so that main switching elements 5a, 5b, 5c and 5d and return diodes 6a and
6b, 6c, 6d and coupling diodes 7a, 7d.
It is necessary to configure the pressurizing and holding of b, and at this time, the conductor connection forming the three-level inverter device is also complicated three-dimensionally.

Next, regarding other problems of the prior art,
This will be described with reference to FIGS.

FIG. 15 is a circuit diagram showing the periphery of the arm of the three-level inverter device for explaining a problem in the DC clamp snubber circuit 17 corresponding to each arm.

Here, for convenience of explanation, the smoothing capacitors 3a and 3b and the DC clamp snubber circuit 17 are shown.

In FIG. 15, a DC clamp snubber circuit 17 includes a main switching element 5 for each phase from smoothing capacitors 3a and 3b constituting a three-level inverter device.
In order to absorb the energy of the inductance of the wiring conductors up to a, 5b, 5c and 5d, for each phase, between the positive electrode and the neutral point, the first and second diodes 14a, 14b,
First and second capacitors 15a and 15b, first and second capacitors
Are connected as shown in the figure.

Here, the main switching elements 5a, 5
In addition to minimizing the wiring inductance generated in the current routes around b, 5c, and 5d, it is important to equalize the inductances associated with the positive and negative wiring routes.

That is, this DC clamp snubber circuit 1
If the inductance differs according to 7, the resulting surge voltage will differ.

FIG. 16 is a mounting diagram of one of the DC clamp snubber circuits 17 corresponding to FIG.

Here, for convenience of explanation, the structure of the first conductor 33, the second conductor 32a, and the third conductor 32b of the basic structure of the present invention will be described. It is intended to point out a mounting problem when the connection form of the clamp circuit on the negative side and the negative side is different,
It is not the gist of the conventional example.

In FIG. 16, in the DC clamp snubber circuit 17 on the positive side, the first diode 14a and the first
Is connected to the first discharge resistor 1a.
It is clamped to the positive electrode side via 6a.

Further, the DC clamp snubber circuit 1 on the negative side
In 7, the connection point between the second diode 14b and the second capacitor 15b is clamped to the neutral point via the second discharge resistor 16b.

In the mounting structure, as shown in FIG. 16, the connection of the DC clamp snubber circuit 17 on the positive side is such that the anode side of the first diode 14a is attached to the second conductor 32a, and the cathode of the first diode 14a is connected. Is connected to the first capacitor 15a, and the other electrode of the second capacitor is connected to the first conductor 33.

Further, the DC clamp snubber circuit 1 on the negative side
7 is connected to the anode side of the second diode 14b.
Attached to the first conductor 33 via the conductor 35b, the cathode of the second diode 14b is connected to the first capacitor 15b, and the other electrode of the second capacitor is connected to the second conductor 32b.

FIG. 17 is another mounting diagram of the DC clamp snubber circuit 17 corresponding to FIG.

That is, FIG. 17 differs from FIG. 16 in that the second diode 14b is directly attached to the first conductor 33.

Each mounting structure is designed to minimize the parasitic inductance of the structure generated around the DC clamp snubber circuit 17, but since the connecting conductors and other components do not have the same shape, each DC clamp The parasitic inductance of the snubber circuit 17 will be slightly different.

As described above, in the conventional three-level inverter device in which the pressure contact type switching element is applied as the switching element of the main circuit, there is a problem that the influence of the parasitic inductance in the wiring structure cannot be suppressed.

An object of the present invention is to provide a three-level inverter device capable of suppressing the influence of the parasitic inductance of the wiring structure.

[0031]

In order to achieve the above object, according to the first aspect of the present invention, the first, second, third, and third DC voltage sources are connected between a positive potential side and a negative potential side. A series circuit of the fourth switching element is connected, an AC terminal is derived from a connection point of the second and third switching elements, and a connection point of the first and second switching elements, an intermediate potential point of the DC voltage source, and The first coupling diode is connected between the first and second switching diodes, and the second coupling diode is connected between the connection point of the third and fourth switching elements and the intermediate potential point of the DC voltage source. In a three-level inverter device in which the second, third, and fourth switching elements and the first and second coupling diodes are flat pressure-contact elements, the first, second, third, and fourth switching elements, The first and second coupling diodes and cooling them A heat sink which also serves as a conductor One,
A stack formed by laminating insulating disks; a first conductor connecting between a connection point of the first and second coupling diodes and an intermediate potential point of the DC voltage source; a first switching element and a DC voltage A second conductor connecting between the positive potential side of the source and a third conductor connecting between the fourth switching element and the negative potential side of the DC voltage source; The first switching element is raised at a right angle to the stack axis from the positive potential side, is arranged substantially in parallel with the stack axis, and is arranged at the center, and the third conductor is
The fourth switching element is lifted at a right angle to the stack axis from the negative potential side, is arranged substantially in parallel with the stack axis, and is arranged at the center, and the first conductor is connected to the second conductor.
And the third conductor are arranged so as to run substantially in parallel with each other.

Therefore, in the three-level inverter device according to the first aspect of the present invention, the first, second, third, and fourth switching elements and the first and second coupling diodes are
In the case of a flat pressure welding element, the first conductor (neutral point connection conductor), the second conductor (positive electrode connection conductor), and the third conductor (negative electrode connection conductor) are arranged so as to run in parallel. By configuring the circuit conductors, in the current route in each operation mode of the three-level inverter device, currents flowing in the parallel parallel portions always flow in mutually opposite directions. Can be minimized. In particular, when the pressure contact conditions of the switching element and the coupling diode are the same, the stack can be made the same, which can cope with this.

[0033] According to the second aspect of the present invention, the first aspect is provided.
In the three-level inverter device of the invention, a fourth conductor connecting between a connection point of the first and second switching elements and a positive potential side of the first coupling diode, and the third and fourth switching elements And a fifth conductor connecting between a connection point of the second coupling diode and a negative potential side of the second coupling diode.
A fourth conductor is raised at right angles to the stack axis from between the first and second switching elements and from the positive side of the first coupling diode and remains substantially parallel to the second conductor. And the fifth conductor is raised at right angles to the stack axis from between the third and fourth switching elements and from the positive potential side of the second coupling diode.
Are arranged so as to be substantially parallel to the conductor.

Therefore, in the three-level inverter device according to the second aspect of the present invention, if a flat element is employed as the switching element of the main circuit, a connection conductor for forming the circuit is required after the stack is formed. In each operation mode of the three-level inverter device, the connection conductors in the stack are configured so that the current directions are opposite to each other, so that in each operation mode of the three-level inverter device, self-inductance due to mutual inductance is offset. This can minimize the overall inductance.

According to a third aspect of the present invention, in the three-level inverter device according to the first aspect of the present invention, the sixth conductor connecting between the negative potential side of the second switching element and the AC terminal, A third conductor connecting between the positive potential side of the third switching element and the connection point; and an AC conductor drawn from the connection point of the second and third switching elements. The second switching element is raised at a right angle to the stack axis from the negative potential side, and connected to the AC conductor at the center while maintaining substantially parallel to the stack axis. Raise the switching element at a right angle to the stack axis from the positive potential side,
The stack is connected to the AC conductor in the center so as to be substantially parallel to the stack, and is arranged so as to intervene between the snubber capacitors of the second and third switching elements.

Therefore, in the three-level inverter device according to the third aspect of the present invention, the AC conductor drawn out from the connection point between the second switching element and the third switching element in a circuit is connected to the second switching element and the second switching element. And a case potential of the second clamp capacitor is set to the negative side potential of the second switching element, and a case potential of the third clamp capacitor is set to the third switching element. , The AC conductor and the case potential of the second and third clamp capacitors are the same, and since they do not need to be electrically insulated, they can be brought closer to each other and the unit can be downsized. Can be. In addition, the connection between the capacitor and the switching element in the clamp snubber circuit can be doubled.

On the other hand, according to the present invention, the first, second, third, fourth and fourth DC voltage sources are connected between the positive potential side and the negative potential side of the DC voltage source.
, And an AC terminal is derived from a connection point of the second and third switching elements.
A first coupling diode is connected between a connection point of the first and second switching elements and an intermediate potential point of the DC voltage source, and a connection point of the third and fourth switching elements and an intermediate potential of the DC voltage source. A three-level inverter in which a second coupling diode is connected between the first and second switching diodes and the first, second, third, and fourth switching elements and the first and second coupling diodes are used as flat pressure-contact elements. In the device, the first, second,
Third and fourth switching elements, a heat sink that cools them and also serves as a conductor, a first stack of laminated insulating disks, first and second coupling diodes, and cooling of these. A second stack formed by stacking a heat sink also serving as a conductor and an insulating disk;
A first conductor connecting between a connection point of the first and second coupling diodes and an intermediate potential point of the DC voltage source, and connecting between the first switching element and a positive potential side of the DC voltage source. The second conductor, the third conductor connecting between the fourth switching element and the negative potential side of the DC voltage source, and the first, second, and third conductors are defined as the first conductor and the second conductor. And the third conductor are arranged so as to run substantially in parallel with each other.

Therefore, in the three-level inverter device according to the fourth aspect of the present invention, the first, second, third, and fourth switching elements and the first and second coupling diodes are
In the case of a flat pressure welding element, the first conductor (neutral point connection conductor), the second conductor (positive electrode connection conductor), and the third conductor (negative electrode connection conductor) are arranged so as to run in parallel. By configuring the circuit conductors, in the current route in each operation mode of the three-level inverter device, currents flowing in the parallel parallel portions always flow in mutually opposite directions. Can be minimized. In particular, when the pressure contact conditions of the switching element and the coupling diode are different, it is necessary to separate the stacks, which can cope with this.

According to the fifth aspect of the present invention, the above first aspect is provided.
Alternatively, a first diode and a first capacitor are connected in series between the positive potential side of the DC voltage source and the intermediate potential point of the DC voltage source for each phase of the three-level inverter device according to the fourth aspect of the present invention. Connected, and a positive-side snubber circuit having a discharging resistor connected in parallel with the first diode, between a negative potential side of the DC voltage source and an intermediate potential point of the DC voltage source,
A negative-side snubber circuit in which a second diode and a second capacitor are connected in series, and a discharging resistor is connected in parallel with the second diode, and is substantially symmetrical about the first conductor , A first diode, a second diode, a first capacitor, and a second capacitor are respectively disposed, and an anode of the first diode is attached to the second conductor directly or via a cooling heat sink. The cathode of one diode is connected to one electrode of a first capacitor using an eighth conductor, and the other electrode of the first capacitor is connected to the first conductor using a ninth conductor Then, the cathode of the second diode is attached to the third conductor directly or via a cooling heat sink, and the anode of the second diode is connected to the second core using the tenth conductor. And connected to one electrode of Densa, the other electrode of the second capacitor, it is connected to the first conductor of the conductor of the 11th.

Therefore, in the three-level inverter device according to the fifth aspect of the present invention, in the three-level inverter device, the positive and negative DC clamp snubber circuits each composed of a capacitor, a diode, and a resistor corresponding to each phase are switched. The anode of the diode of the DC slump snubber circuit is directly attached to the second conductor (positive connection conductor) which is close to the element and which is led from the switching element,
Also, by directly attaching the cathode of the diode of the DC clamp snubber circuit to the third conductor (negative electrode connection conductor), the connection wiring can be eliminated, the inductance can be reduced, and the DC clamp snubber circuit on the positive side and the negative side can be connected. The parasitic structural inductance can be made uniform.
The same effect can be obtained by inserting a heat sink for cooling between the conductor and the diode as necessary. Furthermore, the first diode, the second diode, the first capacitor, and the second capacitor are respectively arranged and connected symmetrically with respect to the first conductor, so that parts can be shared and assemblability can be improved. Improvement,
The layout design can be improved.

According to a sixth aspect of the present invention, for each phase of the three-level inverter device according to the first or fourth aspect of the present invention, a positive potential side of the DC voltage source and an intermediate potential point of the DC voltage source are provided. A first diode and a first capacitor are connected in series, and a positive-side snubber circuit having a discharging resistor connected in parallel with the first diode; and a negative-potential side of a DC voltage source. A second diode and a second capacitor connected in series between the intermediate potential point of the DC voltage source and a negative-side snubber circuit formed by connecting a discharging resistor in parallel with the second diode; A first diode, a second diode, a first capacitor, and a second capacitor are respectively disposed substantially symmetrically about the first conductor, and a cathode of the first diode is provided on the first conductor. Directly Or a cooling heat sink, the anode of the first diode is connected to one electrode of the first capacitor using the eighth conductor, and the other electrode of the first capacitor is connected to the ninth electrode. And the anode of the second diode is attached to the first conductor directly or via a cooling heat sink, and the cathode of the second diode is connected to the first conductor using the tenth conductor. Connected to one electrode of a second capacitor, and the other electrode of the second capacitor is connected to a third conductor using an eleventh conductor.

Accordingly, in the three-level inverter device according to the sixth aspect of the present invention, in the three-level inverter device, the positive and negative DC clamp snubber circuits each composed of a capacitor, a diode, and a resistor corresponding to each phase are switched. The first conductor (neutral point connection conductor) of the DC power supply that is close to the element and has been routed from the switching element
By connecting the positive and negative DC clamp diodes, the connection wiring can be eliminated, the inductance can be reduced and the structural inductance parasitic to the positive and negative DC clamp snubber circuits can be made uniform. it can. The same effect can be obtained by inserting a heat sink for cooling between the conductor and the diode as necessary. Furthermore, the first diode, the second diode, the first capacitor, and the second capacitor are respectively arranged and connected symmetrically with respect to the first conductor, so that parts can be shared and assemblability can be improved. Improvement and layout design can be improved.

On the other hand, according to the invention of claim 7, the above-mentioned claim 5
Alternatively, in the three-level inverter device according to the sixth aspect of the present invention, the ninth and eleventh conductors are wide flat plates, and the first diode, the second diode, and the eighth and tenth conductors that are connection conductors thereof. It includes a conductor area.

Therefore, in the three-level inverter device according to the present invention, the first and second capacitors and the first conductor which is the main circuit conductor, or the connection wiring between the second and third conductors. The ninth and eleventh conductors are wide flat plates, and include an eighth conductor connecting the first diode and the capacitor or a tenth conductor connecting the second diode and the capacitor. As a result, the current flows in the eighth conductor and the first diode facing the ninth conductor and the eleventh conductor, and the current flows in the tenth conductor and the second diode in opposite directions. The wiring inductance of the clamp snubber circuit can be reduced.

According to the invention of claim 8, in claim 5,
Alternatively, in the three-level inverter device according to claim 6, the eighth and tenth conductors are wide flat plates, and the ninth and eleventh conductors are substantially parallel to each other.

Therefore, in the three-level inverter device according to the eighth aspect of the present invention, the eighth and tenth conductors are also wide flat plates, and the ninth and eleventh conductors are in a parallel relationship. Wiring inductances of the positive and negative clamp snubber circuits can be further minimized as compared with the case of the seventh aspect of the present invention.

On the other hand, according to the ninth aspect of the present invention, the above-mentioned first aspect
Alternatively, in the three-level inverter device according to the fourth aspect of the present invention, in the parallel running region of the first conductor, the second conductor, and the third conductor, the electrical insulation between the conductors is reduced by an epoxy-coated conductor or a conductor. It is configured by laminating a solid insulator between them, or by integral molding such as an epoxy mold.

Therefore, in the three-level inverter device according to the ninth aspect of the present invention, in the parallel running region of the first conductor, the second conductor and the third conductor, the electrical insulation between the respective conductors is reduced by epoxy. The distance between the first, second, and third conductors is minimized by coating the conductor, a configuration in which a solid insulator is laminated between the conductors, or an integral molding such as an epoxy mold. The generated mutual inductance can be maximized, the self-inductance cancellation can be maximized, and the total inductance can be minimized.

According to a tenth aspect of the present invention, in the three-level inverter device according to the second aspect of the present invention, the fourth conductor and the fifth conductor are arranged in a parallel running region of the second conductor and the third conductor. The electrical insulation between the conductors is formed by an epoxy-coated conductor, a configuration in which a solid insulator is laminated between the conductors, or an integral molding such as an epoxy mold.

Therefore, in the three-level inverter device according to the tenth aspect of the present invention, in the parallel running region of the second conductor and the third conductor, electrical insulation between each of the fourth and fifth conductors is provided. By using an epoxy-coated conductor, a structure in which a solid insulator is laminated between conductors, or an integral molding such as an epoxy mold to minimize the space distance between the parts where the currents oppose each other and reduce the mutual inductance generated there. Maximization and self-inductance cancellation can be maximized to minimize overall inductance.

According to the eleventh aspect of the present invention, in the three-level inverter device according to the fifth or sixth aspect, the ninth and eleventh conductors are wide flat plates, and the first diode and the second The diode, and the eighth conductor, which is the connection conductor thereof, and the portion facing the tenth conductor,
A barrier made of epoxy coating or solid insulator is provided.

Therefore, in the three-level inverter device according to the eleventh aspect of the present invention, the first diode, the second diode, and the eighth conductor and the tenth
By providing a barrier made of epoxy coating or solid insulator on the part facing the conductor, the distance between these equipment is minimized, the mutual inductance generated in this part is maximized, and the self-inductance cancellation is maximized. Thus, the total inductance can be minimized.

According to a twelfth aspect of the present invention, in the three-level inverter device according to the fifth aspect of the present invention, the parallel and parallel regions of the eighth and ninth conductors and the tenth and eleventh conductors are provided. , The electrical insulation between the conductors is made by an epoxy-coated conductor, a configuration in which a solid insulator is laminated between the conductors, or an integral molding such as an epoxy mold.

Therefore, in the three-level inverter device according to the twelfth aspect of the present invention, in the parallel parallel running region of the eighth conductor and the ninth conductor and the tenth and eleventh conductors, Electrical insulation, epoxy-coated conductors, solid insulators laminated between conductors,
Alternatively, it is possible to minimize the distance facing each other by maximizing the mutual inductance generated at this portion by maximizing the offset of the self-inductance by minimizing the total inductance by configuring the unit integrally with an epoxy mold or the like. .

[0055]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(First Embodiment) FIG. 1 is a front view showing a mounting configuration example corresponding to each phase (arm) of a three-level inverter device according to the present embodiment, FIG. 2 is a top view thereof, and FIG. FIG. 4 is a side view of the same, and FIG. 4 is a circuit diagram showing a configuration example of each phase main circuit (arm) of the three-level inverter device. 1 to 3 show an example of a mounting configuration corresponding to the main circuit diagram of FIG.

The resistors 10, 12, and 16 have no restrictions on the mounting arrangement, and for simplicity of description, FIGS.
Are excluded from the implementation drawing.

In FIG. 1, the main switching elements 5a, 5b, 5c and 5d of FIG. 4 and the free-wheel diodes 6a, 6b, 6c and 6d connected in anti-parallel with each other are integrated into one The switching element 21 is packaged.

The first and second coupling diodes 7
a and 7b are also pressure-contact type power devices.

Therefore, the first, second, third, and fourth switching elements 21a, 21b, 21c, and 21d, the first and second coupling diodes 7a and 7b, and these are cooled and also serve as conductors. A heat sink 40 and an insulating disk 22 are stacked, and a disc spring 28 for elastically maintaining the pressure of the heat sink 40 and the insulating seat 2 for improving the pressure contact.
6, a spherical seat 27 and a stud 25 constituting a pressing mechanism frame;
The stack 23 is formed by the nut 29, the holding plate 24, and the plate 30.
Is composed.

First and second coupling diodes 7a and 7b are used as connection conductors for forming the main circuit of FIG.
, And a second conductor connecting between the first switching element 21a and the positive potential P terminal of the DC voltage source. 3
2a and a third conductor 32b connecting between the fourth switching element 21d and the negative potential N terminal of the DC voltage source, as shown in FIG. 1 and FIG.
Are arranged at right angles to the axis of the stack 23 from the positive potential side of the first switching element 21a, and are arranged substantially in parallel with the stack axis and are centered. 32b is connected to the fourth switching element 21d.
From the negative potential side of the stack 23 at right angles to the axis of the stack 23, and then arranged substantially parallel to the stack axis to be centered, and the first conductor 33 is connected to the second and third conductors. Of the conductors 32a and 32b are substantially parallel and parallel to each other.

In the three-level inverter device of the present embodiment configured as described above, the first, second, third, and fourth switching elements 21a, 21b, 21c, 21d
When the first and second coupling diodes 7a and 7b are flat-type pressure-contact elements, the first conductor 33 and the second conductor
The main circuit conductor is configured such that the conductor 32a and the third conductor 32b of the three-level inverter 32b run parallel to each other, so that in the current route in each operation mode of the three-level inverter device,
Since currents flowing in the parallel parallel portions always flow in opposite directions, the mutual inductance cancels out the self-inductance, and the total inductance can be minimized.

In particular, when the switching element 21 and the coupling diode 7 have the same press-contact condition, they can be mounted on the same stack as described above.

(Second Embodiment) In the three-level inverter device according to the present embodiment, the switching element 21 and the coupling diode 7 have the same pressure contact condition in the above-described first embodiment. Stacking at 23.

Here, the connection point of the first and second switching elements 21a and 21b (the heat sink 4
0) and the positive potential side of the first coupling diode 7a, the fourth conductor 31a, the connection point (the heat sink 40 in the figure) of the third and fourth switching elements 21c and 21d, and the second conductor 31a. In the fifth conductor 31b connecting between the coupling diode 7b and the negative potential side, the fourth conductor 3b
1a is raised almost perpendicularly to the axis of the stack 23 from between the first and second switching elements 21a and 21b and from the positive potential side of the first coupling diode 7a, and then to the second conductor 32a. And the fifth conductor 31b is connected between the third and fourth switching elements 21c and 21d and the second conductor 31b.
From the positive potential side of the coupling diode 7b
After being raised almost at right angles to the axis, the third conductor 32b
Are arranged substantially parallel to each other so as to maintain parallelism with respect to.

In the three-level inverter device of the present embodiment configured as described above, if a flat element is employed as the switching element of the main circuit, a connection conductor for configuring the circuit is required after the stack configuration. But 3
In each operation mode of the three-level inverter device, the second and fourth conductors are provided in each operation mode of the three-level inverter device. , And the current directions of the third and fifth conductors are opposed to each other, so that the mutual inductance cancels out the self-inductance, thereby minimizing the total inductance.

(Third Embodiment) FIG. 1 is a front view showing a mounting configuration example corresponding to each phase (arm) of a three-level inverter device according to the present embodiment, FIG. 2 is a top view thereof, and FIG. 4 is a side view thereof, FIG. 4 is a circuit diagram showing a configuration example of a main circuit (arm) of each phase of the three-level inverter device, FIG. 5 is a view taken along the line AA in FIG. 1, and FIG. It is an arrow view. 5 and 6 are diagrams showing an example of a mounting relationship between the AC conductor 34 and the first conductor which is a neutral point connection conductor.

Incidentally, the resistors 10, 12, and 12 in the main circuit diagram of FIG.
16 has no restrictions on the mounting arrangement, and is excluded from the mounting diagrams of FIGS. 1 to 3, 5, and 6 for simplification of description.

As shown in FIGS. 5 and 6, first, second, third and fourth switching elements 21a, 21b, 2
Clamp snubber condenser 8 corresponding to 1c, 21d
Circuits a, 8b, 8c, 8d and clamp snubber diodes 9a, 9b, 9c, 9d constitute conductors 37, 38, 39.

Here, the sixth conductor 3 connecting between the negative potential side of the second switching element 21b and the AC conductor 34
4a, a seventh conductor 34b connecting between the positive potential side of the third switching element 21c and the AC conductor 34, and a sixth conductor 34a of the AC conductor 34 is connected to the negative of the second switching element 21b. After rising from the potential side at a right angle to the stack 23 axis, it is connected to the AC conductor 34 at the center while maintaining substantially parallel to the stack 23 axis, and the seventh conductor 34b is connected to the third conductor 34b. Switching element 21
c, rising from the positive potential side at a right angle to the stack 23 axis, and connected to the AC conductor 34 at the center while maintaining substantially parallel to the stack 23 axis. The clamp snubber capacitors 8b and 8c of the element are arranged so as to be interposed.

In the three-level inverter device according to the present embodiment configured as described above, the AC conductor 34 drawn out from the connection point between the second switching element 21b and the third switching element 21c in a circuit is formed by the 2nd switching element 21b and 3rd switching element 21c
Snubber capacitors 8b and 8c corresponding to
And the case potential of the second clamp snubber capacitor 8b is set to the negative side potential of the second switching element 21b, and the third clamp snubber capacitor 8c
Is set to the positive potential side of the third switching element 21c, the case potential of the AC conductor 34 and the case potentials of the second and third clamp snubber capacitors 8b and 8c become the same, and electrical insulation is not required. Therefore, these can be approached, and the unit can be reduced in size.

Further, the conductors 37b and 37c for connecting the capacitor and the switching element in the clamp snubber circuit can also be used. Therefore, the conductors 37b and 37c become unnecessary.

(Modification of Third Embodiment) FIG. 7 is a front view showing an example of a mounting structure corresponding to each phase (arm) of the three-level inverter device according to the present embodiment, and FIG. FIG. 9 is a side view of the same, and FIG. 10 is a view taken along the line CC of FIG. 7 to 9 show an example of a mounting configuration corresponding to the main circuit diagram of FIG. 4 in a case where the pressure contact conditions of the switching element 21 and the coupling diode 7 are different. 8 and 10 are diagrams illustrating an example of a mounting relationship between the AC conductor 34 and the first conductor that is a neutral point connection conductor. The resistors 10, 12, and 16 have no restrictions on the mounting arrangement, and are excluded from the mounting diagrams of FIGS. 7 to 10 for simplification of description.

As shown in FIGS. 7 to 10, the first, second, third, and fourth switching elements 21a, 21b, 2
Clamp snubber condenser 8 corresponding to 1c, 21d
Circuits a, 8b, 8c, 8d and clamp snubber diodes 9a, 9b, 9c, 9d constitute conductors 37, 38, 39.

Here, an AC conductor 34 is connected to a connection point between the second switching element 21b and the third switching element 21c.

The AC conductor 34 is arranged so as to intervene between the clamp snubber capacitors 8b and 8c of the second and third switching elements 21b and 21c.

In the three-level inverter device of the present embodiment configured as described above, the AC conductor 34 drawn out from the connection point between the second switching element 21b and the third switching element 21c in a circuit is formed by the 2nd switching element 21b and 3rd switching element 21c
Snubber capacitors 8b and 8c corresponding to
The case potential of the second clamp snubber capacitor 8b is set to the negative potential of the second switching element 8b, and the case potential of the third clamp snubber capacitor 8c is set to the positive potential of the third switching element 21c. As a result, the case potential of the AC conductor 34 and the case potentials of the second and third clamp snubber capacitors 8b and 8c become the same, and since they do not need to be electrically insulated, they can be brought close to each other and the unit can be downsized be able to.

Also, as shown in FIG. 5, since the conductors 37b and 37c for connecting the capacitor and the switching element in the clamp snubber circuit can also be used,
In FIG. 10, the conductors 37b and 37c become unnecessary.

(Fourth Embodiment) FIG. 7 is a front view showing a mounting configuration example corresponding to each phase (arm) of a three-level inverter device according to the present embodiment, FIG. 8 is a top view thereof, and FIG. Is a side view of the same. FIG. 7 to FIG.
5 is an example of a mounting configuration corresponding to the main circuit diagram of FIG. 4 in a case where pressure contact conditions between the switching element 21 and the coupling diode 7 are different. The resistors 10, 12, and 16 have no restrictions on the mounting arrangement, and are omitted from the mounting diagrams of FIGS. 7 to 9 for simplification of description.

As shown in FIG. 7, similarly to FIG. 1, the main switching elements 5a, 5b, 5c, 5d of FIG. 4 and the freewheel diodes 6a, 6b,
6c and 6d are integrated with each other to form a single pressure-contact packaged switching element 21.

The first and second coupling diodes 7
a and 7b are also pressure-contact type power devices. However, pressure welding conditions are different.

Therefore, the first, second, third, and fourth switching elements 21a, 21b, 21c, and 21d and the first and second coupling diodes 7a and 7b are formed in separate stacks. A first stack 41 and a second stack 42 are provided.

First and second coupling diodes 7a and 7b are used as connection conductors for forming the main circuit of FIG.
, And a second conductor connecting between the first switching element 21a and the positive potential P terminal of the DC voltage source. 3
2a and the third conductor 32b connecting the fourth switching element 21d and the negative potential N terminal of the DC voltage source, as shown in FIGS. 7 and 8, the second conductor 32a
To the first switching element 21 of the first stack 41.
a, the third conductor 32b is arranged close to the center of the stack 42 via the stack 42 from the positive potential side while being substantially parallel to the axis of the stack 42. The third conductor 32b is connected to the fourth switching element 21d of the first stack 41. From the negative potential side via the stack 42 so as to be substantially parallel to the axis of the stack 42 and to be arranged at the center, and furthermore, the first conductor 33 is sandwiched by the second and third conductors 32a and 32b. They are arranged almost in parallel.

In the three-level inverter device of the present embodiment configured as described above, the first, second, third, and fourth switching elements 21a, 21b, 21c, 21d
When the first and second coupling diodes 7a and 7b are flat-type pressure-contact elements, the first conductor 33 and the second conductor
The main circuit conductor is configured such that the conductor 32a and the third conductor 32b of the three-level inverter 32b run parallel to each other, so that in the current route in each operation mode of the three-level inverter device,
Since currents flowing in the parallel parallel portions always flow in opposite directions, the mutual inductance cancels out the self-inductance, and the total inductance can be minimized.

In particular, when the pressure contact condition between the switching element 21 and the coupling diode 7 is different, it is necessary to separate the stacks, which can be coped with.

In this embodiment, the second conductor 32a and the third conductor 32b are sandwiched between the insulating disk 22 and the insulating seat 26, and the second stack 42 is fastened together. Without such a configuration, the second and third conductors 32a and 32b
The same effect can be obtained by directly extracting the first conductor 33 and arranging it substantially parallel to the first conductor 33.

(Fifth Embodiment) FIG. 1 is a front view showing a mounting configuration example corresponding to each phase (arm) of a three-level inverter device according to the present embodiment, FIG. 2 is a top view thereof, and FIG. 4 is a side view thereof, FIG. 4 is a circuit diagram showing a configuration example of a main circuit (arm) of each phase of the three-level inverter device, FIG. 5 is a view taken along the line AA in FIG. 1, and FIG. Arrow view,
FIG. 11 is a view on arrow D in FIG.

The three-level inverter device according to the present embodiment is different from the first embodiment in that the first diode 14a and the first diode 14a are provided in the DC clamp snubber circuit 17 on the positive side as shown in FIG. The connection point of the capacitor 15a is clamped to the positive electrode side via the discharge resistor 16a.

Further, the DC clamp snubber circuit 1 on the negative side
At 7, the connection point of the second diode 14b and the second capacitor 15b is clamped to the negative electrode side via the discharge resistor 16b.

On the other hand, in the mounting configuration, as shown in FIG.
The first diode 14a, the second diode 14b, the first capacitor 15a, and the second capacitor 15b are respectively disposed, and the first diode 14a is connected to the second conductor 32a.
a, the cathode of the first diode 14a is connected to one electrode of the first capacitor 15a using the tenth conductor 36a, and the other electrode of the first capacitor 15a is connected to the eighth electrode of the first capacitor 15a. First using the conductor 35a
4 constitutes a DC clamp snubber circuit 17 between the positive potential side of the DC voltage source of each phase (arm) in FIG. 4 and the intermediate potential point of the DC voltage source.

The cathode of the second diode 14b is attached to the third conductor 32b, and the anode of the second diode 14b is connected to one electrode of the second capacitor 15b using the eleventh conductor 36. Then, the other electrode of the second capacitor 15b is connected to the first conductor 33 using the ninth conductor 35b, and the negative potential side of the DC voltage source of each phase (arm) in FIG. And a DC clamp snubber circuit 17 located between the intermediate potential point and the intermediate potential point.

In the three-level inverter of the present embodiment configured as described above, the capacitor 14 and the diode 15 corresponding to each phase of the three-level inverter are provided.
The positive and negative DC clamp snubber circuits 17 composed of the resistor 16 have a role of absorbing energy in the wiring conductor from the smoothing capacitor 3 to the switching element of each phase. The wiring inductance during this time is the sum of the smoothing capacitor board (not shown), the connection conductor to each phase (arm), and the wiring inductance in each phase (arm). As described above, since the second and third conductors 32a and 32b run in parallel with the first conductor 33, the mutual inductance cancels out the inductance in each operation mode, and the inductance is reduced. Can be reduced.

Further, the anode of the diode 14a of the DC clamp snubber circuit 17 is directly attached to the second conductor 32a immediately adjacent to the switching element 21 and drawn from the switching element 21.
b, by directly attaching the cathode of the diode 14b of the DC clamp snubber circuit 17, the connection wiring can be eliminated, the inductance can be reduced, and the positive and negative DC clamp snubber circuits 17 are parasitic. The inductance can be made uniform.

Further, if necessary, the same operation can be obtained by inserting a heat sink for cooling between the second and third conductors 32a and 32b and the first and second diodes 14a and 14b. Can be.

Furthermore, the first diode 14a and the second diode 1a are symmetrical about the first conductor 33.
4b, the first capacitor 15a, and the second capacitor 14b are arranged and connected, respectively, so that the wiring inductances on which the positive and negative DC clamp snubber circuits 17 operate are the same, so that components can be shared, It is possible to improve the assemblability and the layout design.

In this example, the case where the switching element 21 and the coupling diode 7 are constituted by the same stack 23 has been described. However, as in the above-described fourth embodiment shown in FIGS. In the case where the switching element 21 and the coupling diode 7 are composed of separate stacks 41 and 42, the same operation and effect can be obtained.

(Sixth Embodiment) FIG. 12 is a circuit diagram showing a configuration example of each phase main circuit (arm) of a three-level inverter device according to the present embodiment, and FIG. 13 is a view taken in the direction of arrow D in FIG. FIG.

The three-level inverter device according to the present embodiment is different from the first or fourth embodiment in that
As shown in FIG. 12, in the positive DC clamp snubber circuit 17, the connection point between the first diode 14a and the first capacitor 15a is connected to the positive and negative smoothing capacitors 3a and 3b via the discharge resistor 16a.
Is clamped to the neutral point potential, which is the connection point of.

Further, the DC clamp snubber circuit 1 on the negative side
At 7, the connection point of the second diode 14b and the second capacitor 15b is clamped to the neutral potential which is the connection point of the smoothing capacitors 3a and 3b on the positive and negative sides via the discharge resistor 16b. .

On the other hand, in the mounting configuration, as shown in FIG.
The diode 14a, the second diode 14b, the first capacitor 15a, and the second capacitor 15b are respectively arranged, the auxiliary conductor 44 is pulled out from the first conductor 33, and the cathode of the first diode 14a is attached.
The anode of the first diode 14a is connected to the tenth conductor 3
6a, the other electrode of the first capacitor 15a is connected to the second conductor 32a using the eighth conductor 35a, and the other electrode of FIG. A DC clamp snubber circuit 17 is provided between the positive potential side of the DC voltage source of the (arm) and the intermediate potential point of the DC voltage source.

Further, the auxiliary conductor 44 is pulled out from the first conductor 33 in the same manner as described above, the anode of the second diode 14b is attached, and the cathode of the second diode 14b is connected to the eleventh conductor 36b. Connected to one electrode of the second capacitor 15b, and the other electrode of the second capacitor 15b is connected to the first electrode using the ninth conductor 35b.
12 constitutes a DC clamp snubber circuit 17 between the negative potential side of the DC voltage source of each phase (arm) in FIG. 12 and an intermediate potential point of the DC voltage source.

In the three-level inverter device of the present embodiment configured as described above, the same functions and effects as those of the fifth embodiment can be obtained.

In this embodiment, the auxiliary conductor 44 is used for mounting the diode 14, but the first conductor 3
The same operation and effect can be obtained even if a diode is directly attached to 3.

(Seventh Embodiment) The three-level inverter device according to the present embodiment differs from the fifth or sixth embodiment shown in FIGS.
The ninth and eleventh conductors 35a and 35b, which are connection wirings between the second capacitors 15a and 15b and the first conductor 33 as the main circuit conductor, or the second and third conductors 32a and 32b, are widened. An eighth conductor 36a connecting the first diode 14a and the first capacitor 15a or a tenth conductor 36a connecting the second diode 14b and the second capacitor 15b
Of the conductor 36b.

In FIG. 11, the diode 14 of the DC clamp snubber circuit 17 has two parallel
Is an example of a capacitor in which two parallel elements are housed therein, the housing also serves as one electrode, and two terminals are connected to the respective capacitor elements. As shown in FIG. 11, when viewed from above, the diode 14 and the conductor 36 are included in the region of the wide conductor 35.

In the three-level inverter device of the present embodiment configured as described above, the first and second capacitors 15a and 15b and the first conductor 33 as the main circuit conductor, or the second and third capacitors 15a and 15b are used. Ninth and eleventh conductors 35 which are connection wires with conductors 32a and 32b
a and 35b are wide flat plates, and the first diode 1
By including the region of the eighth conductor 36a connecting the first capacitor 15a to the first capacitor 15a or the tenth conductor 36b connecting the second diode 14b and the second capacitor 15b, the ninth conductor Conductor 35a
And the eighth conductor 36a, the first diode 14a, and the tenth conductor 3 which are arranged to face the eleventh conductor 35b.
The current flows in the 6b and the second diode 14b are in opposite directions, so that the wiring inductance of the DC clamp snubber circuit 17 on the positive electrode side and the negative electrode side can be reduced.

(Eighth Embodiment) The three-level inverter device according to the present embodiment is different from the above-described seventh embodiment shown in FIGS.
The first diode 14 with respect to the conductors 35a and 35b
The eighth conductor 36a connecting the first capacitor 15a to the first capacitor 15a or the tenth conductor 36b connecting the second diode 14b and the second capacitor 15b is also a wide flat plate, and the ninth conductor 35a Eighth conductor 36a
And the eleventh conductor 35b and the tenth conductor 36b are in a substantially parallel relationship.

In the three-level inverter device of the present embodiment configured as described above, the eighth and tenth conductors 36a and 36b are also wide flat plates, and the ninth conductor
By setting the 5a and the eleventh conductor 35b in a parallel relationship, the wiring inductance of the positive and negative clamp snubber circuits can be further minimized as compared with the case of the seventh embodiment. it can.

(Ninth Embodiment) The three-level inverter device according to the ninth embodiment corresponds to the first level inverter shown in FIG.
Alternatively, in the fourth embodiment, in the parallel running region of the first conductor 33, the second conductor 32a, and the third conductor 32b, the electrical insulation between the conductors is made by an epoxy-coated conductor or a conductor between conductors. A solid insulator laminated on the
Alternatively, these conductors are formed by integral molding such as an epoxy mold.

In the three-level inverter device of the present embodiment configured as described above, the first conductor 33 and the second
In the parallel running region of the conductor 32a and the third conductor 32b,
The electrical insulation between the conductors can be made first by using an epoxy-coated conductor, by laminating a solid insulator between the conductors, or by integrally forming these three conductors using an epoxy mold or the like. Second and third conductors 3
By minimizing the distance between 3, 32a and 32b, the mutual inductance generated in this portion is maximized, and the self-inductance cancellation is maximized, so that the total inductance can be minimized.

(Tenth Embodiment) The three-level inverter device according to the present embodiment is the same as the second embodiment shown in FIG.
In the embodiment, the fourth conductor 31a and the fifth conductor 31b are connected to the second conductor 32a and the third conductor 32, respectively.
In the parallel running region b, the electrical insulation between the conductors is made of an epoxy-coated conductor, a structure in which a solid insulator is laminated between the conductors, or an integral molding of these conductors such as an epoxy mold. .

In the three-level inverter device of the present embodiment configured as described above, the fourth conductor 31a is located in the parallel running region of the second conductor 32a and the third conductor 32b.
And the fifth conductor 31b are electrically insulated from each other by an epoxy-coated conductor, a configuration in which a solid insulator is laminated between the conductors, or an integral molding such as an epoxy mold. In each mode of the level inverter device, it is possible to minimize the spatial distance of the portion where the current is opposed, maximize the mutual inductance generated there, maximize the cancellation of self-inductance, and minimize the total inductance.

(Eleventh Embodiment) The three-level inverter device according to the present embodiment is different from the fifth or sixth embodiment shown in FIGS. 11 and 13 in that the ninth and eleventh conductors 35a And 35b are wide flat plates,
A barrier made of epoxy coating or a solid insulator is provided on a portion facing the first diode 14a, the second diode 14b, and the eighth and tenth conductors 36a and 36b, which are connecting conductors.

In the three-level inverter device of the present embodiment configured as described above, the first diode 14
a, a second diode 14b, and a barrier made of an epoxy coating or a solid insulator are provided on a portion facing the eighth conductor 36a and the tenth conductor 36b, which are connection conductors thereof. The distance between opposing conductors and diodes can be minimized to maximize the mutual inductance that occurs at this point, maximizing the cancellation of self-inductance, and minimizing the total inductance.

(Twelfth Embodiment) The three-level inverter according to the twelfth embodiment differs from the fifth embodiment shown in FIGS. 11 and 13 in that the ninth conductor 35a and the eighth conductor 36a , And the eleventh conductor 35b and the tenth conductor 35b.
In the parallel parallel region of the conductor 36b, the electrical insulation between the conductors is made by an epoxy-coated conductor, a configuration in which a solid insulator is laminated between the conductors, or an integral molding such as an epoxy mold.

In the three-level inverter device of the present embodiment configured as described above, the parallel and parallel running regions of the eighth conductor 36a and the ninth conductor 35a, and the tenth conductor 36b and the eleventh conductor 35b. By minimizing the distance between the conductors, the electrical insulation between the conductors is minimized by using an epoxy-coated conductor, a structure in which solid insulators are laminated between the conductors, or an integral molding such as an epoxy mold. Thus, the mutual inductance generated in this portion can be maximized, the cancellation of the self inductance can be maximized, and the total inductance can be minimized.

[0117]

As described above, according to the three-level inverter device of the present invention, when a flat type switching element requiring press-contact holding is applied, the influence of the parasitic inductance on the wiring structure is suppressed. As a result, it is possible to suppress a surge voltage generated at each element switching.

Further, it is possible to improve the commonality of components, the assembling property, the layout design, and the like in mounting, thereby improving the productivity.

[Brief description of the drawings]

FIG. 1 is a front view showing a configuration example of a three-level inverter device according to first, second, third, fifth, sixth, seventh, eighth, and tenth embodiments of the present invention.

FIG. 2 is a top view of FIG. 1;

FIG. 3 is a side view of FIG. 1;

FIG. 4 is a circuit diagram showing a configuration example of each phase main circuit (arm) of the three-level inverter device of FIG. 1;

FIG. 5 is a view taken in the direction of arrows AA in FIG. 1;

FIG. 6 is a view taken in the direction of arrows BB in FIG. 2;

FIG. 7 shows each phase (arm) of the three-level inverter device according to the second, third, fourth, fifth, and seventh embodiments of the present invention.
FIG. 2 is a front view showing a mounting configuration example corresponding to FIG.

FIG. 8 is a top view of FIG. 7;

FIG. 9 is a side view of FIG. 7;

FIG. 10 is a view taken in the direction of arrows CC in FIG. 7;

FIG. 11 shows sixth, eighth, ninth, eleventh, and twelfth embodiments of the present invention.
The arrow D view of the three-level inverter device according to the embodiment of the present invention.

FIG. 12 is a circuit diagram showing a configuration example of a main circuit (arm) of each phase of a three-level inverter device according to a sixth embodiment of the present invention.

FIG. 13 is a diagram showing a configuration example of a three-level inverter device according to sixth, seventh, eleventh, and twelfth embodiments of the present invention.

FIG. 14 is a circuit diagram showing a configuration example of a main circuit (arm) of a conventional three-level inverter device.

FIG. 15 is a circuit diagram showing the periphery of an arm of a three-level inverter circuit for explaining a problem in the DC clamp snubber circuit.

FIG. 16 is a diagram showing an example of a mounting configuration of a DC clamp snubber corresponding to FIG.

FIG. 17 is a diagram showing another example of the mounting configuration of the DC clamp snubber corresponding to FIG. 15;

[Explanation of symbols]

1 ... 3 level inverter, 2a, 2b, 2c ... main circuit (arm) of each phase, 3a, 3b ... smoothing capacitor, 4 ... induction motor, 5a, 5b, 5c, 5d ... main switching element, 6a, 6b, 6c , 6d: reflux diode, 7a, 7b: coupling diode, 8a, 8b, 8c, 8d: clamp snubber capacitor, 9a, 9b, 9c, 9d: clamp snubber diode, 10a, 10b, 10c, 10d: discharge resistance, 11b, 11c: capacitor, 12: resistor, 14a: first diode, 14b: second diode, 15a: first capacitor, 15b: second capacitor, 16a: first discharge resistor, 16b: second discharge Resistor 17 DC clamp snubber circuit 21 Switching element 22 Insulating disk 23 Stator , 24 ... holding plate, 25 ... stud, 26 ... insulating seat, 27 ... spherical seat, 28 ... disc spring, 29 ... nut, 30 ... plate, 31a ... fourth conductor, 31b ... fifth conductor, 32a ... 2 conductor, 32b third conductor, 33 first conductor, 34 AC conductor, 34a sixth conductor, 34b seventh conductor, 35a ninth conductor, 35b eleventh conductor 36a: eighth conductor, 36b: tenth conductor, 37a, 37b, 37c, 37d: conductor, 38: conductor, 39: conductor, 40: heat sink, 41: first stack, 42: second stack , 43 ... conductor, 44 ... auxiliary conductor.

Claims (12)

[Claims] 1. A series circuit of first, second, third and fourth switching elements is connected between a positive potential side and a negative potential side of a DC voltage source, and said second and third switching elements are connected. An AC terminal is derived from a connection point of the element; a first coupling diode is connected between a connection point of the first and second switching elements and an intermediate potential point of the DC voltage source; A second coupling diode is connected between a connection point of the fourth switching element and an intermediate potential point of the DC voltage source, and the first, second, third, and fourth switching elements are connected to the first and second switching elements. A three-level inverter device in which the first and second switching diodes, the second and third coupling diodes, and the first and second coupling diodes, A heat sink that cools and doubles as a conductor A stack formed by laminating an insulating disk; a first conductor connecting between a connection point of the first and second coupling diodes and an intermediate potential point of the DC voltage source; A second conductor connecting between the switching element and the positive potential side of the DC voltage source; and a third conductor connecting between the fourth switching element and the negative potential side of the DC voltage source. Wherein the second conductor is raised at a right angle to the stack axis from the positive potential side of the first switching element, and is arranged substantially in parallel to the stack axis and is centered; The third conductor is arranged at a right angle to the stack axis from the negative potential side of the fourth switching element, and is arranged substantially in parallel to the stack axis and is centered. A conductor, said second and third conductors A three-level inverter device characterized in that the three-level inverter device is arranged so as to be substantially parallel and parallel to each other. 2. The three-level inverter device according to claim 1, wherein a connection point between the connection point of the first and second switching elements and a positive potential side of the first coupling diode is connected.
And a fifth connection connecting between a connection point of the third and fourth switching elements and a negative potential side of the second coupling diode.
The fourth conductor is raised at right angles to the stack axis from between the first and second switching elements and from the positive potential side of the first coupling diode, And the fifth conductor is arranged with respect to the stack axis from between the third and fourth switching elements and from the positive potential side of the second coupling diode. A three-level inverter device, wherein the three-level inverter device is arranged so as to be substantially parallel to the third conductor. 3. The three-level inverter device according to claim 1, wherein: a sixth conductor connecting between a negative potential side of the second switching element and the AC terminal; and the third switching element. A seventh conductor for connecting between the positive potential side of the second switching element and the connection point; and an AC conductor drawn from a connection point between the second and third switching elements. The switching element of No. 2 is raised at a right angle to the stack axis from the negative potential side, and connected to the AC conductor at the center while maintaining substantially parallel to the stack axis. The third switching element is raised at a right angle to the stack axis from the positive potential side of the third switching element, and connected to the AC conductor at the center while maintaining substantially parallel to the stack. 3-level inverter apparatus which is characterized in that disposed between the snubber capacitor of the quenching device to enter split. 4. A series circuit of first, second, third and fourth switching elements is connected between a positive potential side and a negative potential side of a DC voltage source, and said second and third switching elements are connected. An AC terminal is derived from a connection point of the element; a first coupling diode is connected between a connection point of the first and second switching elements and an intermediate potential point of the DC voltage source; A second coupling diode is connected between a connection point of the fourth switching element and an intermediate potential point of the DC voltage source, and the first, second, third, and fourth switching elements are connected to the first and second switching elements. And a second coupling diode and a flat type pressure contact element, wherein the first, second, third, and fourth switching elements, a heat sink that cools them and also serves as a conductor, 1st layered disk A second stack formed by stacking a stack, the first and second coupling diodes, a heat sink that cools them and also serves as a conductor, and an insulating disk; and a stack of the first and second coupling diodes. A first conductor that connects between a connection point and an intermediate potential point of the DC voltage source; a second conductor that connects between the first switching element and a positive potential side of the DC voltage source; A third conductor that connects between the fourth switching element and the negative potential side of the DC voltage source; and a first conductor that is connected to the second conductor and a first conductor that is connected to the second conductor. A three-level inverter device, wherein the third conductor is arranged so as to be substantially parallel and parallel so as to sandwich the third conductor. 5. The method according to claim 1 or 4, wherein
For each phase of the level inverter device, a first diode and a first capacitor are connected in series between a positive potential side of the DC voltage source and an intermediate potential point of the DC voltage source; A positive-side snubber circuit having a discharge resistor connected in parallel with the first diode; and a second diode and a second diode between the negative potential side of the DC voltage source and an intermediate potential point of the DC voltage source. A negative-side snubber circuit in which a capacitor is connected in series and a discharging resistor is connected in parallel with the second diode; and the first snubber is substantially symmetrical about the first conductor.
, A second diode, a first capacitor, and a second capacitor, respectively, and an anode of the first diode is attached to the second conductor directly or via a cooling heat sink. The cathode of the diode is connected to one electrode of the first capacitor using an eighth conductor,
Connecting the other electrode of the capacitor to the first conductor using a ninth conductor, attaching the cathode of the second diode to the third conductor directly or via a cooling heat sink, The anode of the second diode is connected to one electrode of the second capacitor using a tenth conductor, and the other electrode of the second capacitor is connected to the first electrode using an eleventh conductor. A three-level inverter device connected to a conductor. 6. The method according to claim 1 or 4, wherein
For each phase of the level inverter device, a first diode and a first capacitor are connected in series between a positive potential side of the DC voltage source and an intermediate potential point of the DC voltage source; A positive-side snubber circuit having a discharge resistor connected in parallel with the first diode; and a second diode and a second diode between the negative potential side of the DC voltage source and an intermediate potential point of the DC voltage source. A negative-side snubber circuit in which a capacitor is connected in series and a discharging resistor is connected in parallel with the second diode; and the first snubber is substantially symmetrical about the first conductor.
, A second diode, a first capacitor, and a second capacitor, respectively, and a cathode of the first diode is attached to the first conductor directly or via a cooling heat sink. The anode of the diode is connected to one electrode of the first capacitor using an eighth conductor,
The other electrode of the capacitor is connected to the second conductor using a ninth conductor, and the anode of the second diode is attached to the first conductor directly or via a cooling heat sink, The cathode of the second diode is connected to one electrode of the second capacitor using a tenth conductor, and the other electrode of the second capacitor is connected to the third electrode using an eleventh conductor. A three-level inverter device connected to a conductor. 7. The method according to claim 5 or claim 6, wherein
In the level inverter device, the ninth and eleventh conductors may be wide flat plates, and include regions of the first diode, the second diode, and the eighth conductor and the tenth conductor that are connection conductors thereof. A three-level inverter device, characterized in that: 8. The method according to claim 5, wherein
The level inverter device according to claim 3, wherein said eighth and tenth conductors are wide flat plates, and said ninth conductor and said eleventh conductor are substantially parallel to each other. 9. The method according to claim 1 or 4, wherein
In the level inverter device, in a parallel running region of the first conductor, the second conductor, and the third conductor, electrical insulation between the conductors is formed by stacking an epoxy-coated conductor or a solid insulator between the conductors. A three-level inverter device characterized in that it is formed by integral molding such as an epoxy mold or the like. 10. The three-level inverter device according to claim 2, wherein the fourth conductor and the fifth conductor are connected to the second conductor and the third conductor.
In the parallel running region of the conductors, the electrical insulation between the conductors is characterized by an epoxy-coated conductor, a configuration in which a solid insulator is laminated between the conductors, or an integral molding such as an epoxy mold. Three-level inverter device. 11. The three-level inverter device according to claim 5, wherein the ninth and eleventh conductors are wide flat plates, and the first diode, the second diode, and the connection thereof. In a portion facing the eighth conductor and the tenth conductor which are conductors,
A three-level inverter device comprising a barrier made of epoxy coating or solid insulator. 12. The three-level inverter device according to claim 5, wherein each of the eighth conductor and the ninth conductor, and the tenth conductor and the eleventh conductor in a parallel parallel running region. Electrical insulation between the epoxy coated conductor and
A three-level inverter device comprising: a structure in which a solid insulator is laminated between conductors; or an integral molding such as an epoxy mold.