JP2000152031A - Signal clamping device and recording medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a signal clamping device which always stably clamps a signal independently of the state of the waveform. SOLUTION: A video signal which has the noise removed by a noise removing means 12 is compared with a clamp level for one horizontal period or longer by a comparison means 12. Based on the comparison result, an error level selection means 14 outputs an optimum error level. It is integrated by an integrating means 16 and is subtracted by a subtraction means 11 to clamp the sync tip of the video signal at the clamp level. If the result of integrating of the error level for a prescribed time is not within a prescribed range, integrating is continued by the integrating means 16, and the clamping operation is performed by the subtraction means 11. If it is within the prescribed range, it is judged that the clamp operation has converged, and the integrating operation of the integrating means 16 is stopped, thus stably clamping the signal thereafter.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal clamping device used for clamping a signal such as a video signal to a fixed level in a video tape recorder or the like, and a function of each means of the signal clamping device. The present invention relates to a recording medium that stores a program that causes a computer to execute all or part of the program.

[0002]

2. Description of the Related Art Conventionally, as a signal clamp device, a digital clamp device described in Japanese Patent Application Laid-Open No. Hei 6-133184 is known.

FIG. 5 shows a block diagram of a conventional signal clamping device. The present signal clamping device is intended to clamp a quantized video signal. In FIG. 5, 12 is a noise removing means, 51 is an error level detecting means,
52 is an error level averaging means, 53 is a subtraction means, 17 is a video signal input terminal, 18 is a video signal output terminal, and 54 is a clamp pulse input terminal. Hereinafter, a conventional signal clamping device will be described with reference to FIG.

[0004] The noise component of the digital video signal input from the terminal 17 is removed by the noise removing means 12. Here, the noise removing unit 12 is, for example, a low-pass filter that sufficiently suppresses high-frequency components. The error level detecting means 51 detects the level of the video signal at the timing of the clamp pulse input from the terminal 54, and outputs a difference X between the detected level and the level to be clamped (hereinafter, clamp level).

FIG. 6 shows an example of a clamp pulse. FIG. 6 shows a case where the sync tip level of the input video signal is clamped equal to the clamp level. The clamp pulse becomes 1 near the center of the sync tip. In this section, the error level detecting means 51 obtains the sync tip level and detects a difference X from the clamp level.

The error level averaging means 52 averages the difference X for one vertical cycle, for example, to reduce malfunction due to noise. By subtracting the averaged error level from the input video signal by the subtracting means 53, clamping is performed and output from the terminal 18. In the example of FIG. 6, X is subtracted from the input video signal, so that the sync tip level matches the clamp level, and a video signal in which the sync tip is clamped can be obtained.

[0007]

However, in the above-described conventional configuration, for example, during fast-forward playback or rewind playback of a video tape recorder, synchronization separation is not performed correctly due to waveform distortion, and a clamp pulse is generated at a predetermined position. This causes a problem that a position different from that of the sync tip is clamped, and it is difficult to perform accurate clamping.

The present invention provides a signal clamp device capable of performing a stable sync tip clamp without using a clamp pulse in consideration of the above-mentioned problems of the conventional signal clamp device. It is intended for.

[0009]

In order to solve the above-mentioned problems, a signal clamping apparatus according to the present invention comprises a subtraction means for subtracting a shift amount from an input signal and outputting a clamped signal; And a shift amount setting unit that sets and outputs the shift amount in accordance with the level comparison result. ing.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a signal clamping device according to an embodiment of the present invention. The present signal clamping device is intended to clamp a quantized video signal.

In FIG. 1, reference numeral 11 denotes subtraction means, 12 denotes noise removal means, 13 denotes comparison means, 14 denotes error level selection means, 15 denotes determination means, 16 denotes integration means, 17 denotes a video signal input terminal, and 18 denotes a video signal. Signal output terminal. The elements that perform the same operations as those described in the “Prior Art” are given the same numbers. Hereinafter, the signal clamp device according to the present embodiment will be described with reference to FIG. In the following, the NTSC signal is converted to a clock frequency of 14.3.
A case where quantization is performed at MHz will be described as an example.

A terminal 17 receives a quantized video signal. The DC level of the input video signal is shifted by subtracting the shift amount by the subtracting means 11, and
Output. On the other hand, the noise component of the output of the subtraction means 11 is removed by the noise removal means 12 and the comparison means 13 compares the noise component with the clamp level. At this time, one horizontal cycle (about 63 μs
ec, 910 clocks) and performs a comparison operation for an integer multiple of 910 clocks, and outputs how much the video signal deviates from the clamp level. Based on the comparison result, the error level selecting means 14 outputs an optimum error level. Judgment means 1
In 5, when the error level is not within the predetermined range for the predetermined period, it is determined that the clamp has been released. At this time, the integrating means 16 integrates the error levels and outputs the result as a shift amount. The shift amount is subtracted from the input video signal by the subtraction means 11, whereby the video signal approaches the clamp level, that is, is clamped.

As described above, by forming a feedback loop by the subtracting means 11, the noise removing means 12, the comparing means 13, the error level selecting means 14, and the integrating means 16, the video signal gradually approaches the clamp level. is there.
Eventually, the determination means 15 determines that the error level is within the predetermined range for a predetermined period, and the integration means 16 stops the integration operation, so that the operation of the feedback loop is stopped and the video signal becomes the clamp level. To be stably clamped.

FIG. 2 shows a specific configuration example of the comparing means 13, the error level selecting means 14, the determining means 15, and the integrating means 16. In FIG. 2, 131, 135, 153 are comparators, 132, 141, 161 are selectors, 133, 15
1, 162 is an adder, 134, 152, 163 are flip-flops, 21 is an input terminal of a video signal from which noise components have been removed, and 22 is a shift amount output terminal. Hereinafter, the comparing means 13 and the error level selecting means 1 will be described with reference to FIG.
4. The operation of the determining means 15 and the integrating means 16 will be described.

The comparator 131 compares the video signal from which the noise component has been removed with the clamp level. As a result,
When the video signal is larger, the selector 132 sets “−1”.
(Corresponding to the “second added value” of the present invention), and “26” (corresponding to the “third added value” of the present invention) when the video signal is smaller, and For example, “13” (corresponding to the “first addition value” of the present invention) is output, for example. This is added by an adder 133 and a flip-flop 134,
Integration is performed for a period that is an integral multiple of one horizontal cycle.

FIG. 3 shows the relationship between the video signal, the clamp level, and the output P of the flip-flop 134. FIG. 3 shows an example in which three horizontal cycles are integrated.

First, the operation when the sync tip of the video signal matches the clamp level as shown in FIG. 3A will be described. The selector 132 outputs “13” in the sync signal portion of the video signal because the sync tip and the clamp level match. When one horizontal cycle is 910 clocks, the leading end of the synchronization signal is 65 clocks, and the video part is 845 clocks. Therefore, the integrating circuit composed of the adder 133 and the flip-flop 134 has 65
To accumulate “13” during the clock, the output P of the flip-flop 134 becomes “845” (P = 13 × 65 = 8)
45). Next, in the video portion, since the video signal is larger than the clamp level, the selector 132 sets “−1”.
Is output. Therefore, the integrating circuit composed of the adder 133 and the flip-flop 134 integrates “−1” during 845 clocks, and when combined with the synchronous portion, the output P becomes
It becomes “0” (P = 845-1 × 845 = 0). Therefore, as shown in FIG. 3A, P = 0 after three horizontal cycles are integrated.

Next, a case where the sync tip level of the video signal is always higher than the clamp level as shown in FIG. 3B will be described. In this case, the selector 132 continues to output “−1” during three horizontal periods. Therefore, the output P of the flip-flop 134 always has a negative value.

As shown in FIG. 3C, when the clamp level is higher than the sync chip level, while the video signal is lower than the clamp level, the selector 132 sets “2”.
6 ", and" -1 "in the upper period. When this is integrated by the adder 133 and the flip-flop 134, the output P of the flip-flop 134 gradually increases as shown in FIG. 3C, and always becomes a positive value after three horizontal cycles.

As described above with reference to FIG. 3, the output P of the flip-flop 134 indicates how far the sync tip of the video signal deviates from the clamp level. That is, when P = 0, the sync tip of the video signal matches the clamp level, when P <0, the sync tip is located above the clamp level, and when P> 0, it is located below the clamp level. Further, the absolute value of P corresponds to the difference between the sync tip and the clamp level. The larger the absolute value of P, the more the sync tip deviates from the clamp level.

In the comparator 135, the flip-flop 13
4 is compared with a plurality of thresholds, and the result is output. In the example of FIG. 2, a comparison result of five stages is output depending on whether P = 0 and whether the absolute value of P exceeds a predetermined threshold value.

The selector 141 selects a predetermined value based on the comparison result of the comparator 135 and outputs the selected value as an error level. In the example of FIG. 2, when the output P of the flip-flop 134 is negative and exceeds a predetermined threshold value, it is “4”, when it is not, “1”, and when P is positive and exceeds a predetermined threshold value. "-4" when it is, "-1" when it is not exceeded
Are output as error levels when P = 0. That is, as the sync tip deviates from the clamp level, the absolute value of the error level increases, and becomes zero when they match. The change amount of the shift amount proportional to the error level is added to the previous shift amount to obtain a new shift amount. Hereinafter, for the sake of convenience, the description will be made assuming that the value of the change in the shift amount is equal to the value of the error level.

For example, when the video signal is higher than the clamp level, the output P of the flip-flop 134 is negative, and the error level output from the selector 141 is "4". Adder 162, flip-flop 163
When this "4" is integrated by the integrating circuit composed of the above, the shift amount output from the terminal 22 becomes "4" larger than before. Therefore, from the video signal input from the terminal 17,
A value larger by "4" than before is subtracted, and the video signal output from the subtracting means 11 approaches the clamp level by "4". Further, when the video signal approaches the clamp level, the error level is switched to “1”, and the sync tip of the video signal approaches the clamp level by “1”. Eventually, the error level becomes “0”, the sync tip of the video signal matches the clamp level, and the video signal is clamped to the clamp level by the sync tip.

However, one of the quantized video signals 1
LSB (Least Significant Bi)
The error level is completely zero due to the error of t) or the effect of the residual noise that could not be completely removed by the noise removing unit 12.
Does not converge. For example, as shown in FIG.
"1", "0", and "-1" are repeated at random. The judging means 15 detects this state and reliably converges the clamping operation.

First, an adder 151 and a flip-flop 1
The error level is integrated over a period longer than the operation cycle of the comparing means 13 using the integrating circuit constituted by 52. This is compared with a predetermined threshold value by the comparator 153 to determine whether or not convergence has occurred. FIG. 4 shows an example in which the comparison is performed at eight times the period of the comparison operation performed by the comparison means 13. In the period of T1 in FIG. 4, the integrated value of the error level is large ("9"), and it is not determined that the error level has converged. In the period of T2, it is determined that the integrated value (“1”) has fallen below the threshold value (for example, “2”) and has converged. Then, the determination unit 15 controls the selector 161, and after T3, “0” is input to the adder 162 instead of the change in the shift amount corresponding to the error level selected by the error level selection unit 14. You. Therefore, the shift amount output from the integrating means 16 becomes a constant value after T3 as shown in FIG. 4B, and the video signal is stably clamped.

As described above, the subtracting means 11, the noise removing means 12, the comparing means 13, and the error level selecting means 1
4. By forming a feedback loop by the integrating means 16, the video signal can be clamped by the sync tip without using a clamp pulse. In addition, the determination unit 15 can perform stable clamping without being affected by quantization errors and noise.

In the present embodiment, the first, second, and third added values of the present invention are described as "13", "-1", and "26", respectively. However, the present invention is not limited to this. For example, the first addition value, the second addition value, and the third addition value are “13”, “−1”,
It may be “14”. In short, the ratio between the absolute value of the second added value and the absolute value of the first added value is determined by the time length of the sync chip level portion per one horizontal period of the input signal and the time length of the sync signal level portion per one horizontal period of the input signal. The sign of the second added value is opposite to the sign of the first added value, and the absolute value of the third added value is the absolute value of the first added value. As long as the sign of the third addition value is larger than that of the first addition value, a stable sync tip without using a clamp pulse can be obtained in the same configuration as that of the signal clamping device in the present embodiment. Clamping can be performed.

Also, in the present embodiment, the period in which the comparing means of the present invention compares the level of the input signal with the clamp level is described as three horizontal periods, but the present invention is not limited to this. In the configuration similar to that of the signal clamp device according to the embodiment, the period may be an integral multiple of one horizontal period. Further, for example, in the case of clamping an input signal whose waveform is predetermined, the comparison standard for setting the shift amount by the shift amount setting means in advance is not limited to a period of an integral multiple of one horizontal period. Therefore, it is sufficient that the predetermined period is equal to or longer than one horizontal cycle.

The case where the operation period of the comparing means 13 is three horizontal periods has been described. However, if the period is an integral multiple of one vertical period, the horizontal pulling noise and the flicker of luminance (flicker) until the clamp converges. Can be reduced. If the operation of the comparing means 13 is stopped during the vertical blanking period, waveform distortion (sag) in the vertical synchronizing signal does not occur. Further, in the error level selecting means 14,
The case of outputting five error levels has been described, but the response speed of the clamp can be freely changed by increasing or decreasing the number of steps.

Further, in the present embodiment, the noise removing means, the error level selecting means, the determining means,
By providing the integrating means, it has been described that a more stable sync tip clamp is performed.However, the present invention is not limited to this, and at least the subtracting means for subtracting the shift amount from the input signal and outputting the clamped signal, A comparing unit that outputs a result of comparing the level of the input signal and the clamp level for one or more periods as a level comparison result, and a shift amount setting unit that sets and outputs the shift amount according to the level comparison result. As long as it is provided, stable sync tip clamping can be performed without using a clamp pulse.

In the present embodiment, the input signal of the present invention has been described as being a quantized video signal. However, the present invention is not limited to this. For example, a general analog signal or a periodic analog signal having periodicity may be used. It may be a general digital signal.

Also, in the present embodiment, the signal clamp apparatus of the present invention has been mainly described. However, as a recording medium of the present invention, a computer executes all or a part of the functions of each means described above. A recording medium for storing the program is included.

[0034]

As is apparent from the above description, the present invention according to claims 1 to 6 provides a signal clamp device capable of performing a stable sync tip clamp without using a clamp pulse. Can be. That is, accurate clamping is possible even for a video signal having a distorted waveform, and its practical effect is great.

The present invention according to claim 7 can provide a recording medium for storing a program for causing a computer to execute all or a part of the functions of each means of the signal clamping device of the present invention.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a signal clamping device according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating details of a configuration of a signal clamp device according to an embodiment of the present invention.

FIG. 3 is a signal waveform diagram illustrating an operation of a comparison unit of the signal clamp device according to the embodiment of the present invention.

FIG. 4 is a signal waveform diagram for explaining the operation of the determination means of the signal clamping device according to one embodiment of the present invention.

FIG. 5 is a block diagram showing a configuration of a conventional signal clamping device.

FIG. 6 is a signal waveform diagram illustrating an operation of a conventional signal clamping device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Subtraction means 12 Noise removal means 13 Comparison means 14 Error level selection means 15 Judgment means 16 Accumulation means

Claims (7)

[Claims] 1. A subtracting means for subtracting a shift amount from an input signal and outputting a clamped signal, and outputting a result of comparing a level of the input signal and a clamp level for one or more periods as a level comparison result. A signal clamp device comprising: a comparing unit; and a shift amount setting unit that sets and outputs the shift amount according to the level comparison result. 2. The addition means, wherein the comparison means periodically samples the level of the input signal, compares the level with the clamp level, and outputs an addition value according to the comparison result; Integrating means for integrating the added value for each comparison period having an integral multiple of one cycle; and comparing the integrated value of the added value integrated by the integrating means with one or more predetermined thresholds 2. The signal clamping device according to claim 1, further comprising integrated value comparing means for outputting a comparison result as a level comparison result. 3. The sum output means outputs a first sum when the level of the input signal is substantially equal to the clamp level, and the level of the input signal is substantially higher than the clamp level. 3. The method according to claim 2, wherein the second added value is output when the input signal level is substantially larger, and the third added value is output when the level of the input signal is substantially lower than the clamp level. Signal clamp device. 4. The ratio between the absolute value of the second added value and the absolute value of the first added value is determined by: a time length of a sync tip level portion of the input signal per one cycle; Is equal to the ratio of the time length of the other part per one period to the second addition value, the sign of the second addition value is opposite to the sign of the first addition value, and the third addition value 4. The signal clamp device according to claim 3, wherein the absolute value of the first added value is larger than the absolute value of the first added value, and the sign thereof is the same as the sign of the first added value. 5. A shift amount setting unit, comprising: a noise removal unit that removes a noise component of the clamped signal and outputs the noise component to the comparison unit; and a predetermined error level according to the level comparison result. Error level selecting means for outputting, a determination means for determining whether the error level is within a predetermined range for a predetermined period, and outputting a determination result; and integrating the error level according to the determination result. 5. The signal clamping device according to claim 1, further comprising an integrating unit that outputs the shift amount. 6. The input signal is a quantized video signal, the one cycle is one horizontal cycle of the video signal, and the input means when the comparing means has the added value output means. 6. The signal clamping device according to claim 1, wherein the sampling of the signal level is performed according to a clock corresponding to the input signal. 7. A recording medium storing a program for causing a computer to execute all or a part of the functions of each means according to claim 1.