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JP2000003886A - Manufacture of semiconductor device and apparatus thereof - Google Patents

Manufacture of semiconductor device and apparatus thereof

Info

Publication number
JP2000003886A
JP2000003886A JP16546498A JP16546498A JP2000003886A JP 2000003886 A JP2000003886 A JP 2000003886A JP 16546498 A JP16546498 A JP 16546498A JP 16546498 A JP16546498 A JP 16546498A JP 2000003886 A JP2000003886 A JP 2000003886A
Authority
JP
Japan
Prior art keywords
silicon substrate
plated
plating
semiconductor device
plating solution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16546498A
Other languages
Japanese (ja)
Inventor
Taro Tsujii
太郎 辻井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP16546498A priority Critical patent/JP2000003886A/en
Publication of JP2000003886A publication Critical patent/JP2000003886A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electroplating And Plating Baths Therefor (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device, in which the reliability of the semiconductor device is enhanced by preventing disconnection, film formation failure or the like, due to foreign particles or hydrogen gas in electroplating, and an apparatus thereof. SOLUTION: The required minimum amount of a plating solution 4 is fed onto a silicon substrate 1, whose surface to be plated is placed forcing upward. Electroplating is carried out by applying a voltage to a voltage feeding layer 3, while vibrating the silicon substrate 1 by an ultrasonic oscillator 6, and a metal film 5 is formed on insulating film 2. With this method, foreign particle contamination rate can be lowered, and film formation failure and disconnection due to foreign particles or hydrogen gas in the electroplating can be prevented.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体装置のシリ
コン基板上に対して、銅あるいはアルミニウム合金など
の金属膜を電解メッキ法により成膜するための半導体装
置の製造方法およびその製造装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device for forming a metal film such as a copper or aluminum alloy on a silicon substrate of the semiconductor device by an electrolytic plating method and an apparatus for manufacturing the same. It is.

【0002】[0002]

【従来の技術】従来、半導体製造における電解メッキ法
による金属膜成膜プロセスでは、シリコン基板上への異
物の付着を防止するために、被メッキ面を下側に向け、
下側からメッキ液を供給している。
2. Description of the Related Art Conventionally, in a metal film forming process by an electrolytic plating method in semiconductor manufacturing, a surface to be plated is directed downward in order to prevent foreign matter from adhering to a silicon substrate.
The plating solution is supplied from below.

【0003】以下に従来の電解メッキ法による半導体装
置の金属膜成膜プロセスについて説明する。
A conventional process for forming a metal film on a semiconductor device by the electrolytic plating method will be described below.

【0004】図2は従来の電解メッキ法の説明図であ
る。同図において、1はシリコン基板であって、シリコ
ン基板1における被メッキ面側には、絶縁膜2が所定の
形状で形成され、さらに絶縁膜2の表面上に給電膜3が
形成されており、メッキ処理時に、給電層3に電位を与
え、かつメッキ液4を供給することによって絶縁膜2上
に金属層5を形成する。
FIG. 2 is an explanatory view of a conventional electrolytic plating method. In FIG. 1, reference numeral 1 denotes a silicon substrate, an insulating film 2 is formed in a predetermined shape on a surface to be plated of the silicon substrate 1, and a power supply film 3 is formed on the surface of the insulating film 2. During the plating process, a metal layer 5 is formed on the insulating film 2 by applying a potential to the power supply layer 3 and supplying a plating solution 4.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、従来の
電解メッキ法では、シリコン基板1上への異物の付着を
防止する目的から、被メッキ面側を下方に向け、下から
メッキ液4を供給している。そして、被メッキ面に必要
量のメッキ液4が確実に付着するように、必要量よりも
多いメッキ液4を供給するが、このため供給時に雰囲気
中に含まれる異物がメッキ液に混入するおそれがある。
この異物の混入は既に供給済のメッキ液を再利用する際
の問題である。
However, in the conventional electrolytic plating method, in order to prevent foreign substances from adhering to the silicon substrate 1, the plating solution 4 is supplied from below with the surface to be plated facing downward. ing. Then, the plating solution 4 is supplied in a larger amount than the required amount so that the required amount of the plating solution 4 is securely attached to the surface to be plated. For this reason, foreign matter contained in the atmosphere at the time of supply may be mixed into the plating solution. There is.
The inclusion of the foreign matter is a problem when reusing the already supplied plating solution.

【0006】さらに、メッキ処理中に発生する水素ガス
が、被メッキ面を下に向けた状態にある絶縁膜2におけ
る凹み部分に溜り、そのことが原因して、メッキの成膜
不良あるいは断線などの不良を発生してしまうという問
題があった。
Further, hydrogen gas generated during the plating process accumulates in the recessed portion of the insulating film 2 with the surface to be plated facing downward, which causes poor plating film formation or disconnection. However, there is a problem that a defect occurs.

【0007】本発明は、前記従来の問題点を解決するも
のであって、水素ガスによる成膜不良,断線を防ぐこと
を可能にした半導体装置の製造方法およびその製造装置
を提供することを目的とする。
An object of the present invention is to solve the above-mentioned conventional problems and to provide a method of manufacturing a semiconductor device and a manufacturing apparatus thereof, which can prevent film formation failure and disconnection due to hydrogen gas. And

【0008】[0008]

【課題を解決するための手段】前記目的を達成するため
に、本発明の半導体装置の製造方法およびその製造装置
は、被メッキ面を上側に向け、必要最小限のメッキ液を
シリコン基板上に供給し、この状態においてシリコン基
板に超音波発振器により振動を与えながら電解メッキを
行うようにしたことを特徴とする。
In order to achieve the above object, a method and an apparatus for manufacturing a semiconductor device according to the present invention are directed to a method of manufacturing a semiconductor device, comprising: Then, in this state, electrolytic plating is performed while applying vibration to the silicon substrate by an ultrasonic oscillator.

【0009】そして、前記方法および装置によれば、被
メッキ面を上に向け、必要最小限のメッキ液を供給する
ことにより、メッキ液中への異物混入の割合を低くする
ことができ、またシリコン基板に超音波発振器により高
周波,低振幅の振動を与えることによって、異物の付着
および成膜時に発生する水素ガスを確実に除去すること
が可能になる。
According to the method and the apparatus, by supplying the minimum necessary plating solution with the surface to be plated facing upward, it is possible to reduce the proportion of foreign matter mixed into the plating solution. By applying high-frequency, low-amplitude vibrations to the silicon substrate using an ultrasonic oscillator, it becomes possible to reliably remove foreign substances and hydrogen gas generated during film formation.

【0010】[0010]

【発明の実施の形態】本発明の請求項1に記載の発明
は、シリコン基板に対して電解メッキ法によって金属膜
を形成する半導体装置の製造方法において、シリコン基
板の被メッキ面を上方に向けて、被メッキ面上にメッキ
液を供給し、この状態においてシリコン基板を加振しな
がら、被メッキ面における給電層にメッキのための電位
を与えることによって金属膜を成膜することを特徴と
し、この方法によって、シリコン基板の被メッキ面を上
に向けてメッキ液を供給することにより、従来の被メッ
キ面に下方からメッキ液を供給する方法に比べて、被メ
ッキ面にはメッキに必要な必要最小限のメッキ液を供給
するようにできるため、メッキ液における異物混入の割
合を低くすることができ、再利用されるメッキ液中への
異物混入を抑制することができる。しかも、シリコン基
板に振動を与えながらメッキ成膜を行うため、異物の付
着およびメッキ時に発生する水素ガスを除去することが
可能になる。
DETAILED DESCRIPTION OF THE INVENTION The invention according to claim 1 of the present invention is directed to a method of manufacturing a semiconductor device in which a metal film is formed on a silicon substrate by electrolytic plating, with the surface to be plated of the silicon substrate facing upward. The metal film is formed by supplying a plating solution onto the surface to be plated and applying a potential for plating to the power supply layer on the surface to be plated while vibrating the silicon substrate in this state. By this method, the plating liquid is supplied with the surface to be plated of the silicon substrate facing upward, and compared to the conventional method of supplying the plating liquid from below to the surface to be plated, the plating surface is required for plating. The minimum necessary plating solution can be supplied, so that the rate of contamination of the plating solution can be reduced, and the contamination of the plating solution to be reused can be suppressed. Can. In addition, since the plating film is formed while applying vibration to the silicon substrate, it is possible to remove foreign gas and hydrogen gas generated during plating.

【0011】請求項2に記載の発明は、シリコン基板に
対して電解メッキ法によって金属膜を形成する半導体装
置の製造装置において、シリコン基板を被メッキ面を上
方に向けて保持する保持手段と、この保持手段によって
保持されたシリコン基板の被メッキ面にメッキ液を供給
した状態において加振する加振手段と、この加振手段に
よって加振された状態において被メッキ面における給電
層にメッキを行うための電位を与える手段とを備えたこ
とを特徴とし、この装置によって、前記方法を確実に実
現することが可能になる。
According to a second aspect of the present invention, in a semiconductor device manufacturing apparatus for forming a metal film on a silicon substrate by electrolytic plating, a holding means for holding the silicon substrate with a surface to be plated facing upward, A vibrating means for vibrating the plating solution on the surface to be plated of the silicon substrate held by the holding means, and plating the power supply layer on the surface to be plated in a state vibrated by the vibrating means; Means for applying a potential to the apparatus, and the apparatus can reliably realize the method.

【0012】請求項3に記載の発明は、請求項2の発明
において、前記加振手段が超音波発振器から構成されて
いることを特徴とし、この構成によって、超音波発振器
により高周波,低振幅の振動をシリコン基板に対して加
えることができるため、異物の付着およびメッキ時に発
生する水素ガスを確実に除去することが可能になる。
According to a third aspect of the present invention, in the second aspect of the present invention, the vibrating means comprises an ultrasonic oscillator. With this configuration, a high-frequency, low-amplitude ultrasonic oscillator is provided. Since the vibration can be applied to the silicon substrate, it is possible to reliably remove foreign gas and hydrogen gas generated during plating.

【0013】以下、本発明の実施の形態を図面を参照し
ながら具体的に説明する。
Hereinafter, embodiments of the present invention will be specifically described with reference to the drawings.

【0014】図1は本発明の一実施形態を説明するため
の半導体装置の製造装置における概略構成を示す説明図
である。同図において、図2にて説明した部材に対応す
る部材には同一符号を付して詳しい説明は省略するが、
1はシリコン基板、2は絶縁膜、3は給電層、4はメッ
キ液、5は電解メッキ法により成膜される金属膜、6は
加振手段である超音波発振器、7は、シリコン基板1の
被メッキ面(成膜面)を上に向けた状態にしてメッキ液
4を保持することを可能にした保持枠体である。
FIG. 1 is an explanatory diagram showing a schematic configuration of a semiconductor device manufacturing apparatus for explaining an embodiment of the present invention. In the same figure, members corresponding to the members described in FIG.
1 is a silicon substrate, 2 is an insulating film, 3 is a power supply layer, 4 is a plating solution, 5 is a metal film formed by an electrolytic plating method, 6 is an ultrasonic oscillator as a vibration means, and 7 is a silicon substrate 1 Is a holding frame body capable of holding the plating solution 4 with the surface to be plated (film formation surface) facing upward.

【0015】前記構成により、被メッキ面を上に向けて
保持枠体7に設置されたシリコン基板上1に、電解メッ
キ処理のために必要最小限のメッキ液4を供給し、その
後、シリコン基板1を超音波発振器6により高周波,低
振幅の振動にて加振しながら、給電層3に対して図示し
ない電源から電位を与え電解メッキを行うことによっ
て、絶縁膜2上に金属膜5を成膜する。
With the above structure, a minimum amount of plating solution 4 required for electrolytic plating is supplied to the silicon substrate 1 placed on the holding frame 7 with the surface to be plated facing upward. The metal film 5 is formed on the insulating film 2 by applying an electric potential from a power source (not shown) to the power supply layer 3 while vibrating 1 at high frequency and low amplitude by the ultrasonic oscillator 6. Film.

【0016】前記のようにシリコン基板1の被メッキ面
を上に向けてメッキ液4を供給することにより、従来の
被メッキ面に対して下方からメッキ液を供給する方法に
比べて、被メッキ面には電解メッキに必要な必要最小限
のメッキ液4を供給するようにできるため、メッキ液4
における異物混入の割合を低くすることができ、再利用
されるメッキ液4中への異物混入を抑制することがこと
ができる。しかも、シリコン基板1に振動を与えながら
メッキ成膜を行うため、異物の付着および電解メッキ時
に発生する水素ガスを除去することが可能になって、異
物,水素ガスによる成膜不良,断線を防ぐことができ
る。
By supplying the plating solution 4 with the surface to be plated of the silicon substrate 1 facing upward as described above, compared with the conventional method of supplying the plating solution from below to the surface to be plated, the plating solution is supplied. Since the minimum necessary plating solution 4 required for electrolytic plating can be supplied to the surface, the plating solution 4
In this case, the rate of foreign matter mixing in the plating solution can be reduced, and foreign matter mixing into the plating solution 4 to be reused can be suppressed. Moreover, since the plating film is formed while applying vibration to the silicon substrate 1, it is possible to remove the adhesion of foreign matter and the hydrogen gas generated during electrolytic plating, thereby preventing film formation failure and disconnection due to foreign matter and hydrogen gas. be able to.

【0017】[0017]

【発明の効果】以上のように本発明によれば、シリコン
基板の被メッキ面を上側に向け、必要最小限のメッキ液
で超音波発振器で振動を与えながら電解メッキを行うこ
とにより、メッキ液の再利用を良好な状態で行うことが
可能になり、しかも成膜不良あるいは断線の不良を防
ぎ、半導体装置の信頼性を向上させることが可能とな
る。
As described above, according to the present invention, the electroplating is performed by turning the surface of the silicon substrate to be plated upward and applying vibration with an ultrasonic oscillator with a minimum necessary amount of plating solution. Can be reused in a good condition, film formation failure or disconnection failure can be prevented, and the reliability of the semiconductor device can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施形態を説明するための半導体装
置の製造装置における概略構成を示す説明図
FIG. 1 is an explanatory view showing a schematic configuration in a semiconductor device manufacturing apparatus for explaining an embodiment of the present invention;

【図2】従来の電解メッキ法の説明図FIG. 2 is an explanatory view of a conventional electrolytic plating method.

【符号の説明】[Explanation of symbols]

1 シリコン基板 2 絶縁膜 3 給電層 4 メッキ液 5 金属層 6 超音波発振器 7 保持枠体 DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Insulating film 3 Power supply layer 4 Plating solution 5 Metal layer 6 Ultrasonic oscillator 7 Holding frame

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 シリコン基板に対して電解メッキ法によ
って金属膜を形成する半導体装置の製造方法において、
シリコン基板の被メッキ面を上方に向けて、被メッキ面
上にメッキ液を供給し、この状態においてシリコン基板
を加振しながら、被メッキ面における給電層にメッキの
ための電位を与えることによって金属膜を成膜すること
を特徴とする半導体装置の製造方法。
1. A method for manufacturing a semiconductor device, wherein a metal film is formed on a silicon substrate by electrolytic plating.
The plating liquid is supplied onto the surface to be plated with the surface to be plated of the silicon substrate facing upward, and while the silicon substrate is vibrated in this state, the potential for plating is applied to the power supply layer on the surface to be plated by plating. A method for manufacturing a semiconductor device, comprising forming a metal film.
【請求項2】 シリコン基板に対して電解メッキ法によ
って金属膜を形成する半導体装置の製造装置において、
シリコン基板を被メッキ面を上方に向けて保持する保持
手段と、この保持手段によって保持されたシリコン基板
の被メッキ面にメッキ液を供給した状態において加振す
る加振手段と、この加振手段によって加振された状態に
おいて被メッキ面における給電層にメッキを行うための
電位を与える手段とを備えたことを特徴とする半導体装
置の製造装置。
2. A semiconductor device manufacturing apparatus for forming a metal film on a silicon substrate by an electrolytic plating method,
Holding means for holding the silicon substrate with the surface to be plated facing upward, vibration means for vibrating the silicon substrate held by the holding means while plating liquid is supplied to the surface to be plated, and vibration means Means for applying a potential for plating the power supply layer on the surface to be plated in a state where the substrate is vibrated by the semiconductor device manufacturing apparatus.
【請求項3】 前記加振手段が超音波発振器から構成さ
れていることを特徴とする請求項2記載の半導体装置の
製造装置。
3. The semiconductor device manufacturing apparatus according to claim 2, wherein said vibrating means comprises an ultrasonic oscillator.
JP16546498A 1998-06-12 1998-06-12 Manufacture of semiconductor device and apparatus thereof Pending JP2000003886A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16546498A JP2000003886A (en) 1998-06-12 1998-06-12 Manufacture of semiconductor device and apparatus thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16546498A JP2000003886A (en) 1998-06-12 1998-06-12 Manufacture of semiconductor device and apparatus thereof

Publications (1)

Publication Number Publication Date
JP2000003886A true JP2000003886A (en) 2000-01-07

Family

ID=15812921

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16546498A Pending JP2000003886A (en) 1998-06-12 1998-06-12 Manufacture of semiconductor device and apparatus thereof

Country Status (1)

Country Link
JP (1) JP2000003886A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001274161A (en) * 2000-03-24 2001-10-05 Kobe Steel Ltd Method of forming semiconductor wiring film
CN100444325C (en) * 2001-09-25 2008-12-17 夏普公司 Semiconductor integrated circuit, manufacturing method thereof, and manufacturing apparatus thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001274161A (en) * 2000-03-24 2001-10-05 Kobe Steel Ltd Method of forming semiconductor wiring film
JP4637989B2 (en) * 2000-03-24 2011-02-23 株式会社神戸製鋼所 Method for forming semiconductor wiring film
CN100444325C (en) * 2001-09-25 2008-12-17 夏普公司 Semiconductor integrated circuit, manufacturing method thereof, and manufacturing apparatus thereof

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