JP2000069329A - Contour correction device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a contour correction device that enhances sharpness of a contour of an original video signal, without addition of a pre-shoot or an overshoot and loss of a geometrical structure of the original video signal and improves sharpness of a contour of the original video signal without fixing a reference position to improve the sharpness of the contour by an input signal. SOLUTION: This device is provided with a contour correction area detection means 3, that detects a contour area of an input video signal and divides the contour area into an interpolated area and an angle correction area, an interpolation means 5 that generates a video signal of the interpolation area, based on the input video signal and an output signal from the contour correction area detection means 3, a reference point detection means 4 that calculates a reference point of the angle correction area based on the input video signal and the output signal from the contour correction area detection means 3, and an angle correction means 6 that corrects the angle of the input video signal, with respect to the reference point calculated by the reference point detection means 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to various video equipment such as a television receiver (TV), a video tape recorder (VTR), and a video disk (LD, DVD, video CD), and various image processing for handling image data. The present invention relates to a device, and more particularly, to a contour correction device for improving sharpness of a contour portion and improving image quality.

[0002]

2. Description of the Related Art Conventionally, as a contour correction for improving the sharpness of a contour portion in order to improve image quality, a contour correction component is obtained by a secondary differential process, and the correction component is multiplied by an appropriate coefficient to obtain an original signal. (For example, Nobuyuki Yagi, et al., "Practical Digital Video Processing Learned in C Language", Ohmsha, published May 10, 1995, p. 17)
3).

[0003] In such a conventional contour correction device,
This will be described below with reference to FIGS. 33 and 34. Here, FIG. 33 is a block diagram showing a configuration of a conventional contour correcting device, and FIG. 34 is a waveform diagram showing output signals of respective parts in the conventional contour correcting device.

In FIG. 33, 81 is an input terminal, 82 is an output terminal, 83 is a correction component generation circuit, 84 is a delay circuit for delaying a predetermined time, 85 is a gain control circuit for controlling the correction component amount, and 86 is an addition circuit. is there. The correction component generation circuit 83 includes delay circuits 831 and 832 that delay by a predetermined time,
Multiplication circuits 833, 834, 835 and an addition circuit 836 are provided.

The video signal input from the input terminal 81 is
The signals are supplied to the delay circuit 84, the delay circuit 831 and the multiplication circuit 835. Then, the output signal of the delay circuit 831 is supplied to the delay circuit 832 and the multiplication circuit 834, and the delay circuit 832
Is supplied to the multiplication circuit 833.

For example, for the video signal shown in FIG. 34 (1), the output signal of the delay circuit 831 and the output signal of the delay circuit 832 are the signals shown in FIG. 34 (2) and FIG. become. These three signals have a multiplier of -1 /
4, a multiplication circuit 833 with a multiplier of 1/2,
The multipliers are supplied to the multiplication circuits 835 each having a multiplier of − ／.

A multiplying circuit 833 multiplied by each multiplier
, The output signal of the multiplication circuit 834, and the output signal of the multiplication circuit 835 are supplied to the addition circuit 836,
Is added. The addition result of the addition circuit 836 is a signal obtained by secondarily differentiating the original video signal as shown in FIG. 34 (4) as the output signal of the correction component generation circuit 83.

The output signal of the correction component generation circuit 83 is supplied to a gain control circuit 85. When the gain of the gain control circuit 85 is, for example, 2, the output signal of the gain control circuit 85 is a signal as shown in FIG. The output signal of the gain control circuit 85 is supplied to the addition circuit 86 together with the output signal of the delay circuit 84 shown in FIG.
Is added.

The addition result of the addition circuit 86 is shown in FIG.
Are output from the output terminal 82 as output signals shown in FIG. As described above, according to the conventional contour correction device, it is possible to perform the contour correction for improving the sharpness while giving a preshoot or an overshoot to the contour portion in order to improve the image quality.

As a method for improving the sharpness of a contour portion without adding a preshoot or an overshoot, a contour correction device described in, for example, JP-A-5-316392 has been proposed.

The contour correcting device described in Japanese Patent Application Laid-Open No. 5-316392 will be described below as another conventional contour correcting device with reference to FIGS. 35 and 36. Here, FIG.
5 is a block diagram showing the configuration of another conventional contour correction device;
FIG. 36 is a waveform diagram showing output signals of respective parts in another conventional contour correction device.

In FIG. 35, reference numeral 91 denotes an input terminal;
1, 912, 913, 914 are delay circuits, 92 is an output terminal, 93 is a maximum value detection circuit, 94 is a minimum value detection circuit, 9
5 is a position detection circuit, 96 is an arithmetic circuit, 961 is an average circuit, 962 is a subtraction circuit, 97 is a gain adjustment circuit, 98 is an adder, and 99 is a non-linear processing circuit.

The video signal input from the input terminal 91 is
Delayed by delay circuits 911-914. The input video signal and each output signal of the delay circuits 911 to 914 are supplied to a maximum value detection circuit 93, a minimum value detection circuit 94, and a position detection circuit 95, respectively. The output signal of the delay circuit 912 is connected to one input terminal of the subtraction circuit 962 and the addition circuit 9.
8 is also supplied to one input terminal.

The output signal of the maximum value detection circuit 93 is supplied to a position detection circuit 95, an average value circuit 961 and a non-linear processing circuit 99.
Respectively. The output signal of the minimum value detection circuit 94 is supplied to a position detection circuit 95, an average value circuit 961 and a non-linear processing circuit 99, respectively.

An output signal of the average value circuit 961 is supplied to the other input terminal of the subtraction circuit 962. Subtraction circuit 962
Is supplied to a gain adjustment circuit 97, and the output signal of the gain adjustment circuit 97 is supplied to the other input terminal of the addition circuit 98.

The addition result of the addition circuit 98 is subjected to nonlinear processing in a nonlinear processing circuit 99 according to the output signal from the maximum value detection circuit 93 and the output signal from the minimum value detection circuit 94, and is output from an output terminal 92. .

The operation of another conventional contour correction device configured as described above will be described with reference to FIG. When a video signal having an outline as shown in FIG. 36 (1) is input from the input terminal 91, this video signal is delayed by delay circuits 911 to 914, and respectively shown in FIGS. 36 (2) to 36 (5). Is obtained.

The maximum value detection circuit 93 compares the magnitudes of the input video signal and the output signals of the delay circuits 911 to 914,
Output the maximum value. Accordingly, the signal shown in FIG. 36 (6) is obtained as the output signal of the maximum value detection circuit 93.

Similarly, the minimum value detection circuit 94 compares the input video signal and the output signals of the delay circuits 911 to 914 and outputs the minimum value.
The signal shown in FIG. 36 (7) is obtained as the output signal of.

The signals shown in FIGS. 36 (6) and 36 (7) are averaged by an averaging circuit 961 to obtain the signal shown in FIG. 36 (8). In the subtraction circuit 962, the delay circuit 9
The output signal of the average value circuit 961 is subtracted from the twelve output signals to obtain a signal as shown in FIG.

The position detection circuit 95 performs a logical operation from an input signal, and outputs 0 when a specific waveform is detected. In the signal as shown in FIG. 36, since a specific waveform is not detected, 1 is output as shown in FIG. 36 (10).

The gain adjuster 97 sets the gain to 0 when the output signal of the position detection circuit 95 is 0, and follows the original gain of the gain adjuster 97 when the output signal is 1. When the gain of the gain adjuster 97 is set to 1, for example, the output signal becomes the signal shown in FIG.

In the adder 98, if the output signal of the gain adjuster 97 and the output signal of the delay circuit 912 shown in FIG. 36 (3) are added, the addition result is obtained as shown in FIG.
A signal as shown in (12) is obtained. This signal is subjected to nonlinear processing in the nonlinear processing circuit 99 in accordance with the output signal of the maximum value detection circuit 93 and the output signal of the minimum value detection circuit 94.

For example, FIG. 36 (6), (7), (12)
The magnitude of each signal shown in FIG. 36 is compared, and when the signal shown in FIG. 36 (12) is larger than the signal shown in FIG.
6 (6) is output. FIG. 36 (12)
36 is smaller than the signal shown in FIG. 36 (7), the signal shown in FIG. 36 (7) is output. Otherwise, the signal shown in FIG. 36 (6) is output.

That is, the amplitude of the output signal of the adder 98 is limited by using the detected maximum value or minimum value.
According to this, as an output signal of the nonlinear processing circuit 99,
As shown in FIG. 36 (13), a video signal having a steep contour gradient is obtained. As described above, according to another conventional contour correction device, it is possible to perform contour correction for improving sharpness without adding preshoot or overshoot to a contour portion for improving image quality.

[0026]

However, FIG.
In the conventional contour correction device described above with reference to FIG. 34 and FIG. 34, the effect of the contour correction is small at a gentle contour portion, and a preshoot or an overshoot may occur at a relatively steep contour portion. There has been a problem that contour correction may be performed with an adverse effect such that a white line or a black line is formed in a portion.

On the other hand, in the other conventional contour correction device described above with reference to FIGS. 35 and 36, the contour can be corrected without adding a preshoot or an overshoot. Although it is possible to avoid adverse effects such as the occurrence of line fringing, the level is limited by the maximum and minimum values of the surroundings in order to avoid the addition of preshoot and overshoot,
As shown in FIG. 37, there has been a problem that the geometric structure of the outline between the input signal and the output signal may change.

Further, in either of the two conventional contour correction devices described above, the reference position for improving the sharpness of the contour is determined by the input signal. For example, FIG.
In the case of an input signal having a contour symmetrical with respect to the center of the contour portion as shown in (3), in the conventional contour correction device described above with reference to FIGS. 33 and 34, as shown in FIG. Further, in the other conventional contour correction device described above with reference to FIGS. 35 and 36, as shown in FIG. 38 (5), there is a problem that the sharpness can only be improved symmetrically with respect to the center of the contour portion. there were.

Suppose that a narrower, steep, convex waveform as shown in FIG. 38 (1) originally spreads to a width as shown in FIG. 38 (3) due to some influence of the characteristics of the transmission path. When the signal is input as a convex input signal, the conventional contour correction device can improve the sharpness of the contour, but cannot reduce the width of the convex waveform.

Conversely, the wider and sharper convex waveform originally shown in FIG. 38 (2) narrows to the width shown in FIG. 38 (3) due to some influence of the characteristics of the transmission path. When the input signal is input as a gently convex input signal, there is a problem that the conventional contour correction device can improve the sharpness of the contour but cannot reduce the width.

The present invention has been made in view of the above points, and does not add a preshoot or an overshoot and does not lose the geometric structure of the original video signal. An object of the present invention is to provide a contour correction device capable of improving the sharpness of a contour and improving the sharpness of the contour of an original video signal without fixing a reference position for improving the sharpness of the contour by an input signal. I do.

[0032]

According to a first aspect of the present invention, there is provided a contour correcting apparatus for detecting a contour area of an input video signal, and further dividing the contour area into an interpolation area and an angle correction area. Correction area detection means, based on the input signal and the output signal of the contour correction area detection means,
Interpolation means for generating a video signal of the interpolation area; reference point detection means for calculating a reference point of the angle correction area from the input video signal and an output signal of the contour correction area detection means; Angle correction means for correcting the angle of the input video signal with respect to the reference point calculated by the means.

Thus, without adding a preshoot or overshoot and without losing the geometric structure of the original video signal, the width of the convex input video signal can be simultaneously controlled. Thus, a high-quality contour-corrected image can be obtained.

According to a second aspect of the present invention, there is provided a contour correcting apparatus according to the first aspect, wherein
The contour correction area detecting means includes a peak detecting means for detecting a position of a maximum value and a minimum value within a predetermined period of the input video signal, and a peak value immediately before and immediately after the maximum value and the minimum value of the input video signal within a predetermined period. Quasi-peak detecting means for detecting the position of the quasi-peak, detecting the contour area from the output signal of the peak detecting means and the output signal of the quasi-peak detecting means, and interpolating the contour area based on a predetermined interpolation area amount. And a contour region dividing means for dividing the interpolation region into a peak shift position and a peak interpolation region.

Thus, the region for which the contour is to be corrected can be appropriately and effectively divided, and therefore, without adding preshoot or overshoot, and without losing the geometric structure of the original video signal. In addition, it is possible to obtain a high-quality contour-corrected image by simultaneously controlling the width of the convex input video signal.

According to a third aspect of the present invention, there is provided the contour correcting apparatus according to the second aspect, wherein
The contour correction area detecting means includes an interpolation area amount correcting means for varying the interpolation area amount according to a length of a contour area detected from an output signal of the peak detecting means and an output signal of the quasi-peak detecting means. It is provided with.

Thus, according to the length of the contour area,
Since the contour correction amount can be varied, a higher quality contour corrected image can be obtained.

According to a fourth aspect of the present invention, there is provided the contour correcting apparatus as set forth in the second aspect.
The contour correction area detection means includes an interpolation area amount correction means for varying the interpolation area amount according to a difference between a maximum value and a minimum value in an output signal of the peak detection means.

Thus, according to the amplitude of the contour area,
Since the contour correction amount can be varied, a higher quality contour corrected image can be obtained.

According to a fifth aspect of the present invention, there is provided a contour correcting apparatus as set forth in the first aspect.
The contour correction area detecting means includes a first peak detecting means for detecting a position of a maximum value and a minimum value of the input video signal within a predetermined period, and a second input video signal correlated with the input video signal. Second peak detecting means for detecting a position of a maximum value and a minimum value within a predetermined period of time, and a first reference detecting means for detecting positions immediately before and immediately after the maximum value and the minimum value of the input video signal within a predetermined period of time. Peak detection means;
A second quasi-peak detecting means for detecting a position immediately before and after a maximum value and a minimum value of the second input video signal within a predetermined period; an output signal of the second peak detecting means; Contour area detecting means for detecting a contour area from an output signal of the quasi-peak detecting means; interpolation area amount correcting means for varying an interpolation area amount from an output signal of the contour area detecting means; Detecting a contour area from an output signal of the first means and an output signal of the first quasi-peak detecting means, dividing the contour area into an interpolation area and an angle correction area based on the interpolation area amount, Is divided into a peak shift position and a peak interpolation area.

Thus, the contour correction amounts of the plurality of input video signals can be independently varied according to the length of the contour region in each of the plurality of correlated input video signals. The sharpness of an existing contour can be corrected to a similar sharpness.

According to a sixth aspect of the present invention, there is provided a contour correcting apparatus as set forth in the first aspect.
The interpolation means delays the input video signal; and outputs the video signal near the contour correction area and the peak shift position from the output signal of the delay means and the output signal of the contour correction area detection means. A video signal in the vicinity of the contour correction area from a peak shift means for correcting the video signal at the peak shift position by calculating the video signal at the peak shift position, and an output signal from the delay means and an output signal from the contour correction area detection means. And a peak interpolating means for interpolating and generating a video signal in the peak interpolation area by calculating the original video signal at the peak shift position, and an output signal of the peak shifting means, an output signal of the peak interpolating means correction, and Selecting means for selecting and outputting the output signal of the delay means based on the output signal of the contour correction area detecting means.

As a result, smooth interpolation processing can be performed without unnatural continuity of the video signal.
Therefore, without adding preshoots and overshoots and without losing the geometric structure of the original video signal, the width of the convex input video signal is simultaneously controlled to achieve high quality. It is possible to obtain a contour corrected image.

According to a seventh aspect of the present invention, there is provided the contour correcting apparatus according to the first aspect.
The reference point detecting means for detecting a position of a reference point of the angle correction area from an output signal of the contour correction area detecting means; an input video signal and an output signal of the contour correction area detecting means; And a reference value calculating means for calculating a value of a reference point in the angle correction area.

As a result, an optimum reference point in the contour area can be obtained, and therefore, a convex input signal can be obtained without adding preshoot or overshoot and without losing the geometric structure of the original video signal. By controlling the width of the video signal at the same time, a high-quality contour-corrected image can be obtained.

The contour correcting apparatus according to the invention of claim 8 of the present application is the contour correcting apparatus according to claim 1,
The angle correction unit includes: a delay unit that delays the input video signal; and an output signal of the delay unit and an output signal of the contour correction region detection unit. A peak shift means for calculating a video signal obtained by correcting the video signal at the peak shift position by calculation with the original video signal; an output signal of the contour correction area detecting means, an output signal of the reference point detecting means, and the peak shift From the output signal of the means, the angle of the original video signal at the peak shift position with respect to the reference point and the angle of the corrected video signal at the peak shift position with respect to the reference point are determined. Angle change detecting means for calculating a shift angle, an output signal of the delay means, an output signal of the contour correction area detecting means, and the reference point detecting means A correction angle generation unit configured to calculate a result of obtaining an angle of a video signal of an angle correction area with respect to the reference point and the peak shift angle from an output signal and an output signal of the angle change detection unit, and generate a correction angle; From an output signal of the contour correction area detection means, an output signal of the reference point detection means and an output signal of the correction angle generation means, an angle interpolation means for generating a video signal of an angle correction area with respect to the reference point; Selecting means for selecting and outputting the output signal of the angle interpolation means and the output signal of the delay means in accordance with the output signal of the contour correction area detecting means.

As a result, the angle in the contour is smoothly corrected without unnatural continuity of the video signal,
The sharpness can be improved, and therefore, the width is large even for a convex input video signal without adding preshoot or overshoot and without losing the geometric structure of the original video signal. At the same time, it is possible to obtain a high quality contour corrected image.

According to a ninth aspect of the present invention, in the contour correcting apparatus according to any one of the first to eighth aspects, the input stage performs sampling on the discretized video signal having the sampling frequency f1. A first frequency converting means for up-sampling the frequency to f2 is provided, and the sampling frequency is set to f1 for the discretized video signal having the sampling frequency f2 at the output stage.
And a second frequency conversion means for down-sampling.

As a result, it is possible to vary the contour correction amount with higher accuracy, and it is possible to reduce the deterioration of the image quality due to the aliasing noise of the harmonic component generated by the nonlinear processing of the contour correction device.

[0050]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the contour correction device of the present invention will be described below with reference to FIGS. First, FIG. 1 is a block diagram showing a schematic configuration of the contour correction device of the present embodiment.

In FIG. 1, 1 is an input terminal, 2 is an output terminal, 3 is a contour correction area detection circuit (contour correction area detection means), 4 is a reference point detection circuit (reference point detection means), and 5 is an interpolation circuit ( Interpolation means), 6 is an angle correction circuit (angle correction means), and 7 is a selection circuit.

The contour correction area detecting circuit 3 includes a peak detecting circuit 31 (peak detecting means) and a quasi-peak detecting circuit 3.
2 (quasi-peak detecting means) and a contour area dividing circuit 33 (contour area dividing means).
A reference position detection circuit 41 (reference position detection means) and a reference value calculation circuit 42 (reference value calculation means) are provided.

The interpolation circuit 5 includes a delay circuit 51 (delay means) having a plurality of delay elements connected in series, a peak shift circuit 52 (peak shift means), and a peak interpolation circuit 53 (peak interpolation means). The angle correction circuit 6 includes a delay circuit 61 (delay means) having a plurality of delay elements connected in series, and an angle change detection circuit 62 (peak shift means, angle change detection means). ), A correction angle generation circuit 63 (correction angle generation means), an angle interpolation circuit 64 (angle interpolation means), and a selection circuit 65 (selection means).

The video signal input from the input terminal 1 is supplied to each of a peak detection circuit 31, a quasi-peak detection circuit 32, a reference value calculation circuit 42, a delay circuit 51, and a delay circuit 61. The output signal of the peak detection circuit 31 and the output signal of the quasi-peak detection circuit 32 are supplied to a region dividing circuit 33.

The output signal of the area dividing circuit 33, that is, the output signal of the contour correction area detecting circuit 3 is a reference position detecting circuit 41, a reference value calculating circuit 42, a peak shift circuit 52, a peak interpolating circuit 53, a selecting circuit 54, an angle Change detection circuit 6
2. It is supplied to each of the correction angle generation circuit 63, the angle interpolation circuit 64, the selection circuit 65, and the selection circuit 7.

The output signal of the reference position detection circuit 41 and the output signal of the reference value calculation circuit 42, that is, the reference point detection circuit 4
Is supplied to each of the angle change detection circuit 62, the correction angle generation circuit 63, and the angle interpolation circuit 63.

The output signal of the delay circuit 51 is supplied to each of a peak shift circuit 52, a peak interpolation circuit 53, and a selection circuit 54. The output signal of the peak shift circuit 52 and the output signal of the peak interpolation circuit 53 are supplied to the selection circuit 54, and the output signal of the selection circuit 54, that is, the output signal of the interpolation circuit 5 is supplied to one input terminal of the selection circuit 7. Supplied.

The output signal of the delay circuit 61 is supplied to each of the angle change detection circuit 62, the correction angle generation circuit 63, and the selection circuit 65. The output signal of the angle change detection circuit 62 is
It is supplied to the correction angle generation circuit 63. The output signal of the correction angle generation circuit 63 is supplied to an angle interpolation circuit 64, and the output signal of the angle interpolation circuit 64 is supplied to a selection circuit 65.

The output signal of the selection circuit 65, that is, the output signal of the angle interpolation circuit 6, is supplied to the other input terminal of the selection circuit 7. The output signal of the selection circuit 7 is output from the output terminal 2 as an output signal of the contour correction device.

Next, a schematic operation of the contour correction device of this embodiment will be described with reference to FIG. Here, as shown in FIG. 2, a region from a partial negative peak at D4 to a partial positive peak at D12 is defined as a contour region, and the region is corrected. Therefore, the operation of the contour correction for the contour of the rising characteristic will be described. However, the same can be realized for the contour of the falling characteristic, and the description is omitted here.

First, the partial peak position at the start of the contour is defined as the front peak position, the partial peak position at the end is defined as the rear peak position, and the value at the previous peak position is defined as the previous peak toward the inside of the contour. Move to the shift position (in the present embodiment, the previous peak shift amount is assumed to be two data samples).

Similarly, the value at the rear peak position is moved to the rear peak shift position toward the inside of the contour (this embodiment will suppose that the rear peak shift amount is assumed to be three data samples).

As a result, before shifting, 8 data samples (from D4 to D1) from the negative peak to the positive peak
2), but after the shift, it is shortened to 3 data samples (from D6 to D9) (as will be described later, in this embodiment, since the value is not simply shifted, Is not necessarily three data samples).

Therefore, when considering only the peak value from the peak value, the sharpness of the contour is improved, but this alone results in an unnatural contour. By performing such processing, the correction is performed so that the sharpness of the contour is improved very naturally.

A region between the previous peak position and the previous peak shift position is defined as a pre-interpolation region, and the data of this pre-interpolation region is replaced with a new value of the previous peak shift position, a value of the previous peak position, and a value immediately before the previous peak position. Interpolation is performed based on the value (when the previous peak shift amount is 1, since there is no previous interpolation area, processing of the previous interpolation area is not performed).

Similarly, a region between the rear peak position and the rear peak shift position is defined as a rear interpolation region, and the data of the rear interpolation region is replaced with a new rear peak shift position value, rear peak position value, and rear peak position. (Here, when the post-peak shift amount is 1, since the post-interpolation region does not exist, the post-interpolation region is not processed.)

The temporal center between the front peak shift position and the rear peak shift position is set as the correction reference position (therefore, the correction reference position may not coincide with the position of the data sample. In the center). Further, at the correction reference position, the average value of the values D7 and D8 is set as the correction reference point (if the correction reference position matches the position of the data sample, the value of the data sample is taken).

Further, a region between the front peak shift position and the correction reference position is defined as a front angle correction region, and a region between the rear peak shift position and the correction reference position is defined as a rear angle correction region. And
The angle at which the value of the previous peak shift position has changed before and after the shift with respect to the correction reference point is obtained, and the angle with respect to the correction reference point of the data in the previous angle correction area is changed with reference to the angle.

Similarly, the angle at which the value of the rear peak shift position changes before and after the shift with respect to the correction reference point is obtained, and the angle of the data in the rear angle correction area with respect to the correction reference point is determined based on the angle. Change.

By the way, when the front peak shift position and the rear peak shift position are adjacent to each other, or when one data sample exists between the front peak shift position and the rear peak shift position.
When there is only one, the front angle correction area and the rear angle correction area do not exist, so that the processing of the front angle correction area and the rear angle correction area is not performed. As described above, the contour is corrected. Next, a specific operation of each unit in the present embodiment will be described.

First, the peak detection circuit 31 according to the present embodiment will be described with reference to FIGS. As shown in FIG. 3, the peak detection circuit 31 according to the present embodiment includes a delay circuit 31 in which a plurality of delay elements are connected in series.
1, a maximum value / minimum value detection circuit 312 for detecting a maximum value or a minimum value from a plurality of inputs, and a comparison detection circuit 313 for performing an operation from a plurality of inputs.

The input signal of the peak detection circuit 31 is supplied to a delay circuit 311 and a maximum / minimum value detection circuit 312. All the output signals of the plurality of delay elements in the delay circuit 311 are supplied to the maximum / minimum value detection circuit 312, and the reference signal indicated by the point S (a) in FIG. Three outputs of each output signal are supplied to the comparison detection circuit 313.

The maximum value / minimum value detection circuit 312 outputs a signal representing the maximum value when the value at the point S (a) in FIG. 3 is the maximum value, and outputs a signal representing the minimum value when the value at the point S (a) is the minimum value. The output signal of the maximum / minimum value detection circuit 312 is supplied to a comparison detection circuit 313. The comparison detection circuit 313 calculates the S (a) point in FIG.
The values of the three points are compared with each other, and a peak is detected based on the output signal of the maximum / minimum value detection circuit 312.

The condition for detecting the point S (a) as a positive peak is to satisfy the following two equations as shown in FIG. However, MAX represents the maximum value.

S (a-1) ≦ S (a)> S (a + 1)
And S (a) = MAX [S (ak) to S (a +
k)] S (a-1) <S (a) ≧ S (a + 1) and S
(A) = MAX [S (a−k) to S (a + k)] The condition for detecting the point S (a) as a negative peak is shown in FIG.
As shown in (b), the following two equations must be satisfied. Here, MIN represents the minimum value.

S (a-1) ≧ S (a) <S (a + 1)
And S (a) = MIN [S (ak) to S (a +
k)] S (a-1)> S (a) ≦ S (a + 1) and S
(A) = MIN [S (ak) to S (a + k)] As described above, upon detecting a positive or negative peak, the comparison detection circuit 313 outputs a flag indicating that a peak has been detected ( Here, it is assumed that the signal is detected at the high level.)

The quasi-peak detecting circuit 32 according to the present embodiment will be described with reference to FIGS. As shown in FIG. 5, the quasi-peak detection circuit 32 in the present embodiment is a delay circuit 32 in which a plurality of delay elements are connected in series.
1, a maximum / minimum value detection circuit 322 for detecting a maximum value or a minimum value from a plurality of inputs, and a comparison detection circuit 323 for performing an operation from a plurality of inputs.

The input signal of the quasi-peak detection circuit 32 is supplied to the delay circuit 321 and the maximum / minimum value detection circuit 322. All of the output signals of the plurality of delay elements in the delay circuit 321 are supplied to the maximum / minimum value detection circuit 322, and the reference signal indicated by the point S (a) in FIG. Five outputs of each output signal of the delay element are used as the comparison detection circuit 3
23.

The maximum / minimum value detection circuit 322 outputs a signal representing the maximum value when the value immediately before or immediately after the point S (a) in FIG. 4 is the maximum value, and representing the minimum value when the value is the minimum value. Is output. The output signal of the maximum / minimum value detection circuit 322 is supplied to the comparison detection circuit 323.

The comparison detection circuit 323 is provided with the S (a−
1) 3 points of the point, the S (a-2) point before and after the point, and the S (a) point
A point or a point S (a) and three points before and after the point S (a + 1) and S (a + 2) are compared, and a quasi-peak is detected based on the output signal of the maximum / minimum value detection circuit 322. I do. Here, the quasi-peak is data immediately before the positive peak, immediately after the positive peak, immediately before the negative peak, and immediately after the negative peak.

The condition for detecting that S (a) is immediately before the positive peak is that the following equation is satisfied, as shown in FIG. However, MAX represents the maximum value.

S (a) <S (a + 1) ≧ S (a + 2)
And S (a + 1) = MAX [S (ak) to S (a +
k)] The condition for detecting that S (a) is immediately after the positive peak is shown in FIG.
As shown in (b), the following expression is satisfied.
However, MAX represents the maximum value.

S (a-2) ≦ S (a-1)> S (a)
And S (a-1) = MAX [S (ak) to S (a +
k)] The condition for detecting S (a) immediately before the negative peak is shown in FIG.
As shown in (c), the following expression must be satisfied.
Here, MIN represents the minimum value.

S (a)> S (a + 1) ≦ S (a + 2)
And S (a + 1) = MIN [S (ak) to S (a +
k)] The condition for detecting that S (a) is immediately after the negative peak is shown in FIG.
As shown in (d), the following expression must be satisfied.
Here, MIN represents the minimum value.

S (a-2) ≧ S (a-1) <S (a)
And S (a-1) = MIN [S (ak) to S (a +
k)] As described above, when the comparison detection circuit 323 detects the positive or negative peak immediately before or immediately after each, it outputs a flag indicating that the respective quasi-peaks have been detected (here, the detection is performed with a high level). Shall be done.
Also, the output signal indicating immediately before the positive peak is 320 PB,
The output signal immediately after the positive peak is 320 PA, the output signal immediately before the negative peak is 320 MB, and the output signal immediately after the negative peak is 320 MA).

Next, the contour area dividing circuit 33 in the present embodiment will be described with reference to FIGS. As shown in FIG. 7, the contour area dividing circuit 33 in the present embodiment includes an interpolation amount setting value storage section 331, a logical operation circuit 332 for performing a logical operation on an input signal, and an up / down counter (hereinafter, U / D counter) 333A. , 333B, ..., 3
33N, control circuits 334A, 334B,.
N, area signal generation circuits 335A, 335B,.
35N, and a MIX circuit 336.

Here, A, B,..., N are U /
This indicates that there are a plurality of groups including the D counter, the control circuit, and the area signal generation circuit, such as A group, B group,..., N group.

The output signal of the peak detection circuit 31 and the output signal of the quasi-peak detection circuit 32 are supplied to a logical operation circuit 332, and the output signals of the logical operation circuit 332 are supplied to U / D counters 333A to 333N. . The area interpolation amount setting value storage unit 331 supplies the fixed value indicating the shift amount described above with reference to FIG. 2 to the area signal generation circuits 335A to 335N.

The output signals of U / D counters 333A to 333N are supplied to control circuits 334A to 334 in the same group.
N, and are supplied to the area signal generation circuits 335A to 335N, respectively. The output signals of the control circuits 334A to 334N are output to the U / D counters 333A to 333 in the same group.
N, and is supplied to each of the area signal generation circuits 335A to 335N and the control circuits 334B to 334N and 334A of the next group. Then, the area signal generation circuits 335A-
The output signal of 335N is supplied to the MIX circuit 336.

The logical operation circuit 332 performs the following logical operation and outputs 3320A and 3320B as output signals.

320BA = (320PB or 320M)
B) and (320PA or 320MA) 3320A = (320PA or 320MA) and
(Not (310 or 32BA)) 3320B = (320PB or 320MB) and
(Not (310 or 32BA)) The control circuits 334A to 334N control the operation of each of the groups A to N. First, only the A group is in the operable state, the B to N groups are in the halted state, and the U / D
It is assumed that the counters 333A to 333N have been reset to zero. Output signal 3320 of logical operation circuit 332
When the first high level of B is signaled, the U / D counter 333A that has been reset to 0 and is in an operable state starts counting up.

The control circuit 334A has a U / D counter 33
When the counting of 3A is started, the control circuit 334B sends B
Allow group actions. The control circuit 334B puts the circuits in the B group into an operable state. Therefore, the U / D counter 333B reset to 0 is signaled by the next high level of the output signal 3320B of the logical operation circuit 332.
Starts counting up.

Then, the control circuit 334B similarly permits the control circuit 334C to operate in the C group. This is repeated in a loop like A, BN, A, BN, .... The reason why a plurality of groups including an up-down counter, a control circuit, and a region signal generation circuit are prepared is as follows.
During the operation of the counter, the output signal 3 of the logical operation circuit 332 is
This is to make it possible to cope when the count-up start is instructed by the high level of 320B.

For example, when the operation of the group A starts, the control circuit 334A controls so that the group B responds when a signal to start the next count-up comes.
Therefore, the output signals of the control circuits 334A to 334N are connected so as to be supplied between the groups.

That is, as shown in FIG. 8, after the U / D counter 333A starts counting up, the U / D counter 333A signals the high level of the output signal 3320A of the logical operation circuit 332 to a predetermined constant (UTD: here, 16). However, it doesn't matter if it is more or less as long as it does not interfere with the operation)
Current count number OLW (here, it is 6)
Is reset, and the countdown is performed until the value becomes zero.

In the area signal generation circuit 335A, U
The outline area and each processing area are obtained from the output signal 3330A of the / D counter 333A and the shift amount of the interpolation area amount setting value storage unit 331. For example, if the start point of the contour area is U /
It is assumed that a certain value OLS in the countdown of the D counter (here, OLS = 9, at this time, when the contour region of the original input signal starts, “UTD + 2-OLS” = 9 data samples Minutes later).

Further, as described above with reference to FIG. 2, if the front peak shift amount FPS is 2 data samples and the rear peak shift amount BPS is 3 data samples, the end point of the contour area is determined by the countdown of the U / D counter. U
TD-OLS-OLW "(here, it is 1)
It becomes.

Further, the previous peak shift position is "UTD +
2-OLS-FPS ”(here, 7), the previous interpolation area is“ OLS ”and“ UTD + 2-OL ”.
S-FPS ”(here, 8), the post-peak shift position is“ UTD-OLS-OLW ”.
+ BPS "(here, it is 4).

The post-interpolation area is "UTD-OL"
Between (S-OLW + BPS) and “UTD-OLS-OLW” (here, 3 and 2), the correction reference position is “(UTD + UTD + 2-OLS-OLS−
OLW-FPS + BPS) / 2 "(in this case, 5.5).

The output signals of the area signal generation circuits 335A to 335N are input to a MIX circuit 336, where signals of the same area are put together and output as an output signal of the contour correction area detection circuit 3.

When the video signal input from the input terminal 1 is, for example, a signal as shown in FIG. 8 (1), the output signal of the peak detection circuit 31 becomes a signal as shown in FIG. 8 (2). The output signal of the quasi-peak detecting circuit 32 is shown in FIG.
The signal becomes as shown in (6).

In the contour area dividing circuit 33 to which the output signal of the peak detecting circuit 31 and the output signal of the quasi-peak detecting circuit 32 are supplied, the logical operation of the signals shown in FIGS. A signal as shown in (7) is obtained. further,
8 (2), (3), (5), and (7), a signal shown in FIG. 8 (8) is obtained by a logical operation, and signals shown in FIGS. 8 (2), (4), (7) are obtained. The signal shown in FIG. 8 (9) is obtained by the logical operation of the signals shown in 6) and (7).

From the signals of FIGS. 8 (8) and (9), FIG.
The operation of the counter as shown in FIG.
Is divided into an interpolation area signal shown in FIG. 8 (12) and an angle correction area signal shown in FIG. 8 (17).

These are further subdivided, and FIG.
8, the previous peak interpolation area signal to which the position of the data to be referred is added, the front peak shift position signal to which the position of the data to be referred is added as shown in FIG.
After adding the position of the data to be referred to as shown in (15), a peak shift position signal is obtained, and after adding the position of the data to be referred to as shown in FIG.

Next, the reference position detection circuit 41 outputs a position signal of data to be referenced corresponding to the angle correction area signal shown in FIG. 8 (17) from the output signal of the contour area division circuit 33. Further, the reference value calculation circuit 42 outputs a position signal of data to be referred to corresponding to the angle correction area signal shown in FIG. 8 (17) from the output signal of the contour area division circuit 33.

The peak shift circuit 52 according to the present embodiment will be described with reference to FIGS. As shown in FIG. 9, the peak shift circuit 52 in the present embodiment includes selection circuits 521 and 522 for selectively outputting a plurality of input signals from the delay circuit 51, a coefficient generation circuit 523,
It comprises multiplication circuits 524, 525 and an addition circuit 526.

The output signal of the selection circuit 521 is
The output signal of the selection circuit 522 is supplied to one input terminal of the multiplication circuit 525.
The coefficient generation circuit 523 generates an appropriate coefficient based on the output signal of the contour correction area detection circuit 3,
525 to the other input.

Output signal of multiplication circuit 524 and multiplication circuit 52
The output signal of No. 5 is supplied to the adder circuit 526, added to each other, and output as an output signal of the peak shift circuit 52.

Note that the output signal of the contour area dividing circuit 33 is
As mentioned above, since it is delayed by 9 data samples,
The corresponding video signal is a signal obtained by delaying the input signal by 9 data samples, as shown in FIG. That is, in the delay circuit 51, a signal obtained by delaying the input signal by nine data samples as shown in FIG. At the same time, it outputs a plurality of signals with different delay amounts necessary for the processing described later.

Therefore, in the peak shift circuit 52, as shown in FIG. 10 (19), the signal obtained by delaying the input signal as shown in FIG. A peak shift process is performed to output a signal as if the peak were shifted.

Here, FIG. 11A in which the vicinity of D6 is enlarged.
In addition, the peak shift processing will be described in detail. When D6 is input, D4 and D6 are weighted and added by the output signal of the delay circuit 51 and the output signal of the contour correction area detection circuit 3, respectively.

The original values of D4 and D6 are respectively converted to VD
4, VD6, the value of D6 subjected to the peak shift processing is VD6
S, VD6S = p × VD4 + (1−p) × VD6 (where,
0 <p ≦ 1).

According to this, the value VD6S after the peak shift processing in D6 takes an arbitrary value between VD4 and VD6, so that if the value of the coefficient p is increased,
Although the sharpness of the contour is improved, it does not exceed the value of VD4, so that no preshoot or overshoot occurs.

Note that FIG. 11B in which the vicinity of D9 is enlarged is the same as the above-described peak shift processing, and the description thereof is omitted.

Further, the peak interpolation circuit 53 according to the present embodiment will be described with reference to FIGS.
As shown in FIG. 12, the peak interpolation circuit 53 in the present embodiment includes selection circuits 531 to 535 for selectively outputting a plurality of input signals from the delay circuit 51, and a coefficient generation circuit 53.
6, multiplication circuits 537, 538, 53A, 53B, 53
E, addition circuits 539, 53C, 53F, subtraction circuit 53D
It is composed of

The output signal of the selection circuit 531 is
The output signal of the selection circuit 532 is supplied to one input terminal of the multiplication circuit 537, and the output signal of the selection circuit 533 is supplied to one input terminal of the multiplication circuit 538. . The output signal of the selection circuit 534 is supplied to one input terminal of the subtraction circuit 53D.
Is supplied to the other input terminal of the subtraction circuit 53D.

In the coefficient generation circuit 536, an appropriate coefficient is generated based on the output signal of the contour correction area detection circuit 3, and the other input terminals of the multiplication circuits 537, 538 and 53A and the multiplication circuits 53B and 53E. Supply to one input. The output signal of the multiplication circuit 537 and the output signal of the multiplication circuit 538 are supplied to the addition circuit 539 and are added.

The output signal of the adding circuit 539 is
3B is supplied to the other input terminal. The output signal of the multiplication circuit 53A and the output signal of the multiplication circuit 53B are
C and added to each. Subtraction circuit 53D
Is supplied to the other input terminal of the multiplication circuit 53E. The output signal of the adding circuit 53C and the output signal of the multiplying circuit 53E are supplied to the adding circuit 53F, added, and then output as the output signal of the peak interpolation circuit 53.

Therefore, in the peak interpolation circuit 53,
The signal obtained by delaying the input signal as shown in FIG. 10 (18) by 9 data samples is subjected to peak interpolation processing at D5, D10 and D11 as shown in FIG. 13 (20). That is, since the signals are distorted at D5, D10, and D11 by performing peak shift processing on D6 and D9, D5 is changed from D3, D4, and D6 to D10, D11.
Is interpolated from D9, D12 and D13 to generate a new signal.

Here, FIG. 14A in which the vicinity of D5 is enlarged.
In addition, the peak interpolation processing will be described in detail. When D5 is input, D3, D4, and D6 are weighted and added by the output signal of the delay circuit 51 and the output signal of the contour correction area detection circuit 3, respectively.

Assuming that the original values of D3, D4, D5, and D6 are VD3, VD4, VD5, and VD6, respectively, and that the value of D5 subjected to the peak interpolation processing is VD5S, first, VD6S is obtained as in the above-described peak shift processing. .

VD6S = p × VD4 + (1−p) × VD
6 (however, 0 <p ≦ 1) In the interpolation processing of D5, linear interpolation is first performed between VD6S at D6 and VD4 at D4 to obtain VD5L.
Here, since the distances between D4 to D5 and D5 to D6 are equal, VD5L = (VD4 + VD6S) / 2.

Next, the result obtained by subtracting VD3 from VD4 is multiplied by an appropriate multiplier s and added to VD5L to obtain VD5L.
By using VD5S, signal degradation due to extreme nonlinear processing is suppressed.

VD5S = VD5L + (VD4−VD3) × s At this time, since the value of VD5S takes a value between VD5L and VD4, no preshoot or overshoot occurs. Note that FIG. 14B in which the vicinity of D10 and D11 is enlarged is the same as the above-described peak interpolation processing, and thus the description thereof is omitted.

Then, the output signal of the delay circuit 51 shown in FIG. 10 (18), the output signal of the peak shift circuit 52 shown in FIG. 10 (19), and the output signal of the peak interpolation circuit shown in FIG. Are supplied to the selection circuit 54 and are appropriately selected by the output signal of the contour correction area detection circuit 3 to obtain the output signal of the interpolation circuit 5 as shown in FIG.

Next, the angle change detection circuit 62 according to the present embodiment will be described with reference to FIGS.
As shown in FIG. 15, the angle change detection circuit 62 according to the present embodiment includes selection circuits 621 to 625 for selectively outputting a plurality of input signals from the delay circuit 61, and a coefficient generation circuit 62.
6, multiplication circuits 627, 628, 62A, 62C, addition circuits 629, 62B, tan ^-1 operation circuits 62F, 62G,
It comprises subtraction circuits 62D, 62E and 62H.
The tan ^-1 arithmetic circuits 62F and 62G may be any type of ROM as long as they can perform the arithmetic.

The output signal of the selection circuit 621 is
2E, the output signal of the selection circuit 622 is supplied to one input terminal of the multiplication circuit 627, and the output signal of the selection circuit 623 is supplied to one input terminal of the multiplication circuit 628. . The output signal of the selection circuit 624 and the output signal of the selection circuit 625 are supplied to the addition circuit 62B.
After each addition, the multiplication circuit 62C multiplies the coefficient by 係数.

In the coefficient generation circuit 626, an appropriate coefficient is generated based on the output signal of the contour correction area detection circuit 3, and the other input terminals of the multiplication circuits 627 and 628 and the other input terminal of the multiplication circuit 62A are connected. To supply. Multiplication circuit 627
And the output signal of the multiplication circuit 628 are supplied to the addition circuit 629, and after being added, respectively, the subtraction circuit 6
It is supplied to one input of 2D.

The output signal of the multiplying circuit 62C is
It is supplied to the other input terminal of 2D, 62E. Multiplication circuit 6
The output signal of the reference point detection circuit 4 is supplied to the other input terminal of 2A, and the output signal of this multiplication circuit 62A is tan ^-1.
It is supplied to one input terminal of the arithmetic circuits 62F and 62G.

The output signal of the subtraction circuit 62D is supplied to the other input terminal of the tan ^-1 operation circuit 62F.
The output signal of E is supplied to the other input terminal of the tan ^-1 arithmetic circuit 62G. The output signal of the tan ^-1 operation circuit 62F and the output signal of the tan ^-1 operation circuit 62G are subtracted by the subtraction circuit 62
After being subtracted at H, it is output as an output signal of the angle change detection circuit 62.

In the delay circuit 61, FIG.
A signal obtained by delaying the input signal as shown in 8) by 9 data samples is obtained, and has a maximum delay amount capable of obtaining a minimum signal necessary for processing described later, and a different delay amount required for processing described later. Are output.

Therefore, in the angle change detecting circuit 62 to the corrected angle generating circuit 63 to the angle interpolating circuit 64,
For a signal obtained by delaying the input signal as shown in (18) by 9 data samples, as shown in FIG.
D6, D7, D8, D9 perform angle correction processing,
A signal as if rotated around a reference point is output.

That is, FIG. 1 in which the vicinity of D6 to D9 is enlarged.
As shown in FIG. 7, VD6 is VD6 relative to the reference point VDR.
The angle changed to S is detected, and VD with respect to the reference point VDR is detected.
VD7S is generated by interpolating the angle of VD7S from the angle of 7 and the change angle to VD6S.

Similarly, VD9 is set to V with respect to reference point VDR.
The angle changed to D9S is detected, and the angle VD8S should be interpolated from the angle of VD8 with respect to the reference point VDR and the angle of change to VD9S to generate VD8S.

FIG. 18A is an enlarged view of the vicinity of D7.
In addition, the angle change detection processing will be described in detail. When D7 is input, D4 and D6 are weighted and added by the output signal of the delay circuit 61 and the output signal of the contour correction area detection circuit 3, respectively.

The original values of D4 and D6 are respectively converted to VD
4, VD6, the value of D6 subjected to the peak shift processing is VD6
S, VD6S = p × VD4 + (1−p) × VD6 (where,
0 <p ≦ 1).

Further, based on VD6S, the output signal of the delay circuit 61, and the output signal of the reference point detection circuit 4, an angle θ _VD6S with respect to the reference point VDR is obtained by the tan ⁻¹ arithmetic circuit 62F.

Θ _VD6S = tan ⁻¹ ((VD6S− (VD7
+ VD8) / 2) /1.5t) Next, based on the output signal of the delay circuit 61 and the output signal of the reference point detection circuit 4, the reference point VD is obtained by the tan ^-1 arithmetic circuit 62G.
The angle θ _VD6 with respect to R is _obtained .

Θ _VD6 = tan ⁻¹ ((VD6- (VD7 +
VD8) / 2) /1.5t) Then, a _{value obtained} by subtracting the angle θ _VD6 from the angle θ _VD6S is a change angle θ _VD6U, which is an output signal of the angle change detection circuit 62.

Θ _VD6U = θ _VD6S −θ _VD6S Note that FIG. 18B in which the vicinity of D8 is enlarged is the same as the above-described angle change detection processing, and therefore the description thereof is omitted.

The correction angle generation circuit 63 according to the present embodiment will be described with reference to FIGS.
As shown in FIG. 19, the correction angle generation circuit 63 in this embodiment includes selection circuits 631 to 633 for selecting and outputting a plurality of input signals from the delay circuit 61, and a coefficient generation circuit 63.
4. Multiplication circuits 635, 637, 63A, addition circuit 63
6,63B, tan ^-1 operation circuit 639, subtraction circuit 638
It is composed of Note that the tan ^-1 arithmetic circuit 639 is
A ROM or anything may be used as long as the calculation can be performed.

The output signal of the selection circuit 631 is
38 is supplied to one input terminal. The output signal of the selection circuit 632 and the output signal of the selection circuit 633 are added to the addition circuit 63
, And after being added to each other, a multiplication circuit 637
, And is supplied to the other input terminal of the subtraction circuit 638.

The coefficient generation circuit 634 generates an appropriate coefficient based on the output signal of the contour correction area detection circuit 3 and supplies it to one input terminal of the multiplication circuits 635 and 63A. The output signal of the reference point detection circuit 4 is supplied to the other input terminal of the multiplication circuit 635, and the output signal is supplied to one input terminal of the tan ⁻¹ operation circuit 639. On the other hand, ta
The other input terminal of the n ^-1 arithmetic circuit 639 has a subtraction circuit 63
8 output signals are provided.

The output signal of the angle change detection circuit 62 is supplied to the other input terminal of the multiplication circuit 63A. Then, the output signal of the multiplication circuit 63A and the output signal of the tan ^-1 operation circuit 639 are supplied to the addition circuit 63B, added, and output as the output signal of the correction angle generation circuit 63.

FIG. 20A is an enlarged view of the vicinity of D7.
In addition, the correction angle generation processing will be described in detail. Based on the output signal of the delay circuit 61 and the output signal of the reference point detection circuit 4, an angle θ _VD7 with respect to the reference point VDR is obtained by a tan ⁻¹ operation circuit 639.

Θ _VD7 = tan ⁻¹ ((VD7− (VD7 +
VD8) / 2) /0.5t) Next, the _desired angle θ _{VD7S of VD7S} with respect to the reference point VDR is _obtained from the angle θ _VD7 with respect to the reference point VDR and the output signal of the angle change detection circuit 62.

Θ _VD7S = θ _VD7 + v × θ _VD6U Basically, the angle θ _VD7 is _obtained by adding the angle θ _VD6U to the angle θ _VD7 .
Although the angle theta _VD7S should be relative to the reference point VDR of VD7S, in order to have some width, where the angle theta
_VD6U is multiplied by an arbitrary coefficient v. Θ obtained in this way
_VD7S is an output signal of the correction angle generation circuit 63.

Note that FIG. 20 (b) in which the vicinity of D8 is enlarged is the same as the above-described correction angle generation processing, and a description thereof will be omitted.

Further, the angle interpolation circuit 64 according to the present embodiment will be described with reference to FIGS. As shown in FIG. 21, the angle interpolation circuit 64 in the present embodiment includes selection circuits 641 and 642, a coefficient generation circuit 643,
Multiplication circuits 644, 647, 648, tan operation circuit 64
5. It is composed of addition circuits 646 and 649. still,
The tan operation circuit 645 may be any type of ROM as long as the operation can be performed.

Output signal of selection circuit 641 and selection circuit 64
The output signal of 2 is supplied to an adding circuit 646, and after being added to each other, is multiplied by a factor of 1/2 in a multiplying circuit 648. The coefficient generation circuit 643 generates an appropriate coefficient based on the output signal of the contour correction area detection circuit 3,
It is supplied to one input terminal of the multiplication circuit 644. Multiplication circuit 6
An output signal of the reference point detection circuit 4 is supplied to the other input terminal of the reference signal 44.

An output signal of the interpolation angle generation circuit 63 is supplied to the tan operation circuit 645. The output signal of the multiplication circuit 644 and the output signal of the tan operation circuit 645 are supplied to the multiplication circuit 647 and multiplied, respectively, and then added by the addition circuit 649 to the output signal of the multiplication circuit 648, respectively. As an output signal.

Here, FIG. 22 (a) is an enlarged view of the vicinity of D7.
In addition, the angle interpolation processing will be described in detail. Based on the output signal of the correction angle generation circuit 63 and the output signal of the reference point detection circuit 4, an amplitude difference VD7S-VDR with respect to the reference point VDR is obtained by the tan operation circuit 645.

VD7S-VDR = 0.5t × tan θ
_{According to VD7S} , VD7S can be _obtained by VD7S = VDR + _0.5t × tan θ _VD7S .

Since _0.5t × tan θ _VD7S has been obtained, _VDR is further obtained from the output signal of the delay circuit 61 and the output signal of the reference point detection circuit 4.

VDR = (VD7 + VD8) / 2 VD7S obtained in this manner is an output signal of the angle interpolation circuit 64. Note that FIG. 22 (b) in which the vicinity of D8 is enlarged is the same as the above-described angle interpolation processing, and a description thereof will be omitted.

The output signal of the delay circuit 61 and the output signal of the angle interpolation circuit 64 are supplied to a selection circuit 65,
The output signal of the angle correction circuit 6 is appropriately selected based on the output signal of the contour correction area detection circuit 3 and is obtained.

The output signal of the interpolation circuit 5 and the output signal of the angle correction circuit 6 are supplied to the selection circuit 7 and are appropriately selected by the output signal of the contour correction area detection circuit 3, and are selected as shown in FIG.
6 (23) is output from the output terminal 2 as a contour correction signal.

As described above, according to the contour correction apparatus of this embodiment, the contour area is divided into the peak shift processing, the peak interpolation processing, and the angle correction processing, and the contour is corrected. Even in the part, it is possible to obtain a sufficient contour correction effect by the peak shift processing.

Further, even in a relatively steep contour portion,
In particular, the peak correction process and the peak interpolation process can realize contour correction without adding a preshoot or an overshoot.

For example, when a signal as shown in FIG. 36 is input, the above-described conventional contour correction device has a problem that the geometric structure of the original video signal is lost.
In the contour correction device of the present embodiment, by performing the angle correction processing in particular, the contour correction can be performed without losing the geometric structure, as shown in FIGS.

Further, a steep, convex waveform having a small width as shown in FIG. 38A is input as a gently convex input signal having a wide width as shown in FIG. 38C. 38 (2), and a steep convex waveform having a large width as shown in FIG. 38 (2) is input as a smooth convex input signal having a narrow width as shown in FIG. 38 (3). Even in this case, the front peak shift amount and the rear peak shift amount can be set independently, so that the sharpness of the contour can be improved and the width can be controlled.

Hereinafter, a second embodiment of the contour correcting apparatus of the present invention will be described with reference to FIGS. 24 and 25. The same parts as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted. In the contour correction device of the present embodiment, the other configuration of the contour correction area detection circuit is the same as that of the first embodiment, and thus only the contour correction area detection circuit will be described. FIG. 24 is a block diagram showing an outline correction area detection circuit according to the present embodiment.

In FIG. 24, 31 is a peak detection circuit,
32 is a quasi-peak detection circuit, 331 is an interpolation amount setting value storage unit, 332 is a logic operation circuit, 333A to 333N are up / down counters (hereinafter, U / D counters), 334A
334N is a control circuit, 335A to 335N are area signal generation circuits, 336 is a MIX circuit, and 337A to 337N are set value correction circuits (interpolation area amount correction means).

The video signal input from the input terminal 1 is supplied to a peak detection circuit 31 and a quasi-peak detection circuit 32. The output signal of the peak detection circuit 31 and the output signal of the quasi-peak detection circuit 32 are logically operated. The signal is supplied to a circuit 332. The output signal of the logical operation circuit 332 is supplied to U / D counters 333A to 333N.

The area interpolation amount setting value storage unit 331 holds the fixed value indicating the shift amount described above with reference to FIG.
The set value correction circuits 334A to 334N are supplied. Output signals of the setting value correction circuits 337A to 337N are supplied to the area signal generation circuits 335A to 335N.

U / D counters 333A, 333B,...
, 333N are supplied to control circuits 334A, 334B,... 334N and area signal generation circuits 335A, 335B,.

Control circuits 334A, 334B,..., 3
, 333N, the area signal generation circuits 335A, 335B,..., 335N in the same group, and the next group of control circuits 334B,. 334N, 334A
Respectively.

The region signal generation circuits 335A, 335B,.
, 335N are output from set value correction circuits 334A, 334B,.
Each is supplied to the X circuit 336.

Here, it is assumed that UTD is 16, FPS is 3, and BPS is 3. For example, when a signal as shown in FIG. 25A is input, the U / D counter 333A operates as shown in the lower part of FIG. Here, OLW is 7 from the input signal.

The set value correction circuit 337A is supplied with the OLW value from the area signal generation circuit 335A and the shift amount from the interpolation area amount set value storage section 331. The set value correction circuit 337A corrects the front peak shift amount FPS and the rear peak shift amount BPS according to the OLW value as follows, and outputs the pre-correction peak shift amount MFPS and the post-correction peak shift amount MBPS. .

If “FPS + BPS ≦ OLW + 1”, MFPS = FPS and MBPS = BPS. If “FPS + BPS> OLW + 1”, first the OV
L is calculated (OVL = FPS + BPS-OLW-1).
Next, FOVL and BOVL are generated from OVL so as to approximate the ratio of FPS: BPS, and FPS and BP are respectively generated.
Subtract from S. FOVL = ROUND [OVL × FPS / (FPS + B
PS)] BOVL = ROUND [OVL × BPS / (FPS + B
PS)] MFPS = FPS-FOVL MBPS = FPS-BOVL Here, ROUND [] represents rounding. For example,
Although not shown, OVL is 3, FPS is 3, BPS
Is 2, the FOVL is ROUND [3 × 3 / (3
+2)] = 2, and BOVL is 1.

In the case of the signal shown in FIG.
+ BPS ≦ OLW + 1 ”, the MFPS
= FPS, MBPS = BPS, and the peak shift amount does not change as shown in FIG.
In the case of the signal shown in (c), “FPS + BPS> OLW +
Since the FPS and the BPS are not corrected because they are 1 ", FIG.
As shown in (d), the areas overlap.

From the above equation, MFPS = 3-ROUND [3 × 3/6] = 3-2 = 1 MBPS = 3-ROUND [3 × 3/6] = 3-2 = 1

The method of determining the start point of the contour area, the end point of the contour area, the front peak shift position, the front interpolation area, the rear peak shift position, the rear interpolation area, and the correction reference position by the area signal generation circuit 335A is described above. FP in one embodiment
Since S and BPS have only been changed to MFPS and MBPS, description thereof will be omitted.

As described above, according to the contour correction area detection circuit of the present embodiment, the amount of peak shift in the peak shift processing can be varied according to the length of the contour area, so that the contour correction can be performed more naturally. It is possible to do.

Hereinafter, a third embodiment of the contour correction apparatus of the present invention will be described with reference to FIGS. 26 and 27. The same reference numerals are given to the same parts as those in the first embodiment, and the description thereof will be omitted. In the contour correction device of the present embodiment, the other configuration of the contour correction area detection circuit is the same as that of the first embodiment, and thus only the contour correction area detection circuit will be described. FIG. 26 is a block diagram showing a contour correction area detection circuit according to this embodiment.

In FIG. 26, 31 is a peak detection circuit,
32 is a quasi-peak detection circuit, 331 is an interpolation amount setting value storage unit, 332 is a logic operation circuit, 333A to 333N are up / down counters (hereinafter, U / D counters), 334A
334N are control circuits, 335A to 335N are area signal generation circuits, 336 are MIX circuits, 337A to 337N are set value correction circuits (interpolation area amount correction means), and 338 is a peak difference detection circuit.

The video signal input from the input terminal 1 is supplied to the peak detection circuit 31, the quasi-peak detection circuit 32, and the peak difference detection circuit 338, respectively. The output signal of the peak detection circuit 31 and the output signal of the quasi-peak detection circuit 32 are supplied to a logical operation circuit 332,
2 are U / D counters 333A to 333N,
The signals are supplied to the peak difference detection circuit 338.

The output signal of the peak difference detection circuit 338 is supplied to set value correction circuits 334A to 334N. The area interpolation amount setting value storage unit 331 holds a fixed value indicating the shift amount described above with reference to FIG.
4A to 334N. The set value correction circuit 337A,
, 337N are output from the area signal generation circuits 335A, 335B,.
335N.

U / D counters 333A, 333B,...
, 333N are supplied to control circuits 334A, 334B,... 334N and area signal generation circuits 335A, 335B,.

Control circuits 334A, 334B,..., 3
, 333N, the area signal generation circuits 335A, 335B,..., 335N in the same group, and the next group of control circuits 334B,. 334N, 334A
Supplied to The area signal generation circuits 335A, 335B,
, 335N are supplied to the MIX circuit 336.

In the peak difference detecting circuit 338, a signal obtained by delaying the input video signal by one data sample is stored as an output signal of the logical operation circuit 332 in an internal first register (not shown). Further, the input video signal is converted to a logical operation circuit 33.
A signal obtained by delaying the output signal of No. 2 by one data sample,
It is stored in an internal second register (not shown).

As a result, the signal of the preceding peak position is stored in the first register, and the signal of the subsequent peak position is stored in the second register. Thereafter, the absolute value of the difference between the signal of the first register and the signal of the second register is calculated,
It is output as an output signal of the peak difference detection circuit 338.

Here, it is assumed that UTD is 16, FPS is 3, and BPS is 3. The set value correction circuit 337A corrects FPS and BPS to MFPS and MBPS and outputs the corrected FPS and BPS in accordance with the value of the output signal of the peak difference detection circuit 338 as follows.

The value of the output signal of the peak difference detection circuit 338 is defined as PTP. Threshold value PTP arbitrarily set by PTP
If less than R1, MFPS = FPS, MBPS = BP
S. If PTP is an arbitrary threshold PT
If not less than PR1 and less than PTPR2, MFPS = F
PS-1 (however, if FPS-1 ≦ 0, MFPS =
1), MBPS = BPS-1 (however, if BPS-1 ≦ 0, MBPS = 1).

If the PTP is set to an arbitrary threshold value P
If TPR2 or more, MFPS = FPS-2 (however,
If FPS-2 ≦ 0, MFPS = 1), MBPS = B
PS-2 (however, if BPS-2 ≦ 0, MBPS =
1). Note that the number of types of thresholds may be more, and the logic is not limited to this.

For example, in the case of the signal shown in FIG.
It is assumed that the value of the output signal of the peak difference detection circuit 338 is smaller than PTPR1. Therefore, MFPS = FPS, MB
PS = BPS, and the peak shift amount does not change as shown in FIG.

In the case of the signal shown in FIG. 27C, it is assumed that the value of the output signal of the peak difference detection circuit 338 is larger than PTPR2. Therefore, MFPS = FPS−2 = 3
-2 = 1, MBPS = BPS-2 = 3-2 = 1, and
As shown in FIG. 27D, the peak shift amount changes.

The method of determining the start point of the contour area, the end point of the contour area, the previous peak shift position, the previous interpolation area, the rear peak shift position, the rear interpolation area, and the correction reference position by the area signal generation circuit 335A is described above. FP in one embodiment
Since S and BPS have only been changed to MFPS and MBPS, description thereof will be omitted.

As described above, according to the contour correction area detection circuit of the present embodiment, the peak shift amount in the peak shift processing can be varied according to the peak difference between the contour areas. In areas where the difference is large, the contour correction effect is noticeable, and stepwise distortion may occur in diagonal lines.In areas where the peak difference in the outline area is small, the contrast is originally small and the distortion is less noticeable. Considered, more natural contour correction can be performed.

Hereinafter, a fourth embodiment of the contour correction device of the present invention will be described with reference to FIGS. 28 to 30. The same parts as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted. In the contour correction device of the present embodiment, the other configuration of the contour correction area detection circuit is the same as that of the first embodiment, and thus only the contour correction area detection circuit will be described. FIG. 28 is a block diagram showing an outline correction area detection circuit according to this embodiment.

In FIG. 28, 31A is a first peak detection circuit, 31B is a second peak detection circuit, and 32A is a first peak detection circuit.
, A reference numeral 32B denotes a second quasi-peak detection circuit, 331 denotes an interpolation amount setting value storage unit, 332 denotes a logical operation circuit, 333A to 333N denote up / down counters (hereinafter, U / D counters), and 334A to 334N. Is a control circuit, 335A to 335N are area signal generation circuits, 336 is a MIX circuit, 337A to 337N are set value correction circuits (interpolation area amount correction means), and 339 is a contour area detection circuit (contour area detection means).

The input video signal B is supplied to a second peak detection circuit 31B and a second quasi-peak detection circuit 32B.
The output signal of the second peak detection circuit 31B and the output signal of the second quasi-peak detection circuit 32B are
39.

The operations of the second peak detection circuit 31B, the second quasi-peak detection circuit 32B, and the outline area detection circuit 339 are for detecting the position and length of the outline area of the video signal 10B. Since the operation is the same as the operation of detecting the length of the contour region in the embodiment, the description thereof is omitted.

Here, the input video signal A and the input video signal B
Are signals having a correlation with each other, such as a color difference signal and a luminance signal. For example, it is assumed that the input video signal B (luminance signal) is a signal as shown in FIG. 29A and the input video signal A (color difference signal) is a signal as shown in FIG. 29B. It is assumed that the front peak shift amount and the rear peak shift amount in the video signal B are 1.

When the peak positions of the video signal B and the video signal A are the same as shown in FIGS. 29A and 29B, the contour area detection circuit 339 determines the amount of the previous peak shift and the amount of the rear peak shift in the video signal A. The peak shift amount is set to 1 in accordance with the video signal B. As a result, contours having the same sharpness as shown in FIGS. 29C and 29D can be provided.

On the other hand, when the peak positions of the video signal B and the video signal A are different from each other as shown in FIGS. The amount of peak shift and the video signal B
Is set to 3 so that the same peak shift position is obtained. As a result, contours having the same sharpness as shown in FIGS. 30 (g) and (h) can be provided.

As described above, according to the contour correction area detection circuit of the present embodiment, the contour correction amount of a plurality of input video signals is determined according to the length of the contour area in each of a plurality of correlated input video signals. Can be independently varied, so that the sharpness of different contours can be corrected to the same sharpness.

Hereinafter, a fifth embodiment of the contour correction device of the present invention will be described with reference to FIGS. FIG.
FIG. 1 is a block diagram illustrating a schematic configuration of the contour correction device of the present embodiment. In FIG. 31, reference numeral 1000 denotes the first embodiment of the present invention.
To the contour correction device 2000 described as the fourth embodiment,
Denotes a first frequency conversion circuit, and 3000 denotes a second frequency conversion circuit.

The video signal input from the input terminal 1 is supplied to the first frequency conversion circuit 2000, and the output signal of the first frequency conversion circuit 2000
Supplied to The output signal of the contour correction device 1000 is supplied to the second frequency conversion circuit 3000, and the output signal of the second frequency conversion circuit 3000 is output from the output terminal 2.

It is assumed that the input video signal is a signal sampled at the sampling frequency f1, for example, as shown in FIG. In the first frequency conversion circuit 2000, the sampling frequency f1 is up-sampled to a sampling frequency f2 which is an integral multiple of f1. Here, as an example, f2 = 3
Xf1, but need not be three times.

As a result, the peak shift amount in the contour correction device 1000 is not a data sample unit sampled at the sampling frequency f1, but the sampling frequency is up-sampled to f2 as shown in FIG. The contour correction device 1000 can set a fine peak shift amount between data samples at the sampling frequency f1, which can be set in units of data samples and cannot be set if the sampling frequency f1 remains unchanged. Become.

The output signal of the contour correction device 1000 that has performed finer contour correction at the sampling frequency f2 is converted by the second frequency conversion circuit 3000 into the original sampling frequency f1.
Downsampled.

As described above, according to the contour correction device of the present embodiment, the sampling frequency is up-sampled from f1 to f2 at the preceding stage, so that the peak correction amount can be finely set in the contour correction device. . Further, since the sampling frequency is down-sampled from f2 to f1 at the subsequent stage of the contour correction device, the load on the circuit connected at the subsequent stage is not further increased.

Further, by performing up-sampling and down-sampling processes before and after the contour correction device, it is possible to alleviate the deterioration of the image quality due to the aliasing noise of the harmonic component generated by the nonlinear processing of the contour correction device. .

[0206]

Since the contour correcting apparatus according to the first aspect of the present invention has the above-described configuration, the geometric structure of the original video signal can be reduced without adding a preshoot or an overshoot. Without loss, it is possible to simultaneously control the width of the convex input video signal and obtain a high-quality contour-corrected image.

The contour correcting device according to the second aspect of the present invention can appropriately and effectively divide a region for which a contour is to be corrected, and therefore does not add a preshoot or an overshoot, and Without losing the geometric structure of the original video signal, it is possible to simultaneously control the width of the convex input video signal and obtain a high-quality contour-corrected image.

The contour correcting device according to the third aspect of the present invention can vary the amount of contour correction in accordance with the length of the contour region, so that a higher quality contour corrected image can be obtained. Can be.

The contour correcting apparatus according to the fourth aspect of the present invention can vary the amount of contour correction in accordance with the amplitude of the contour area, so that a higher quality contour corrected image can be obtained. it can.

According to the contour correcting apparatus of the present invention, the contour correction amounts of the plurality of input video signals can be independently controlled according to the length of the contour area in each of the plurality of correlated input video signals. Therefore, the sharpness of different contours can be corrected to the same sharpness.

The contour correcting apparatus according to the sixth aspect of the present invention can perform a smooth interpolation process without unnatural continuity of a video signal. Therefore, a preshoot or an overshoot is added. It is possible to obtain a high-quality contour-corrected image by simultaneously controlling the width of the convex input video signal without losing the geometrical structure of the original video signal without losing the geometric structure of the original video signal. Become.

The contour correcting apparatus according to the seventh aspect of the present invention can determine an optimum reference point in a contour area, and therefore does not add a preshoot or an overshoot, and does not add a preshoot or an overshoot to the original video signal. It is possible to obtain a high-quality contour-corrected image by simultaneously controlling the width of the convex input video signal without losing the geometrical structure.

The contour correcting apparatus according to the eighth aspect of the present invention can smoothly correct an angle in a contour and improve sharpness without unnatural continuity of a video signal. Without adding preshoot or overshoot and without losing the geometric structure of the original video signal, the width of the convex input video signal can be controlled at the same time to achieve high quality contours. A corrected image can be obtained.

The contour correcting device according to the ninth aspect of the present invention can vary the amount of contour correction with higher accuracy, and the aliasing noise of the harmonic component generated by the nonlinear processing of the contour correcting device. Can reduce the deterioration of the image quality.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a schematic configuration of a contour correction device according to a first embodiment of the present invention.

FIG. 2 is a waveform diagram for explaining a schematic operation of the contour correction device according to the first embodiment of the present invention.

FIG. 3 is a block diagram showing a peak detection circuit in the first embodiment of the contour correction device of the present invention.

FIG. 4 is a waveform diagram for explaining the operation of the peak detection circuit in the first embodiment of the contour correction device of the present invention.

FIG. 5 is a block diagram showing a quasi-peak detection circuit in the first embodiment of the contour correction device of the present invention.

FIG. 6 is a waveform diagram for explaining an operation of the quasi-peak detection circuit in the first embodiment of the contour correction device of the present invention.

FIG. 7 is a block diagram showing a contour area dividing circuit in the first embodiment of the contour correction device of the present invention.

FIG. 8 is a waveform diagram for explaining the operation of the contour area dividing circuit in the first embodiment of the contour correction device of the present invention.

FIG. 9 is a block diagram showing a peak shift circuit in the first embodiment of the contour correction device of the present invention.

FIG. 10 is a waveform diagram for explaining the operation of the peak shift circuit in the first embodiment of the contour correction device of the present invention.

FIG. 11 is a waveform diagram for explaining the operation of the peak shift circuit in the first embodiment of the contour correction device of the present invention.

FIG. 12 is a block diagram showing a peak interpolation circuit in the first embodiment of the contour correction device of the present invention.

FIG. 13 is a waveform chart for explaining the operation of the peak interpolation circuit in the first embodiment of the contour correction device of the present invention.

FIG. 14 is a waveform chart for explaining the operation of the peak interpolation circuit in the first embodiment of the contour correction device of the present invention.

FIG. 15 is a block diagram showing an angle change detection circuit in the first embodiment of the contour correction device of the present invention.

FIG. 16 is a waveform diagram for explaining the operation of the angle change detection circuit in the first embodiment of the contour correction device of the present invention.

FIG. 17 is a waveform diagram for explaining the operation of the angle change detection circuit in the first embodiment of the contour correction device of the present invention.

FIG. 18 is a waveform diagram for explaining the operation of the angle change detection circuit in the first embodiment of the contour correction device of the present invention.

FIG. 19 is a block diagram showing a correction angle generation circuit in the first embodiment of the contour correction device of the present invention.

FIG. 20 is a waveform chart for explaining the operation of the correction angle generation circuit in the first embodiment of the contour correction device of the present invention.

FIG. 21 is a block diagram showing an angle interpolation circuit in the first embodiment of the contour correction device of the present invention.

FIG. 22 is a waveform chart for explaining the operation of the angle interpolation circuit in the first embodiment of the contour correction device of the present invention.

FIG. 23 is a waveform chart for explaining the operation of the contour correction device according to the first embodiment of the present invention.

FIG. 24 is a block diagram showing an outline correction area detection circuit in a second embodiment of the outline correction device of the present invention.

FIG. 25 is a waveform chart for explaining the operation of the contour correction area detection circuit in the second embodiment of the contour correction device of the present invention.

FIG. 26 is a block diagram showing a contour correction area detection circuit in a third embodiment of the contour correction device of the present invention.

FIG. 27 is a waveform chart for explaining the operation of the contour correction area detection circuit in the third embodiment of the contour correction device of the present invention.

FIG. 28 is a block diagram illustrating a contour correction area detection circuit in a contour correction device according to a fourth embodiment of the present invention.

FIG. 29 is a waveform diagram for explaining the operation of the contour correction area detection circuit in the contour correction device according to the fourth embodiment of the present invention.

FIG. 30 is a waveform diagram for explaining an operation of a contour correction area detection circuit in a fourth embodiment of the contour correction device of the present invention.

FIG. 31 is a block diagram illustrating a schematic configuration of a contour correction device according to a fifth embodiment of the present invention.

FIG. 32 is a waveform chart for explaining the operation of the contour correction device according to the fifth embodiment of the present invention.

FIG. 33 is a block diagram illustrating an example of a conventional contour correction device.

FIG. 34 is a waveform diagram for explaining an operation in an example of a conventional contour correction device.

FIG. 35 is a block diagram showing another example of the conventional contour correction device.

FIG. 36 is a waveform diagram for explaining the operation of another example of the conventional contour correction device.

FIG. 37 is a waveform chart for explaining the operation of another example of the conventional contour correction device.

FIG. 38 is a waveform chart for explaining the operation of the conventional contour correction device.

[Explanation of symbols]

 Reference Signs List 1 input terminal 2 output terminal 3 contour correction area detection circuit 4 reference point detection circuit 5 interpolation circuit 6 angle correction circuit 7 selection circuit 31 peak detection circuit 31A first peak detection circuit 31B second peak detection circuit 32 quasi-peak detection circuit 32A first quasi-peak detection circuit 32B second quasi-peak detection circuit 33 contour area division circuit 41 reference position detection circuit 42 reference value calculation circuit 51 delay circuit 52 peak shift circuit 53 peak interpolation circuit 54 selection circuit 61 delay circuit 62 angle Change detection circuit 63 Correction angle generation circuit 64 Angle interpolation circuit 65 Selection circuit 332 Logical operation circuit 333A to 333N Up / down counter 334A to 334N Control circuit 335A to 335N Area signal generation circuit 336 MIX circuit 337A to 337N Setting value correction circuit 338 Peak difference Detection circuit 339 Contour area detection circuit 1000 Contour correction device 2000 First frequency conversion circuit 3000 Second frequency conversion circuit

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Shugoro Harihara 22-22, Nagaikecho, Abeno-ku, Osaka-shi, Osaka F-term (reference) 5C021 PA18 PA42 PA53 PA56 PA58 PA62 PA66 PA67 PA87 PA89 RA02 RA08 RB03 RB04 XB04 YC10

Claims (9)

[Claims] 1. An outline correction area detecting means for detecting an outline area of an input video signal, and further dividing the outline area into an interpolation area and an angle correction area, and an output of the input video signal and the outline correction area detection means. Interpolating means for generating a video signal of the interpolation area based on a signal, reference point detecting means for calculating a reference point of the angle correction area from the input video signal and an output signal of the contour correction area detecting means And an angle correcting means for correcting an angle of the input video signal with respect to the reference point calculated by the reference point detecting means. 2. The contour correction device according to claim 1, wherein the contour correction area detection means detects a position of a maximum value and a minimum value of the input video signal within a predetermined period; A quasi-peak detecting means for detecting a position immediately before and after a maximum value and a minimum value within a predetermined period of an input video signal; and, based on an output signal of the peak detecting means and an output signal of the quasi-peak detecting means, a contour area Detecting means for dividing the contour area into an interpolation area and an angle correction area based on a predetermined interpolation area amount, and further dividing the interpolation area into a peak shift position and a peak interpolation area. A contour correction device characterized by the above-mentioned. 3. The contour correction device according to claim 2, wherein said contour correction area detecting means includes a length of a contour area detected from an output signal of said peak detecting means and an output signal of said quasi-peak detecting means. A contour correction apparatus, comprising: an interpolation area amount correcting unit that varies the interpolation area amount according to the degree. 4. The contour correction device according to claim 2, wherein the contour correction area detection means determines the interpolation area amount according to a difference between a maximum value and a minimum value in an output signal of the peak detection means. A contour correction device comprising variable interpolation area amount correction means. 5. The contour correction device according to claim 1, wherein the contour correction area detection means detects a position of a maximum value and a minimum value of the input video signal within a predetermined period. Second peak detecting means for detecting a position of a maximum value and a minimum value of a second input video signal having a correlation with the input video signal within a predetermined period; First quasi-peak detecting means for detecting positions immediately before and immediately after the value and the minimum value, and second quasi-peak detecting means for detecting positions immediately before and immediately after the maximum value and the minimum value of the second input video signal within a predetermined period. A quasi-peak detecting means, a contour area detecting means for detecting a contour area from an output signal of the second peak detecting means and an output signal of the second quasi-peak detecting means, and an output of the contour area detecting means. An interpolated area amount correcting means for varying an interpolated area amount from a force signal; and a contour area detected from an output signal of the first peak detecting means and an output signal of the first quasi-peak detecting means. Contour region dividing means for dividing the interpolation region into an interpolation region and an angle correction region based on the interpolation region amount, and further dividing the interpolation region into a peak shift position and a peak interpolation region. apparatus. 6. The contour correction device according to claim 1, wherein the interpolation means delays the input video signal, an output signal of the delay means, and an output signal of the contour correction area detection means. From the calculation of the video signal near the contour correction area and the original video signal of the peak shift position,
A peak shift unit that corrects the video signal at the peak shift position, an output signal of the delay unit and an output signal of the contour correction region detection unit, and a video signal near the contour correction region and the original of the peak shift position. By calculation with video signal,
A peak interpolation means for interpolating and generating a video signal in the peak interpolation area, an output signal of the peak shift means, an output signal of the peak interpolation means correction, and an output signal of the delay means, And a selecting means for selecting and outputting according to an output signal. 7. The contour correction device according to claim 1, wherein the reference point detection means detects a position of a reference point of the angle correction area from an output signal of the contour correction area detection means. And a reference value calculating means for calculating a value of a reference point of the angle correction area from the input video signal and an output signal of the contour correction area detecting means. 8. The contour correction device according to claim 1, wherein the angle correction means delays the input video signal, an output signal of the delay means, and an output signal of the contour correction area detection means. From the calculation of the video signal near the contour correction area and the original video signal of the peak shift position,
A peak shift means for obtaining a video signal obtained by correcting the video signal at the peak shift position; an output signal of the contour correction area detection means, an output signal of the reference point detection means, and an output signal of the peak shift means, Angle change detecting means for calculating the angle of the original video signal at the peak shift position with respect to a point and the angle of the video signal at which the peak shift position is corrected with respect to the reference point, and calculating the peak shift angle as the angle difference. From the output signal of the delay means, the output signal of the contour correction area detection means, the output signal of the reference point detection means, and the output signal of the angle change detection means, the video signal of the angle correction area with respect to the reference point A correction angle generation unit that calculates a result of obtaining an angle and the peak shift angle to generate a correction angle; and An angle interpolator for generating a video signal of an angle correction area with respect to the reference point from a force signal, an output signal of the reference point detector, and an output signal of the correction angle generator, an output signal of the angle interpolator And a selection means for selectively outputting an output signal of the delay means and an output signal of the contour correction area detection means. 9. The contour correction apparatus according to claim 1, wherein the input stage includes a step of:
A first frequency conversion means for up-sampling the sampling frequency to f2 is provided.
A contour correction device comprising a second frequency conversion unit for down-sampling the sampling frequency to f1.