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IT1301840B1 - Metodo per incrementare la seletttvita' tra un film di materialefotosensibile ed uno strato da sottoporre ed incisione in processi - Google Patents

Metodo per incrementare la seletttvita' tra un film di materialefotosensibile ed uno strato da sottoporre ed incisione in processi

Info

Publication number
IT1301840B1
IT1301840B1 ITMI981494A IT1301840B1 IT 1301840 B1 IT1301840 B1 IT 1301840B1 IT MI981494 A ITMI981494 A IT MI981494A IT 1301840 B1 IT1301840 B1 IT 1301840B1
Authority
IT
Italy
Prior art keywords
semiconductor device
etching
subjected
light
layer
Prior art date
Application number
Other languages
English (en)
Inventor
Omar Vassali
Simone Alba
Original Assignee
Stmicroelettronica S R L
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stmicroelettronica S R L filed Critical Stmicroelettronica S R L
Priority to IT98MI001494 priority Critical patent/IT1301840B1/it
Publication of ITMI981494A1 publication Critical patent/ITMI981494A1/it
Application granted granted Critical
Publication of IT1301840B1 publication Critical patent/IT1301840B1/it
Priority to US09/836,937 priority patent/US6495455B2/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
IT98MI001494 1998-06-30 1998-06-30 Metodo per incrementare la seletttvita' tra un film di materialefotosensibile ed uno strato da sottoporre ed incisione in processi IT1301840B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT98MI001494 IT1301840B1 (it) 1998-06-30 1998-06-30 Metodo per incrementare la seletttvita' tra un film di materialefotosensibile ed uno strato da sottoporre ed incisione in processi
US09/836,937 US6495455B2 (en) 1998-06-30 2001-04-17 Method for enhancing selectivity between a film of a light-sensitive material and a layer to be etched in electronic semiconductor device fabrication processes

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT98MI001494 IT1301840B1 (it) 1998-06-30 1998-06-30 Metodo per incrementare la seletttvita' tra un film di materialefotosensibile ed uno strato da sottoporre ed incisione in processi

Publications (2)

Publication Number Publication Date
ITMI981494A1 ITMI981494A1 (it) 1999-12-30
IT1301840B1 true IT1301840B1 (it) 2000-07-07

Family

ID=11380352

Family Applications (1)

Application Number Title Priority Date Filing Date
IT98MI001494 IT1301840B1 (it) 1998-06-30 1998-06-30 Metodo per incrementare la seletttvita' tra un film di materialefotosensibile ed uno strato da sottoporre ed incisione in processi

Country Status (2)

Country Link
US (1) US6495455B2 (it)
IT (1) IT1301840B1 (it)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITMI20042206A1 (it) * 2004-11-17 2005-02-17 St Microelectronics Srl Procedimento per la definizione di cirfuiti integrati di dispositivi elettronici a semicondutture
US7615050B2 (en) * 2005-06-27 2009-11-10 Boston Scientific Scimed, Inc. Systems and methods for creating a lesion using transjugular approach
US20070181530A1 (en) * 2006-02-08 2007-08-09 Lam Research Corporation Reducing line edge roughness
JP2013510445A (ja) * 2009-11-09 2013-03-21 スリーエム イノベイティブ プロパティズ カンパニー 半導体の異方性エッチングプロセス
WO2011056783A2 (en) * 2009-11-09 2011-05-12 3M Innovative Properties Company Etching process for semiconductors

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4068018A (en) 1974-09-19 1978-01-10 Nippon Electric Co., Ltd. Process for preparing a mask for use in manufacturing a semiconductor device
US4468284A (en) * 1983-07-06 1984-08-28 Psi Star, Inc. Process for etching an aluminum-copper alloy
JP2639372B2 (ja) * 1995-02-21 1997-08-13 日本電気株式会社 半導体装置の製造方法
TW451355B (en) 1996-09-10 2001-08-21 United Microelectronics Corp Method for increasing the etching selectivity
US5858879A (en) * 1997-06-06 1999-01-12 Taiwan Semiconductor Manufacturing Co., Ltd. Method for etching metal lines with enhanced profile control
US6121154A (en) * 1997-12-23 2000-09-19 Lam Research Corporation Techniques for etching with a photoresist mask
US6271154B1 (en) * 1998-05-12 2001-08-07 Advanced Micro Devices, Inc. Methods for treating a deep-UV resist mask prior to gate formation etch to improve gate profile

Also Published As

Publication number Publication date
US20020008305A1 (en) 2002-01-24
ITMI981494A1 (it) 1999-12-30
US6495455B2 (en) 2002-12-17

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Legal Events

Date Code Title Description
0001 Granted