US5141882A
(en)
*
|
1989-04-05 |
1992-08-25 |
Mitsubishi Denki Kabushiki Kaisha |
Semiconductor field effect device having channel stop and channel region formed in a well and manufacturing method therefor
|
JPH0770727B2
(ja)
*
|
1989-06-16 |
1995-07-31 |
日本電装株式会社 |
Misトランジスタ及び相補形misトランジスタの製造方法
|
US5366922A
(en)
*
|
1989-12-06 |
1994-11-22 |
Seiko Instruments Inc. |
Method for producing CMOS transistor
|
US5296401A
(en)
*
|
1990-01-11 |
1994-03-22 |
Mitsubishi Denki Kabushiki Kaisha |
MIS device having p channel MOS device and n channel MOS device with LDD structure and manufacturing method thereof
|
JP2708596B2
(ja)
*
|
1990-01-31 |
1998-02-04 |
キヤノン株式会社 |
記録ヘッドおよびインクジェット記録装置
|
US5028556A
(en)
*
|
1990-02-16 |
1991-07-02 |
Hughes Aircraft Company |
Process for fabricating radiation hard high voltage devices
|
JP2545762B2
(ja)
*
|
1990-04-13 |
1996-10-23 |
日本電装株式会社 |
高耐圧misトランジスタおよびこのトランジスタを有する相補型トランジスタの製造方法
|
US5262664A
(en)
*
|
1990-06-30 |
1993-11-16 |
Goldstar Electron Co., Ltd. |
Process for formation of LDD transistor, and structure thereof
|
EP0468630A3
(en)
*
|
1990-07-27 |
1993-02-03 |
Actel Corporation |
Method of increasing the breakdown voltage of a mos transistor without changing the fabrication process
|
EP0505877A2
(en)
*
|
1991-03-27 |
1992-09-30 |
Seiko Instruments Inc. |
Impurity doping method with adsorbed diffusion source
|
US5171700A
(en)
*
|
1991-04-01 |
1992-12-15 |
Sgs-Thomson Microelectronics, Inc. |
Field effect transistor structure and method
|
EP0513415A1
(en)
*
|
1991-05-16 |
1992-11-19 |
Kabushiki Kaisha Toshiba |
Insulated gate FET having double-layered wells of low and high impurity concentrations and method of manufacturing the same
|
US5196361A
(en)
*
|
1991-05-15 |
1993-03-23 |
Intel Corporation |
Method of making source junction breakdown for devices with source-side erasing
|
US5894158A
(en)
*
|
1991-09-30 |
1999-04-13 |
Stmicroelectronics, Inc. |
Having halo regions integrated circuit device structure
|
US5648288A
(en)
*
|
1992-03-20 |
1997-07-15 |
Siliconix Incorporated |
Threshold adjustment in field effect semiconductor devices
|
US5219783A
(en)
*
|
1992-03-20 |
1993-06-15 |
Texas Instruments Incorporated |
Method of making semiconductor well structure
|
US5256563A
(en)
*
|
1992-04-16 |
1993-10-26 |
Texas Instruments Incorporated |
Doped well structure and method for semiconductor technologies
|
KR940004711Y1
(ko)
*
|
1992-07-06 |
1994-07-20 |
조길완 |
흘러내림 방지 수단을 구비한 바지
|
US5432103A
(en)
*
|
1992-06-22 |
1995-07-11 |
National Semiconductor Corporation |
Method of making semiconductor ROM cell programmed using source mask
|
JPH06112149A
(ja)
*
|
1992-09-29 |
1994-04-22 |
Nec Corp |
半導体装置の製造方法
|
US5374565A
(en)
*
|
1993-10-22 |
1994-12-20 |
United Microelectronics Corporation |
Method for ESD protection improvement
|
US5463237A
(en)
*
|
1993-11-04 |
1995-10-31 |
Victor Company Of Japan, Ltd. |
MOSFET device having depletion layer
|
US5372960A
(en)
*
|
1994-01-04 |
1994-12-13 |
Motorola, Inc. |
Method of fabricating an insulated gate semiconductor device
|
US5395773A
(en)
*
|
1994-03-31 |
1995-03-07 |
Vlsi Technology, Inc. |
MOSFET with gate-penetrating halo implant
|
US5482878A
(en)
*
|
1994-04-04 |
1996-01-09 |
Motorola, Inc. |
Method for fabricating insulated gate field effect transistor having subthreshold swing
|
US5427964A
(en)
*
|
1994-04-04 |
1995-06-27 |
Motorola, Inc. |
Insulated gate field effect transistor and method for fabricating
|
US5441906A
(en)
*
|
1994-04-04 |
1995-08-15 |
Motorola, Inc. |
Insulated gate field effect transistor having a partial channel and method for fabricating
|
US5492847A
(en)
*
|
1994-08-01 |
1996-02-20 |
National Semiconductor Corporation |
Counter-implantation method of manufacturing a semiconductor device with self-aligned anti-punchthrough pockets
|
JP2790050B2
(ja)
*
|
1994-08-17 |
1998-08-27 |
日本電気株式会社 |
半導体装置の製造方法
|
US5405791A
(en)
*
|
1994-10-04 |
1995-04-11 |
Micron Semiconductor, Inc. |
Process for fabricating ULSI CMOS circuits using a single polysilicon gate layer and disposable spacers
|
US5506161A
(en)
*
|
1994-10-24 |
1996-04-09 |
Motorola, Inc. |
Method of manufacturing graded channels underneath the gate electrode extensions
|
US5545575A
(en)
*
|
1994-10-24 |
1996-08-13 |
Motorola, Inc. |
Method for manufacturing an insulated gate semiconductor device
|
US5612244A
(en)
*
|
1995-03-21 |
1997-03-18 |
Motorola, Inc. |
Insulated gate semiconductor device having a cavity under a portion of a gate structure and method of manufacture
|
US5661048A
(en)
*
|
1995-03-21 |
1997-08-26 |
Motorola, Inc. |
Method of making an insulated gate semiconductor device
|
US5541132A
(en)
*
|
1995-03-21 |
1996-07-30 |
Motorola, Inc. |
Insulated gate semiconductor device and method of manufacture
|
US5489540A
(en)
*
|
1995-03-22 |
1996-02-06 |
Advanced Micro Devices Inc. |
Method of making simplified LDD and source/drain formation in advanced CMOS integrated circuits using implantation through well mask
|
JP3193845B2
(ja)
*
|
1995-05-24 |
2001-07-30 |
シャープ株式会社 |
半導体装置及びその製造方法
|
US6004854A
(en)
|
1995-07-17 |
1999-12-21 |
Micron Technology, Inc. |
Method of forming CMOS integrated circuitry
|
US5534449A
(en)
*
|
1995-07-17 |
1996-07-09 |
Micron Technology, Inc. |
Methods of forming complementary metal oxide semiconductor (CMOS) integrated circuitry
|
US5654213A
(en)
*
|
1995-10-03 |
1997-08-05 |
Integrated Device Technology, Inc. |
Method for fabricating a CMOS device
|
US5736440A
(en)
*
|
1995-11-27 |
1998-04-07 |
Micron Technology, Inc. |
Semiconductor processing method of forming complementary NMOS and PMOS field effect transistors on a substrate
|
US5547894A
(en)
*
|
1995-12-21 |
1996-08-20 |
International Business Machines Corporation |
CMOS processing with low and high-current FETs
|
JP3191693B2
(ja)
*
|
1996-08-29 |
2001-07-23 |
日本電気株式会社 |
半導体記憶装置の製造方法
|
TW425692B
(en)
*
|
1996-12-13 |
2001-03-11 |
Hitachi Ltd |
Semiconductor integrated circuit apparatus and its fabrication method
|
US5895955A
(en)
*
|
1997-01-10 |
1999-04-20 |
Advanced Micro Devices, Inc. |
MOS transistor employing a removable, dual layer etch stop to protect implant regions from sidewall spacer overetch
|
US5837572A
(en)
*
|
1997-01-10 |
1998-11-17 |
Advanced Micro Devices, Inc. |
CMOS integrated circuit formed by using removable spacers to produce asymmetrical NMOS junctions before asymmetrical PMOS junctions for optimizing thermal diffusivity of dopants implanted therein
|
US5846857A
(en)
*
|
1997-09-05 |
1998-12-08 |
Advanced Micro Devices, Inc. |
CMOS processing employing removable sidewall spacers for independently optimized N- and P-channel transistor performance
|
US6818915B1
(en)
*
|
1998-03-23 |
2004-11-16 |
Matsushita Electric Industrial Co., Ltd. |
Field-emission electron source
|
US6130135A
(en)
*
|
1998-05-18 |
2000-10-10 |
Powerchip Semiconductor Corp. |
Method of fabricating lightly-doped drain transistor having inverse-T gate structure
|
US6162692A
(en)
*
|
1998-06-26 |
2000-12-19 |
Advanced Micro Devices, Inc. |
Integration of a diffusion barrier layer and a counter dopant region to maintain the dopant level within the junctions of a transistor
|
US6124610A
(en)
|
1998-06-26 |
2000-09-26 |
Advanced Micro Devices, Inc. |
Isotropically etching sidewall spacers to be used for both an NMOS source/drain implant and a PMOS LDD implant
|
US6184099B1
(en)
*
|
1998-08-19 |
2001-02-06 |
National Semiconductor Corporation |
Low cost deep sub-micron CMOS process
|
FR2794898B1
(fr)
|
1999-06-11 |
2001-09-14 |
France Telecom |
Dispositif semi-conducteur a tension de seuil compensee et procede de fabrication
|
JP2001210726A
(ja)
*
|
2000-01-24 |
2001-08-03 |
Hitachi Ltd |
半導体装置及びその製造方法
|
US6734109B2
(en)
*
|
2001-08-08 |
2004-05-11 |
International Business Machines Corporation |
Method of building a CMOS structure on thin SOI with source/drain electrodes formed by in situ doped selective amorphous silicon
|
US7825488B2
(en)
|
2006-05-31 |
2010-11-02 |
Advanced Analogic Technologies, Inc. |
Isolation structures for integrated circuits and modular methods of forming the same
|
US6855985B2
(en)
*
|
2002-09-29 |
2005-02-15 |
Advanced Analogic Technologies, Inc. |
Modular bipolar-CMOS-DMOS analog integrated circuit & power transistor technology
|
US7049188B2
(en)
*
|
2002-11-26 |
2006-05-23 |
Advanced Micro Devices, Inc. |
Lateral doped channel
|
KR100552824B1
(ko)
*
|
2004-12-23 |
2006-02-21 |
동부아남반도체 주식회사 |
반도체 소자 및 그 제조 방법
|
US7709896B2
(en)
*
|
2006-03-08 |
2010-05-04 |
Infineon Technologies Ag |
ESD protection device and method
|
US8093663B2
(en)
*
|
2006-05-09 |
2012-01-10 |
Taiwan Semiconductor Manufacturing Co., Ltd. |
Semiconductor device, method of fabricating the same, and patterning mask utilized by the method
|
CN102593179A
(zh)
*
|
2012-03-09 |
2012-07-18 |
上海宏力半导体制造有限公司 |
Mos晶体管及其制造方法
|
US8673712B2
(en)
*
|
2012-07-20 |
2014-03-18 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
Power transistor with high voltage counter implant
|
US10811534B2
(en)
*
|
2017-12-28 |
2020-10-20 |
Texas Instruments Incorporated |
Transistors with dual wells
|