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IT1223571B - Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte - Google Patents

Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte

Info

Publication number
IT1223571B
IT1223571B IT23134/87A IT2313487A IT1223571B IT 1223571 B IT1223571 B IT 1223571B IT 23134/87 A IT23134/87 A IT 23134/87A IT 2313487 A IT2313487 A IT 2313487A IT 1223571 B IT1223571 B IT 1223571B
Authority
IT
Italy
Prior art keywords
procedure
manufacture
cmos devices
integrated cmos
reduced door
Prior art date
Application number
IT23134/87A
Other languages
English (en)
Other versions
IT8723134A0 (it
Inventor
Carlo Bergonzoni
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT23134/87A priority Critical patent/IT1223571B/it
Publication of IT8723134A0 publication Critical patent/IT8723134A0/it
Priority to US07/284,272 priority patent/US4968639A/en
Priority to EP88120977A priority patent/EP0322665B1/en
Priority to DE8888120977T priority patent/DE3881004T2/de
Priority to JP63324718A priority patent/JP2814092B2/ja
Application granted granted Critical
Publication of IT1223571B publication Critical patent/IT1223571B/it

Links

Classifications

    • H01L29/6659
    • H01L21/823814
    • H01L29/1083
    • H01L29/78
    • H01L27/0928
IT23134/87A 1987-12-21 1987-12-21 Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte IT1223571B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT23134/87A IT1223571B (it) 1987-12-21 1987-12-21 Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte
US07/284,272 US4968639A (en) 1987-12-21 1988-12-14 Process for manufacturing CMOS integrated devices with reduced gate lengths
EP88120977A EP0322665B1 (en) 1987-12-21 1988-12-15 Process for manufacturing cmos integrated devices with reduced gate lengths
DE8888120977T DE3881004T2 (de) 1987-12-21 1988-12-15 Verfahren zum herstellen von integrierten cmos-anordnungen mit verringerten gate-laengen.
JP63324718A JP2814092B2 (ja) 1987-12-21 1988-12-21 長さが縮小されたゲートを有するcmos集積装置を製造するための方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT23134/87A IT1223571B (it) 1987-12-21 1987-12-21 Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte

Publications (2)

Publication Number Publication Date
IT8723134A0 IT8723134A0 (it) 1987-12-21
IT1223571B true IT1223571B (it) 1990-09-19

Family

ID=11204147

Family Applications (1)

Application Number Title Priority Date Filing Date
IT23134/87A IT1223571B (it) 1987-12-21 1987-12-21 Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte

Country Status (5)

Country Link
US (1) US4968639A (it)
EP (1) EP0322665B1 (it)
JP (1) JP2814092B2 (it)
DE (1) DE3881004T2 (it)
IT (1) IT1223571B (it)

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JP2790050B2 (ja) * 1994-08-17 1998-08-27 日本電気株式会社 半導体装置の製造方法
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US5506161A (en) * 1994-10-24 1996-04-09 Motorola, Inc. Method of manufacturing graded channels underneath the gate electrode extensions
US5545575A (en) * 1994-10-24 1996-08-13 Motorola, Inc. Method for manufacturing an insulated gate semiconductor device
US5612244A (en) * 1995-03-21 1997-03-18 Motorola, Inc. Insulated gate semiconductor device having a cavity under a portion of a gate structure and method of manufacture
US5661048A (en) * 1995-03-21 1997-08-26 Motorola, Inc. Method of making an insulated gate semiconductor device
US5541132A (en) * 1995-03-21 1996-07-30 Motorola, Inc. Insulated gate semiconductor device and method of manufacture
US5489540A (en) * 1995-03-22 1996-02-06 Advanced Micro Devices Inc. Method of making simplified LDD and source/drain formation in advanced CMOS integrated circuits using implantation through well mask
JP3193845B2 (ja) * 1995-05-24 2001-07-30 シャープ株式会社 半導体装置及びその製造方法
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US5534449A (en) * 1995-07-17 1996-07-09 Micron Technology, Inc. Methods of forming complementary metal oxide semiconductor (CMOS) integrated circuitry
US5654213A (en) * 1995-10-03 1997-08-05 Integrated Device Technology, Inc. Method for fabricating a CMOS device
US5736440A (en) * 1995-11-27 1998-04-07 Micron Technology, Inc. Semiconductor processing method of forming complementary NMOS and PMOS field effect transistors on a substrate
US5547894A (en) * 1995-12-21 1996-08-20 International Business Machines Corporation CMOS processing with low and high-current FETs
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US5837572A (en) * 1997-01-10 1998-11-17 Advanced Micro Devices, Inc. CMOS integrated circuit formed by using removable spacers to produce asymmetrical NMOS junctions before asymmetrical PMOS junctions for optimizing thermal diffusivity of dopants implanted therein
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JP2001210726A (ja) * 2000-01-24 2001-08-03 Hitachi Ltd 半導体装置及びその製造方法
US6734109B2 (en) * 2001-08-08 2004-05-11 International Business Machines Corporation Method of building a CMOS structure on thin SOI with source/drain electrodes formed by in situ doped selective amorphous silicon
US7825488B2 (en) 2006-05-31 2010-11-02 Advanced Analogic Technologies, Inc. Isolation structures for integrated circuits and modular methods of forming the same
US6855985B2 (en) * 2002-09-29 2005-02-15 Advanced Analogic Technologies, Inc. Modular bipolar-CMOS-DMOS analog integrated circuit & power transistor technology
US7049188B2 (en) * 2002-11-26 2006-05-23 Advanced Micro Devices, Inc. Lateral doped channel
KR100552824B1 (ko) * 2004-12-23 2006-02-21 동부아남반도체 주식회사 반도체 소자 및 그 제조 방법
US7709896B2 (en) * 2006-03-08 2010-05-04 Infineon Technologies Ag ESD protection device and method
US8093663B2 (en) * 2006-05-09 2012-01-10 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device, method of fabricating the same, and patterning mask utilized by the method
CN102593179A (zh) * 2012-03-09 2012-07-18 上海宏力半导体制造有限公司 Mos晶体管及其制造方法
US8673712B2 (en) * 2012-07-20 2014-03-18 Taiwan Semiconductor Manufacturing Company, Ltd. Power transistor with high voltage counter implant
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Also Published As

Publication number Publication date
JP2814092B2 (ja) 1998-10-22
IT8723134A0 (it) 1987-12-21
JPH022667A (ja) 1990-01-08
DE3881004T2 (de) 1993-08-19
EP0322665B1 (en) 1993-05-12
EP0322665A3 (en) 1990-02-14
US4968639A (en) 1990-11-06
DE3881004D1 (de) 1993-06-17
EP0322665A2 (en) 1989-07-05

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Effective date: 19961227