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IN2014CH00439A - - Google Patents

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Publication number
IN2014CH00439A
IN2014CH00439A IN439CH2014A IN2014CH00439A IN 2014CH00439 A IN2014CH00439 A IN 2014CH00439A IN 439CH2014 A IN439CH2014 A IN 439CH2014A IN 2014CH00439 A IN2014CH00439 A IN 2014CH00439A
Authority
IN
India
Prior art keywords
output
storage element
signal
circuit configured
generate
Prior art date
Application number
Inventor
Sehgal Rajeev
Mandavilli Srinivas
Mathews Pradish
Singh Ajit
Potts Henry
Original Assignee
Mentor Graphics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mentor Graphics Corp filed Critical Mentor Graphics Corp
Priority to IN439CH2014 priority Critical patent/IN2014CH00439A/en
Priority to US14/473,922 priority patent/US9673819B2/en
Publication of IN2014CH00439A publication Critical patent/IN2014CH00439A/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/017509—Interface arrangements
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16504—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the components employed
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/013—Modifications of generator to prevent operation by noise or interference
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/2865—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable ensuring a predetermined initial state when the supply voltage has been applied; storing the actual state when the supply voltage fails

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

This application discloses a system to detect meta-stable glitches in a signal, such as an output of latch or other storage element. The system can include a sampling circuit configured to sample an output of a storage element. The system can include a mono-shot circuit configured to monitor the output of the storage element and generate a pulse when the monitored output of the storage element differs from the sampled output. The system can include a drive circuit configured to generate a glitch signal based, at least in part, on the sampled output, and to output the glitch signal in response to the pulse from the mono-shot circuit. The system can include an error detection circuit configured to receive the sampled output from the sampling circuit and the glitch signal from the drive circuit, and to generate an error signal when the sampled output differs from the glitch signal.
IN439CH2014 2014-01-30 2014-01-30 IN2014CH00439A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IN439CH2014 IN2014CH00439A (en) 2014-01-30 2014-01-30
US14/473,922 US9673819B2 (en) 2014-01-30 2014-08-29 Metastability glitch detection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IN439CH2014 IN2014CH00439A (en) 2014-01-30 2014-01-30

Publications (1)

Publication Number Publication Date
IN2014CH00439A true IN2014CH00439A (en) 2015-08-07

Family

ID=53680049

Family Applications (1)

Application Number Title Priority Date Filing Date
IN439CH2014 IN2014CH00439A (en) 2014-01-30 2014-01-30

Country Status (2)

Country Link
US (1) US9673819B2 (en)
IN (1) IN2014CH00439A (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2527108A (en) * 2014-06-12 2015-12-16 Ibm Tracing data from an asynchronous interface
WO2016149551A1 (en) * 2015-03-17 2016-09-22 Amphenol Thermometrics Inc. Intelligent thermal validation & monitoring system with asset management and self diagnosis capabilities
US10302698B1 (en) * 2017-05-08 2019-05-28 Xilinx, Inc. Estimation of power consumed by combinatorial circuitry
KR102423645B1 (en) 2017-11-15 2022-07-22 삼성디스플레이 주식회사 Apparatus for transmitting and receiving a signal, source driver for receiving a status information signal and display device having the same
US10348302B1 (en) * 2018-05-31 2019-07-09 Bae Systems Information And Electronic Systems Integration Inc. Radiation-hardened latch circuit
TWI710770B (en) 2018-07-27 2020-11-21 創意電子股份有限公司 Glitch measurement device and glitch measurement method
CN110763974B (en) * 2018-07-27 2022-02-18 创意电子股份有限公司 Surge measuring device and method
JP7478065B2 (en) * 2020-08-19 2024-05-02 東芝テック株式会社 Information processing device and information processing method
CN118155703A (en) * 2022-12-06 2024-06-07 美光科技公司 Glitch detection

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4353032A (en) * 1980-06-02 1982-10-05 Tektronix, Inc. Glitch detector
US4968902A (en) * 1989-08-02 1990-11-06 Tektronix, Inc. Unstable data recognition circuit for dual threshold synchronous data
US5315181A (en) * 1993-07-07 1994-05-24 Maxtor Corporation Circuit for synchronous, glitch-free clock switching
US6505262B1 (en) * 1999-11-30 2003-01-07 Intel Corporation Glitch protection and detection for strobed data
US6745337B1 (en) * 2000-09-29 2004-06-01 Intel Corporation Glitch detection circuit for outputting a signal indicative of a glitch on a strobe signal and initializing an edge detection circuit in response to a control signal
US7136443B2 (en) * 2001-10-26 2006-11-14 International Business Machines Corporation Sample selection and data alignment circuit
US6670832B1 (en) * 2002-09-19 2003-12-30 National Semiconductor Corporation Glitch detect filter
US6842044B1 (en) * 2003-10-23 2005-01-11 International Business Machines Corporation Glitch-free receivers for bi-directional, simultaneous data bus
US7911239B2 (en) * 2006-06-14 2011-03-22 Qualcomm Incorporated Glitch-free clock signal multiplexer circuit and method of operation
US7971115B2 (en) * 2009-01-31 2011-06-28 Xilinx, Inc. Method and apparatus for detecting and correcting errors in a parallel to serial circuit
EP2665225B1 (en) * 2011-01-13 2018-04-11 Mitsubishi Electric Corporation Bit generation device and bit generation method
US8913441B2 (en) * 2012-05-22 2014-12-16 SanDisk Technologies, Inc. Enhanced glitch filter

Also Published As

Publication number Publication date
US20170141764A9 (en) 2017-05-18
US20150214933A1 (en) 2015-07-30
US9673819B2 (en) 2017-06-06

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