HK3394A - Memory device - Google Patents
Memory deviceInfo
- Publication number
- HK3394A HK3394A HK33/94A HK3394A HK3394A HK 3394 A HK3394 A HK 3394A HK 33/94 A HK33/94 A HK 33/94A HK 3394 A HK3394 A HK 3394A HK 3394 A HK3394 A HK 3394A
- Authority
- HK
- Hong Kong
- Prior art keywords
- memory
- rows
- address counter
- columns
- shift register
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/12—Frame memory handling
- G09G2360/126—The frame memory having additional data ports, not inclusive of standard details of the output serial port of a VRAM
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Multimedia (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Controls And Circuits For Display Device (AREA)
- Dram (AREA)
- Television Signal Processing For Recording (AREA)
- Television Systems (AREA)
- Image Input (AREA)
- Iron Core Of Rotating Electric Machines (AREA)
- Vehicle Body Suspensions (AREA)
- Valve Device For Special Equipments (AREA)
- Processing Of Color Television Signals (AREA)
- Digital Computer Display Output (AREA)
Abstract
2.1 In the reproduction of television signals, there is a requirement to process the transmitted data stream before presentation, in order for example to eliminate interferences, present additional information or convert the picture to be reproduced into a different raster. 2.2 The memory arrangement proposed comprises a memory having Z rows and S columns, an address counter for the rows and a further address counter for the columns and a first shift register having a serial input, a serial output and parallel inputs and outputs. In addition, a second shift register having parallel inputs and a serial output is provided. The memory is connected to a third address counter for the rows. 2.3 The memory device can be used in a television receiver with digital image processing.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19873733012 DE3733012A1 (en) | 1987-09-30 | 1987-09-30 | STORAGE ARRANGEMENT |
Publications (1)
Publication Number | Publication Date |
---|---|
HK3394A true HK3394A (en) | 1994-01-21 |
Family
ID=6337276
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
HK33/94A HK3394A (en) | 1987-09-30 | 1994-01-13 | Memory device |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0309877B1 (en) |
JP (1) | JPH01112327A (en) |
AT (1) | ATE88830T1 (en) |
DE (2) | DE3733012A1 (en) |
ES (1) | ES2040795T3 (en) |
HK (1) | HK3394A (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3928189A1 (en) * | 1989-08-25 | 1991-02-28 | Thomson Brandt Gmbh | METHOD FOR EXPANDING A DIGITAL SIGNAL |
US5157775A (en) * | 1989-12-15 | 1992-10-20 | Eastman Kodak Company | Dual port, dual speed image memory access arrangement |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4171538A (en) * | 1978-01-23 | 1979-10-16 | Rockwell International Corporation | Elastic store slip circuit apparatus for preventing read and write operations interference |
JPS59180871A (en) * | 1983-03-31 | 1984-10-15 | Fujitsu Ltd | Semiconductor memory device |
JPS6154094A (en) * | 1984-08-23 | 1986-03-18 | Mitsubishi Electric Corp | Memory device |
JPS61104391A (en) * | 1984-10-23 | 1986-05-22 | Fujitsu Ltd | Semiconductor storage device |
US4745577A (en) * | 1984-11-20 | 1988-05-17 | Fujitsu Limited | Semiconductor memory device with shift registers for high speed reading and writing |
US4667313A (en) * | 1985-01-22 | 1987-05-19 | Texas Instruments Incorporated | Serially accessed semiconductor memory with tapped shift register |
JPS63136395A (en) * | 1986-11-28 | 1988-06-08 | Hitachi Ltd | Semiconductor storage device |
-
1987
- 1987-09-30 DE DE19873733012 patent/DE3733012A1/en not_active Withdrawn
-
1988
- 1988-09-21 AT AT88115437T patent/ATE88830T1/en not_active IP Right Cessation
- 1988-09-21 DE DE8888115437T patent/DE3880605D1/en not_active Expired - Fee Related
- 1988-09-21 ES ES198888115437T patent/ES2040795T3/en not_active Expired - Lifetime
- 1988-09-21 EP EP88115437A patent/EP0309877B1/en not_active Expired - Lifetime
- 1988-09-27 JP JP63239899A patent/JPH01112327A/en active Pending
-
1994
- 1994-01-13 HK HK33/94A patent/HK3394A/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
ATE88830T1 (en) | 1993-05-15 |
EP0309877A3 (en) | 1991-04-10 |
JPH01112327A (en) | 1989-05-01 |
EP0309877B1 (en) | 1993-04-28 |
EP0309877A2 (en) | 1989-04-05 |
DE3733012A1 (en) | 1989-04-13 |
DE3880605D1 (en) | 1993-06-03 |
ES2040795T3 (en) | 1993-11-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PC | Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee) |