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GB9911101D0 - Data processing apparatus and method - Google Patents

Data processing apparatus and method

Info

Publication number
GB9911101D0
GB9911101D0 GBGB9911101.5A GB9911101A GB9911101D0 GB 9911101 D0 GB9911101 D0 GB 9911101D0 GB 9911101 A GB9911101 A GB 9911101A GB 9911101 D0 GB9911101 D0 GB 9911101D0
Authority
GB
United Kingdom
Prior art keywords
processing apparatus
data processing
data
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GBGB9911101.5A
Other versions
GB2350456A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JPC TECHNOLOGY Ltd
Original Assignee
JPC TECHNOLOGY Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JPC TECHNOLOGY Ltd filed Critical JPC TECHNOLOGY Ltd
Priority to GB9911101A priority Critical patent/GB2350456A/en
Publication of GB9911101D0 publication Critical patent/GB9911101D0/en
Publication of GB2350456A publication Critical patent/GB2350456A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Stored Programmes (AREA)
GB9911101A 1999-05-13 1999-05-13 Data processing Withdrawn GB2350456A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9911101A GB2350456A (en) 1999-05-13 1999-05-13 Data processing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9911101A GB2350456A (en) 1999-05-13 1999-05-13 Data processing

Publications (2)

Publication Number Publication Date
GB9911101D0 true GB9911101D0 (en) 1999-07-14
GB2350456A GB2350456A (en) 2000-11-29

Family

ID=10853372

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9911101A Withdrawn GB2350456A (en) 1999-05-13 1999-05-13 Data processing

Country Status (1)

Country Link
GB (1) GB2350456A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7356620B2 (en) * 2003-06-10 2008-04-08 Altera Corporation Apparatus and methods for communicating with programmable logic devices

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9403030D0 (en) * 1994-02-17 1994-04-06 Austin Kenneth Re-configurable application specific device
GB9508931D0 (en) * 1995-05-02 1995-06-21 Xilinx Inc Programmable switch for FPGA input/output signals
US5646544A (en) * 1995-06-05 1997-07-08 International Business Machines Corporation System and method for dynamically reconfiguring a programmable gate array
GB2304438A (en) * 1995-08-17 1997-03-19 Kenneth Austin Re-configurable application specific device
US5629637A (en) * 1995-08-18 1997-05-13 Xilinx, Inc. Method of time multiplexing a programmable logic device
US5760602A (en) * 1996-01-17 1998-06-02 Hewlett-Packard Company Time multiplexing a plurality of configuration settings of a programmable switch element in a FPGA
US6034538A (en) * 1998-01-21 2000-03-07 Lucent Technologies Inc. Virtual logic system for reconfigurable hardware

Also Published As

Publication number Publication date
GB2350456A (en) 2000-11-29

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)