GB9714130D0 - In situ memory characterisation tool - Google Patents
In situ memory characterisation toolInfo
- Publication number
- GB9714130D0 GB9714130D0 GBGB9714130.3A GB9714130A GB9714130D0 GB 9714130 D0 GB9714130 D0 GB 9714130D0 GB 9714130 A GB9714130 A GB 9714130A GB 9714130 D0 GB9714130 D0 GB 9714130D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- characterisation
- situ memory
- tool
- situ
- characterisation tool
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GBGB9714130.3A GB9714130D0 (en) | 1997-07-05 | 1997-07-05 | In situ memory characterisation tool |
AU82314/98A AU8231498A (en) | 1997-07-05 | 1998-07-06 | Memory characterisation means and method |
PCT/GB1998/001981 WO1999001871A1 (en) | 1997-07-05 | 1998-07-06 | Memory characterisation means and method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GBGB9714130.3A GB9714130D0 (en) | 1997-07-05 | 1997-07-05 | In situ memory characterisation tool |
Publications (1)
Publication Number | Publication Date |
---|---|
GB9714130D0 true GB9714130D0 (en) | 1997-09-10 |
Family
ID=10815371
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GBGB9714130.3A Pending GB9714130D0 (en) | 1997-07-05 | 1997-07-05 | In situ memory characterisation tool |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU8231498A (en) |
GB (1) | GB9714130D0 (en) |
WO (1) | WO1999001871A1 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001176294A (en) * | 1999-12-17 | 2001-06-29 | Hitachi Ltd | Test method, manufacturing method, and test device for memory chip, test method, manufacturing method, test device for memory module, and manufacturing method for computer |
DE102004021267B4 (en) * | 2004-04-30 | 2008-04-17 | Infineon Technologies Ag | Method for testing a memory module and test arrangement |
DE102004026248A1 (en) * | 2004-05-28 | 2005-12-29 | Infineon Technologies Ag | Semiconductor device test method, in particular for a system with a plurality of modules each having a data latch component, and test module for use in such a method |
DE102005056279A1 (en) * | 2005-11-25 | 2007-05-31 | Infineon Technologies Ag | Test device for e.g. read only memory components, has jumpers for supplying respective signals guided from electronic system to component housing attached at device, where signals are determined in normal operation of system |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3843893A (en) * | 1973-07-20 | 1974-10-22 | Hewlett Packard Co | Logical synchronization of test instruments |
JPS6378400A (en) * | 1986-09-19 | 1988-04-08 | Fujitsu Ltd | Ram test system |
JPS647400A (en) * | 1987-06-29 | 1989-01-11 | Hitachi Ltd | Ic tester |
-
1997
- 1997-07-05 GB GBGB9714130.3A patent/GB9714130D0/en active Pending
-
1998
- 1998-07-06 AU AU82314/98A patent/AU8231498A/en not_active Abandoned
- 1998-07-06 WO PCT/GB1998/001981 patent/WO1999001871A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO1999001871A1 (en) | 1999-01-14 |
AU8231498A (en) | 1999-01-25 |
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