GB8902431D0 - Flip chip solder bond structure for devices with gold based metallisation - Google Patents
Flip chip solder bond structure for devices with gold based metallisationInfo
- Publication number
- GB8902431D0 GB8902431D0 GB898902431A GB8902431A GB8902431D0 GB 8902431 D0 GB8902431 D0 GB 8902431D0 GB 898902431 A GB898902431 A GB 898902431A GB 8902431 A GB8902431 A GB 8902431A GB 8902431 D0 GB8902431 D0 GB 8902431D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- metallisation
- devices
- flip chip
- bond structure
- solder bond
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53242—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
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- H01L23/53252—Additional layers associated with noble-metal layers, e.g. adhesion, barrier, cladding layers
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4219—Mechanical fixtures for holding or positioning the elements relative to each other in the couplings; Alignment methods for the elements, e.g. measuring or observing methods especially used therefor
- G02B6/4228—Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements
- G02B6/4232—Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements using the surface tension of fluid solder to align the elements, e.g. solder bump techniques
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Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB898902431A GB8902431D0 (en) | 1989-02-03 | 1989-02-03 | Flip chip solder bond structure for devices with gold based metallisation |
GB8911147A GB2228825B (en) | 1989-02-03 | 1989-05-16 | A method of making a flip chip solder bonding device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB898902431A GB8902431D0 (en) | 1989-02-03 | 1989-02-03 | Flip chip solder bond structure for devices with gold based metallisation |
Publications (1)
Publication Number | Publication Date |
---|---|
GB8902431D0 true GB8902431D0 (en) | 1989-03-22 |
Family
ID=10651083
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB898902431A Pending GB8902431D0 (en) | 1989-02-03 | 1989-02-03 | Flip chip solder bond structure for devices with gold based metallisation |
GB8911147A Expired - Fee Related GB2228825B (en) | 1989-02-03 | 1989-05-16 | A method of making a flip chip solder bonding device |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8911147A Expired - Fee Related GB2228825B (en) | 1989-02-03 | 1989-05-16 | A method of making a flip chip solder bonding device |
Country Status (1)
Country | Link |
---|---|
GB (2) | GB8902431D0 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5266520A (en) * | 1991-02-11 | 1993-11-30 | International Business Machines Corporation | Electronic packaging with varying height connectors |
US5173763A (en) * | 1991-02-11 | 1992-12-22 | International Business Machines Corporation | Electronic packaging with varying height connectors |
GB2292016B (en) * | 1994-07-29 | 1998-07-22 | Plessey Semiconductors Ltd | Inductor device |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3663184A (en) * | 1970-01-23 | 1972-05-16 | Fairchild Camera Instr Co | Solder bump metallization system using a titanium-nickel barrier layer |
US4273859A (en) * | 1979-12-31 | 1981-06-16 | Honeywell Information Systems Inc. | Method of forming solder bump terminals on semiconductor elements |
GB2095904B (en) * | 1981-03-23 | 1985-11-27 | Gen Electric | Semiconductor device with built-up low resistance contact and laterally conducting second contact |
US4661375A (en) * | 1985-04-22 | 1987-04-28 | At&T Technologies, Inc. | Method for increasing the height of solder bumps |
-
1989
- 1989-02-03 GB GB898902431A patent/GB8902431D0/en active Pending
- 1989-05-16 GB GB8911147A patent/GB2228825B/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
GB8911147D0 (en) | 1989-07-05 |
GB2228825A (en) | 1990-09-05 |
GB2228825B (en) | 1993-01-06 |
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