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GB8702919D0 - Parallel processor array - Google Patents

Parallel processor array

Info

Publication number
GB8702919D0
GB8702919D0 GB878702919A GB8702919A GB8702919D0 GB 8702919 D0 GB8702919 D0 GB 8702919D0 GB 878702919 A GB878702919 A GB 878702919A GB 8702919 A GB8702919 A GB 8702919A GB 8702919 D0 GB8702919 D0 GB 8702919D0
Authority
GB
United Kingdom
Prior art keywords
parallel processor
processor array
array
parallel
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB878702919A
Other versions
GB2201015B (en
GB2201015A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of Southampton
Original Assignee
University of Southampton
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University of Southampton filed Critical University of Southampton
Priority to GB8702919A priority Critical patent/GB2201015B/en
Publication of GB8702919D0 publication Critical patent/GB8702919D0/en
Publication of GB2201015A publication Critical patent/GB2201015A/en
Application granted granted Critical
Publication of GB2201015B publication Critical patent/GB2201015B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094Condition code generation, e.g. Carry, Zero flag
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8015One dimensional arrays, e.g. rings, linear arrays, buses
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30072Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Executing Machine-Instructions (AREA)
GB8702919A 1987-02-10 1987-02-10 Parallel processor array and array element Expired - Lifetime GB2201015B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8702919A GB2201015B (en) 1987-02-10 1987-02-10 Parallel processor array and array element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8702919A GB2201015B (en) 1987-02-10 1987-02-10 Parallel processor array and array element

Publications (3)

Publication Number Publication Date
GB8702919D0 true GB8702919D0 (en) 1987-03-18
GB2201015A GB2201015A (en) 1988-08-17
GB2201015B GB2201015B (en) 1990-10-10

Family

ID=10611982

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8702919A Expired - Lifetime GB2201015B (en) 1987-02-10 1987-02-10 Parallel processor array and array element

Country Status (1)

Country Link
GB (1) GB2201015B (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07500437A (en) * 1991-10-24 1995-01-12 インテル コーポレイシヨン data processing system
US5361370A (en) * 1991-10-24 1994-11-01 Intel Corporation Single-instruction multiple-data processor having dual-ported local memory architecture for simultaneous data transmission on local memory ports and global port
GB2273377A (en) * 1992-12-11 1994-06-15 Hughes Aircraft Co Multiple masks for array processors
US5717947A (en) * 1993-03-31 1998-02-10 Motorola, Inc. Data processing system and method thereof
US6732253B1 (en) 2000-11-13 2004-05-04 Chipwrights Design, Inc. Loop handling for single instruction multiple datapath processor architectures
US6931518B1 (en) 2000-11-28 2005-08-16 Chipwrights Design, Inc. Branching around conditional processing if states of all single instruction multiple datapaths are disabled and the computer program is non-deterministic
GB2382676B (en) 2001-10-31 2005-09-07 Alphamosaic Ltd Data access in a processor
GB2382886B (en) * 2001-10-31 2006-03-15 Alphamosaic Ltd Vector processing system
US6970985B2 (en) 2002-07-09 2005-11-29 Bluerisc Inc. Statically speculative memory accessing
US20050114850A1 (en) 2003-10-29 2005-05-26 Saurabh Chheda Energy-focused re-compilation of executables and hardware mechanisms based on compiler-architecture interaction and compiler-inserted control
US7996671B2 (en) 2003-11-17 2011-08-09 Bluerisc Inc. Security of program executables and microprocessors based on compiler-architecture interaction
US8607209B2 (en) 2004-02-04 2013-12-10 Bluerisc Inc. Energy-focused compiler-assisted branch prediction
US20080126766A1 (en) 2006-11-03 2008-05-29 Saurabh Chheda Securing microprocessors against information leakage and physical tampering

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3287702A (en) * 1962-12-04 1966-11-22 Westinghouse Electric Corp Computer control
GB2177526B (en) * 1985-06-24 1990-02-14 Pixar Selective operation of processing elements in a single instruction, multiple data stream (simd)computer system

Also Published As

Publication number Publication date
GB2201015B (en) 1990-10-10
GB2201015A (en) 1988-08-17

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee