GB8524042D0 - Semiconductor memory - Google Patents
Semiconductor memoryInfo
- Publication number
- GB8524042D0 GB8524042D0 GB858524042A GB8524042A GB8524042D0 GB 8524042 D0 GB8524042 D0 GB 8524042D0 GB 858524042 A GB858524042 A GB 858524042A GB 8524042 A GB8524042 A GB 8524042A GB 8524042 D0 GB8524042 D0 GB 8524042D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- data line
- data lines
- storage means
- redundant
- semiconductor memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/781—Masking faults in memories by using spares or by reconfiguring using programmable devices combined in a redundant decoder
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Hardware Redundancy (AREA)
- Static Random-Access Memory (AREA)
Abstract
In a multi-bit semiconductor memory having a redundant memory YR-ARY, any faulty data line CD is replaced with a redundant data line. To decrease the number of redundant data lines required when a plurality of data lines are selected at once, the semiconductor memory is furnished therein with first storage means (MMo Fig. 3) for forming signals necessary for an address comparing operation in an address comparing circuit (ACo-ACn) and also second storage means (DM1...DM3...) for forming signals indicative of data line positions to be remedied. When a faulty address has been detected as the result of the address comparing operation, the second storage means is referred to, and the data line indicated by the second storage means is replaced with the redundant data line. This arrangement can decrease the number of the redundant data lines when compared with an arrangement wherein all the data lines to be simultaneously selected are replaced with redundant data lines. <IMAGE>
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59218480A JPS6199999A (en) | 1984-10-19 | 1984-10-19 | Semiconductor storage device |
Publications (2)
Publication Number | Publication Date |
---|---|
GB8524042D0 true GB8524042D0 (en) | 1985-11-06 |
GB2165971A GB2165971A (en) | 1986-04-23 |
Family
ID=16720587
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08524042A Withdrawn GB2165971A (en) | 1984-10-19 | 1985-09-30 | A semiconductor memory |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPS6199999A (en) |
KR (1) | KR860003603A (en) |
DE (1) | DE3537015A1 (en) |
GB (1) | GB2165971A (en) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6238599A (en) * | 1985-08-13 | 1987-02-19 | Mitsubishi Electric Corp | Semiconductor memory device |
US5146574A (en) * | 1989-06-27 | 1992-09-08 | Sf2 Corporation | Method and circuit for programmable selecting a variable sequence of element using write-back |
US5134616A (en) * | 1990-02-13 | 1992-07-28 | International Business Machines Corporation | Dynamic ram with on-chip ecc and optimized bit and word redundancy |
US5233618A (en) * | 1990-03-02 | 1993-08-03 | Micro Technology, Inc. | Data correcting applicable to redundant arrays of independent disks |
US5140592A (en) * | 1990-03-02 | 1992-08-18 | Sf2 Corporation | Disk array system |
US5212785A (en) * | 1990-04-06 | 1993-05-18 | Micro Technology, Inc. | Apparatus and method for controlling data flow between a computer and memory devices |
US5388243A (en) * | 1990-03-09 | 1995-02-07 | Mti Technology Corporation | Multi-sort mass storage device announcing its active paths without deactivating its ports in a network architecture |
US5325497A (en) * | 1990-03-29 | 1994-06-28 | Micro Technology, Inc. | Method and apparatus for assigning signatures to identify members of a set of mass of storage devices |
US5233692A (en) * | 1990-04-06 | 1993-08-03 | Micro Technology, Inc. | Enhanced interface permitting multiple-byte parallel transfers of control information and data on a small computer system interface (SCSI) communication bus and a mass storage system incorporating the enhanced interface |
US5214778A (en) * | 1990-04-06 | 1993-05-25 | Micro Technology, Inc. | Resource management in a multiple resource system |
US5265054A (en) * | 1990-12-14 | 1993-11-23 | Sgs-Thomson Microelectronics, Inc. | Semiconductor memory with precharged redundancy multiplexing |
EP0490680B1 (en) * | 1990-12-14 | 1996-10-02 | STMicroelectronics, Inc. | A semiconductor memory with multiplexed redundancy |
EP0514664A3 (en) * | 1991-05-20 | 1993-05-26 | International Business Machines Corporation | Dynamic random access memory with a redundancy decoder |
KR940008213B1 (en) * | 1991-12-31 | 1994-09-08 | 현대전자산업 주식회사 | Input/outout select circuit of column repair |
US5295102A (en) * | 1992-01-31 | 1994-03-15 | Sgs-Thomson Microelectronics, Inc. | Semiconductor memory with improved redundant sense amplifier control |
US5268866A (en) * | 1992-03-02 | 1993-12-07 | Motorola, Inc. | Memory with column redundancy and localized column redundancy control signals |
KR100324013B1 (en) * | 1994-04-27 | 2002-05-13 | 박종섭 | Data transfer method of semiconductor device and device thereof |
US5608678A (en) * | 1995-07-31 | 1997-03-04 | Sgs-Thomson Microelectronics, Inc. | Column redundancy of a multiple block memory architecture |
US5841709A (en) * | 1995-12-29 | 1998-11-24 | Stmicroelectronics, Inc. | Memory having and method for testing redundant memory cells |
US5771195A (en) * | 1995-12-29 | 1998-06-23 | Sgs-Thomson Microelectronics, Inc. | Circuit and method for replacing a defective memory cell with a redundant memory cell |
US5790462A (en) * | 1995-12-29 | 1998-08-04 | Sgs-Thomson Microelectronics, Inc. | Redundancy control |
US5612918A (en) * | 1995-12-29 | 1997-03-18 | Sgs-Thomson Microelectronics, Inc. | Redundancy architecture |
US6037799A (en) * | 1995-12-29 | 2000-03-14 | Stmicroelectronics, Inc. | Circuit and method for selecting a signal |
US6259309B1 (en) * | 1999-05-05 | 2001-07-10 | International Business Machines Corporation | Method and apparatus for the replacement of non-operational metal lines in DRAMS |
JP4900310B2 (en) * | 2008-04-17 | 2012-03-21 | 富士通セミコンダクター株式会社 | Semiconductor memory device |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2629893A1 (en) * | 1975-07-03 | 1977-01-20 | Texas Instruments Inc | CELL ADDRESSABLE MATRIX |
DE3043651A1 (en) * | 1979-11-19 | 1981-08-27 | Texas Instruments Inc., 75222 Dallas, Tex. | MOS read-write memory with spare cells for malfunction handling - has spare cells accessed by inbuilt ROM stages and has read differential amplifier in each column |
US4358833A (en) * | 1980-09-30 | 1982-11-09 | Intel Corporation | Memory redundancy apparatus for single chip memories |
JPS58130495A (en) * | 1982-01-29 | 1983-08-03 | Toshiba Corp | Semiconductor storage device |
US4462091A (en) * | 1982-02-26 | 1984-07-24 | International Business Machines Corporation | Word group redundancy scheme |
US4485459A (en) * | 1982-09-20 | 1984-11-27 | Fairchild Camera & Instrument Corp. | Redundant columns for byte wide memories |
JPH0670880B2 (en) * | 1983-01-21 | 1994-09-07 | 株式会社日立マイコンシステム | Semiconductor memory device |
JPS59151398A (en) * | 1983-02-17 | 1984-08-29 | Mitsubishi Electric Corp | Semiconductor storage device |
DE3311427A1 (en) * | 1983-03-29 | 1984-10-04 | Siemens AG, 1000 Berlin und 8000 München | INTEGRATED DYNAMIC WRITE-READ MEMORY |
-
1984
- 1984-10-19 JP JP59218480A patent/JPS6199999A/en active Pending
-
1985
- 1985-09-05 KR KR1019850006475A patent/KR860003603A/en not_active Application Discontinuation
- 1985-09-30 GB GB08524042A patent/GB2165971A/en not_active Withdrawn
- 1985-10-17 DE DE19853537015 patent/DE3537015A1/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
DE3537015A1 (en) | 1986-05-15 |
JPS6199999A (en) | 1986-05-19 |
GB2165971A (en) | 1986-04-23 |
KR860003603A (en) | 1986-05-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |