GB596092A - Improvements relating to electric pulse signalling systems - Google Patents

Abstract

596,092. Multiplex pulse signalling. SIEMENS BROS. & CO., Ltd., REED, M., and MOSS, S. H. July 18, 1945, No. 18418. [Class 40 (v)] [Also in Group XXXV] In a two-way multiplex pulse modulation system in which intercalated transmitting and receiving gating periods are provided at each station, synchronizing signals are transmitted from the controlling station which automatically adjust the gating periods at the controlled station so that incoming pulses thereat fall correctly within the appropriate gating periods and provision is made for adjusting, manually or automatically, the relative timing of pulses incoming to the controlling station and the gating periods thereat, so that these pulses fall correctly in the appropriate gating periods. As described, the said adjustment is automatic and comprises a control of the recurrence frequency of the gating period master pulse generator. The system will operate correctly when the pulses c, Fig. 3, of one received channel train are arranged to occur at the midpoint of a receiving gating period pulse b at the controlling station, the outgoing pulses a of a synchronizing pulse train occurring at the leading edges of the gating pulses. A circuit for producing this result is shown in Fig. 2. The master gate pulse generator, the frequency of which is automatically controlled, comprises a transitron oscillator VC, producing rectangular pulses at its screen grid, which are amplified and clipped by valve VD. The outgoing narrow synchronizing pulses, at terminal TA, are derived from the anode of VD by the differentiating circuit QC, RE, the negative trailing edge pulses being clipped by diode VE. The phases of the rectangular gatepulses and an incoming pulse train at terminal TC are compared by applying them respectively to the control grids of valves VB, VA, the anodes and suppressor grids of which are interconnected to form a flip-flop multivibrator circuit. Between gate pulses, VB is passing no anode current or screen current. On the occurrence of a gate pulse, screen current flows, curve d, Fig. 3, and is suddenly reduced in value when a narrow pulse arrives at terminal TC, cutting off VA and driving the suppressor grid of VB positive. When the gate pulse ceases, the circuit reverts to the original state, VA being conducting and VB being cut off. The relative timing of the pulses determines the mean screen voltage of VB, curve e, Fig. 3, and this controls the frequency of the master gate pulse generator VC, being applied through smoothing circuit RB, QS to its control grid. The circuit is so adjusted that the frequency correction is always in such a sense that the pulse at terminal TC is caused to occur at the mid-point of the gating pulse.