GB2389460A - Mounting semiconductor packages on substrates - Google Patents
Mounting semiconductor packages on substrates Download PDFInfo
- Publication number
- GB2389460A GB2389460A GB0318434A GB0318434A GB2389460A GB 2389460 A GB2389460 A GB 2389460A GB 0318434 A GB0318434 A GB 0318434A GB 0318434 A GB0318434 A GB 0318434A GB 2389460 A GB2389460 A GB 2389460A
- Authority
- GB
- United Kingdom
- Prior art keywords
- resin
- solder
- printed wiring
- wiring board
- fillet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 39
- 239000000758 substrate Substances 0.000 title description 2
- 229910000679 solder Inorganic materials 0.000 claims abstract description 155
- 229920005989 resin Polymers 0.000 claims abstract description 95
- 239000011347 resin Substances 0.000 claims abstract description 95
- 239000006071 cream Substances 0.000 claims abstract description 16
- 238000000034 method Methods 0.000 claims description 26
- RSWGJHLUYNHPMX-UHFFFAOYSA-N Abietic-Saeure Natural products C12CCC(C(C)C)=CC2=CCC2C1(C)CCCC2(C)C(O)=O RSWGJHLUYNHPMX-UHFFFAOYSA-N 0.000 claims description 11
- 239000003822 epoxy resin Substances 0.000 claims description 11
- 229920000647 polyepoxide Polymers 0.000 claims description 11
- 239000000376 reactant Substances 0.000 claims description 11
- KHPCPRHQVVSZAH-HUOMCSJISA-N Rosin Natural products O(C/C=C/c1ccccc1)[C@H]1[C@H](O)[C@@H](O)[C@@H](O)[C@@H](CO)O1 KHPCPRHQVVSZAH-HUOMCSJISA-N 0.000 claims description 10
- KHPCPRHQVVSZAH-UHFFFAOYSA-N trans-cinnamyl beta-D-glucopyranoside Natural products OC1C(O)C(O)C(CO)OC1OCC=CC1=CC=CC=C1 KHPCPRHQVVSZAH-UHFFFAOYSA-N 0.000 claims description 10
- 238000002844 melting Methods 0.000 claims description 6
- 230000008018 melting Effects 0.000 claims description 6
- 238000010438 heat treatment Methods 0.000 claims description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 2
- 238000001816 cooling Methods 0.000 claims description 2
- 230000000694 effects Effects 0.000 description 12
- 239000000919 ceramic Substances 0.000 description 10
- 239000004593 Epoxy Substances 0.000 description 5
- 239000011521 glass Substances 0.000 description 5
- 229910052718 tin Inorganic materials 0.000 description 3
- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 description 2
- 230000005496 eutectics Effects 0.000 description 2
- 239000002241 glass-ceramic Substances 0.000 description 2
- 229910052745 lead Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910001092 metal group alloy Inorganic materials 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- BTXXTMOWISPQSJ-UHFFFAOYSA-N 4,4,4-trifluorobutan-2-one Chemical compound CC(=O)CC(F)(F)F BTXXTMOWISPQSJ-UHFFFAOYSA-N 0.000 description 1
- BQACOLQNOUYJCE-FYZZASKESA-N Abietic acid Natural products CC(C)C1=CC2=CC[C@]3(C)[C@](C)(CCC[C@@]3(C)C(=O)O)[C@H]2CC1 BQACOLQNOUYJCE-FYZZASKESA-N 0.000 description 1
- OFOBLEOULBTSOW-UHFFFAOYSA-N Malonic acid Chemical compound OC(=O)CC(O)=O OFOBLEOULBTSOW-UHFFFAOYSA-N 0.000 description 1
- KGMSWPSAVZAMKR-UHFFFAOYSA-N Me ester-3, 22-Dihydroxy-29-hopanoic acid Natural products C1CCC(C(O)=O)(C)C2C1(C)C1CCC(=C(C)C)C=C1CC2 KGMSWPSAVZAMKR-UHFFFAOYSA-N 0.000 description 1
- KGMSWPSAVZAMKR-ONCXSQPRSA-N Neoabietic acid Chemical compound [C@H]1([C@](CCC2)(C)C(O)=O)[C@@]2(C)[C@H]2CCC(=C(C)C)C=C2CC1 KGMSWPSAVZAMKR-ONCXSQPRSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- JHIVVAPYMSGYDF-UHFFFAOYSA-N cyclohexanone Chemical compound O=C1CCCCC1 JHIVVAPYMSGYDF-UHFFFAOYSA-N 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 235000013372 meat Nutrition 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/13111—Tin [Sn] as principal constituent
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- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
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- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
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- H01L2924/00013—Fully indexed content
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- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0495—5th Group
- H01L2924/04953—TaN
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- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/0989—Coating free areas, e.g. areas other than pads or lands free of solder resist
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10977—Encapsulated connections
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
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- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The semiconductor package 1 is connected to a printed wiring board 2 by solder balls 3, and resin fillets 4 formed adjacent each solder ball 3 prevent stress in the assembly. The package 1 is provided with pads 5 and solder resist 6 whilst the printed wiring board has electrodes 7 and solder resist 8 forming openings around the electrodes. Cream solder is applied to the electrodes 7 before the package is positioned on the printed wiring board 2. When the solder is melted, resin in the solder flows to form the resin fillets. The solder balls 3 may be melted in order to remove the package for repair.
Description
1 2389460
SOLDER CONNECT ASSEMBLY AND METHOD OF CONNECTING A
SEMICONDUCTOR PACKAGE AND A PRINTED WIRING BOARD
BACKGROUND OF THE IVENTIoN
1. Field of the Invention
5 The present invention relates to a solder connect assembly and a method of connecting a semiconductor package and a printed wiring board, and in particular to a solder connect assembly and a method of connecting a semiconductor package and a printed wiring board for 10 electrically and mechanically connecting a semiconductor package and a printed wiring board through a plurality of solder balls.
2. Description of the Related Art
This kind of a conventional solder connect assembly IS is disclosed in Japaneee Patent Application Laid-Open No. Xei 10-116856. As shown in FIG. 1, in the conventional solder connect assembly, an LSI chip 11 is connected and mounted toJon a ceramic board 12 via solder balls 30 which are external terminals of the LSI chip 11. Also, 20 the ceramic board 12 in similarly connected and mounted Anon a printed wiring board 20 via the solder balls 40 which is an external terminal of the ceramic board 12.
After the ceramic board 12 and the printed wiring board 20 are connected via the colder balls 40, clearance 25 between the ceramic board 12 and the printed wiring board
20 is filled with underfilins resin 90.
However, in the conventional solder connect assembly, as the clearance between the ceramic board 12 and the printed wiring board 20 is filled with 5 underfiling resin 90, there is a problem that the ceramic board 12 cannot be replaced or repaired in case a problem oc cure in the ceramic board 12 or the rSI chip ll after the underfiling resin 90 is cured.
Also, while the underfiling resin 90 is filled 10 utilizing capillary phenomenon, in the conventional solder connect assembly, there is a problem that a void often occurs in the vicinity of an interface between the solder balls 40 and the printed wiring board 20. When stress is applied to the underfiling resin 90 after its 15 curing, the stress is not reduced enough and the solder balls 40 may be broken.
Further, there is a problem that the solder Malls 40 may be broken due to the storage and carriage of the solder balls 40 and stress by heating when the 20 underfiling resin 90 is cured in a process till the filling and curing of the underfiling resin 90.
In addition, in Japanese Patent Application Laid Open No. Hei 8-116169, another conventional solder connect assembly is disclosed.
5 The conventional solder connect assembly provides a
3 - fatigue resistant solder connection for a solder connection structure. The solder connection structure, which couples the laying surfaces of two substrates, is comprised of a compliant metal alloy solder preform 5 connectablY disposed between two less compliant metal alloy solder fillets.
Further, a underfiling resin and a resin fillet in a conventional electric device assembly are disclosed in Japanese Application Laid-open No. Hei 9-167890 and Hei 10 10-313016, respectively However, it is not taught in these references that the an assembly electrically and mechanically connects a plurality of solder balls and a printed wiring board.
SUMMARY OF THE INVENTION
15 It is therefore an object of the present invention to provide a solder connect assembly and a method of connection capable of enhancing reliability in connection of a solder ball connection.
Another object of the present invention is to 20 provide a solder connect assembly and a method of connection capable of replacing a package or a board for repairing it after connection thereof.
In order to achieve the above obj ects, a solder connect assembly according to the present invention !5 comprises a printed wiring board, a semiconductor
package, a plurality of solder balls disposed between the printed wiring board and the semiconductcr package, for connecting the printed wiring board and said semiconductor package, and a resin fillet formed in the 5 vicinity of the printed wiring board and each said solder ball. Another solder connect assembly according to the present invention comprises a printed wiring board, a electrode formed on the printed wiring board, a 10 semiconductor package, a pad formed on the semiconductor package, a solder ball disposed between the electrode and the pad, and a resin fillet formed on a side of the solder ball. In order to achieve the above objects, a method of 15 connecting a semiconductor package and a printed wiring board according to the present invention comprises che steps of supplying cream solder on an electrode formed on the printed wiring board, wherein the cream solder includes resin, mounting the semiconductor package on the printed So wiring board, heating and melting the cream solder, and cooling and curing the cream solder, thereby a solder ball its formed between the semiconductor package and the printed wiring board.
BRIEF DESCRIPTION OF THE DRAWINGS
IS These and other objects, features and advantages of this invention will become more fully apparent front the
5 - following detailed description taken with the
accompanying drawings in which: FIG 1 is a sectional view showing a conventional solder connect assembly.
5 FIG. 2 is a sectional view showing a first embodiment of a solder connect assembly according to the present invention; FIG. 3 is an enlarged sectional view for explaining the solder connect assembly shown in FIG. 2; 10 FIG. 4 is an enlarged sectional view showing a second embodiment of a solder connect assembly according co the present invention; FIG. 5 is an enlarged sectional view showing a third embodiment of a solder connect assembly according IS to the present invention; FIG. 6 is an enlarged sectional view showing a fourth embodiment of a solder connect assembly according to the present invention; and FIG. is a sectional view showing a fifth 20 embodiment of a solder connect assembly according to the present invention.
DETAILED DESCRIpTION OF THE PREFERRED EMBODIMENTS
Referring to the drawings, preferred embodiments according to the presetinrenticn will he. described in 25 detail below.
- 6 Fi rs t Ernbod i meat As shown in FIG. 2, a semiconductor package; and a prluted wiring board 2 are electrically and mechanically connected via plural solder belle 3. The vicinity of a S connection between the solder belle 3 and the printed wiring board Z is covered with the resin fillet 4.
A plurality of pads 5 are formed on one nice of the semiconductor package 1 as external terminals with respect to the printed wiring board 2. The shape of each 10 pad S is determined by a solder resist 6. plurality of electrodes are formed on the component mounting side of the printed wiring board 2. The pad 5 and the electrode 7 respectively oppose te are connected vi a the solder ball 3. A solder resists 8 are fanned or: the printed w::ring lS board 2 so that the operating is fonned by the E,older resist a and electrode 7. The resin fillets 4 are formed so that they cover parts formed by both of the solder balls 3 and the opening by the solder resists O. Each the resin fillet 4 is slightly expanded on the side of TV the solder ball 3 as shown in FIG. 3.
The first embodiment of the solder connect assembly shown in FIGS. 2 and 3 will be described in detail below.
The plural pace as external terminals are formed on one side of the semiconductor package 1. They normally have !5 structure called a ball grid array (BOA) or a chip-eized
package (CSP). The internal configuration of the semiconductor package is not parts cularly limited and for the internal connecting method, a package according to various methods such as wire bor,ding connecting S method, a flip-chip mounting method and a TAN connecting method can be also applied.
The end of each the pad 5 on the semlconcluctor package 1 is covered with the solder resist 6. The shape of each the pad 5 is determined by the shape of the 10 opening of the solder resins 6.
In the meantime, as the printed wiring board 2 is made of glass epoxy, a plurality of electrodes 7 are fonned on the component mounting side of the printed wiring board 2. The surface of the printed wiring board 15 2 is covered with the solder resist 8 and the periphery of the electrode 7 is open so that the electrode 7 is not covered with the solder resist 8. The pads 5 and the electrodes 7 are connected via the solder balls 3. The sectional shape of the solder ball 3 is a barrel shape.
20 The resin fillets 4 are formed so that they cover parts formed by both of the solder balls 3 and the opening of the solder resist 8 on the side of the printed wiring board 2 and is slightly expanded on the side of the solder balls 3. The resin fillets 4 are mainly made !5 of resin or a reactant of rosin. For an example of the
resin fillets 4, a resin fillet mainly made of a reactant OF abietic acid such as neoabietic acid and pyroablet-c acid can be given.
In the method of connecting a solder connect 5 assembly of the first embodiment, cream solder is supplied on the electrode 7 of the printed wiring board 2 by a printing method. The cream solder is supplied in the same shape as the electrode 7 on the printed wiring board 2. The used cream solder includes rosin which is 10 the major component of the resin fillets a. Next, the semiconductor package 1 is positioned by the component mounting machine provided with the image recogultlon device and is mounted on the prluted wiring board 2.
Further, rosin coheres in the vicinity of a connection 15 between the solder balls 3 and the printed wiring board 2 by coollug and solidifying cream solder after melting it by reflow. As a result, the solder connect assembly shown in FIGS. 2 and 3 wherein the resin filets are formed in the vicinity of a connection between the solder 20 ball and the printed wiring board 2, is acquired.
An described above, according to the first embodiment, the following effect is produced.
The first effect of the present invention is chat the reliability in connection of the solder ball S connection can be enhanced. In addition, even if a
problem occurs in the semiconductor package 1, the semiconductor package 1 can be replaced for repairing.
The reason is that reliability in connection can be enhanced because stress applied to a part at the base of 5 the solder baffle 3 due to mechanical shock and/or thermal change is dispersed by the resin fillets 4 formed at the foot of the solder balls with respect to the printed wiring board Z and as a result, stress does not concentrate at the part at the base of the solder ball 3.
10 Further, the reason is that the package can be replaced because the semiconductor package 1 can be detached by melting the solder balls 3.
The second effect is that the diameter of the electrode 7 on the side of the printed wirlug board 2 can 15 be reduced in contrast to the conventional solder connect assembly. Hereby, the width of a wire and the width of clearance between wires can be increased in case the electrodes are wired and in other cases when the surface wiring of the printed wiring board 2 is formed 20 and the manufacture of the printed wiring board 2 is facilitated. As a result, the printed wiring board 2 the yield and the duality of which are high and the cost of which is low can be used.
In case the package is normally connected to the 25 printed wiring board via the solder balls, strews is not
applied to either of the package or the printed wiring board by equalizing the diameter of the pad c of the package l and that of the electrode 1 of the printed wiring board 2. In contrast, the present invention can 5 make the diameter of the electrode 7 smaller than that of the pad 5, because stress applied at the base of the solder ball 3 with respect to the electrode is reduced.
The third effect is that stress is reduced by the resin fillets 4 on the side of the printed wiring board 2 10 of the solder ball connection and reliability in connection higher than that in a conventional type can be acquired even if the diameter of the electrode 7 is smaller than that of the electrode in the conventional solder connect assembly.
15 The fourth effect is that the connection by the solder balls can be prevented from being broken in a process for storage and carriage until the clearance between the package l and the printed wiring board 2 is finally filled With the underfiling resin 9 and the resin 20 is cured, in an stippling resin process and in a underfiling resin curing process. The reason is the same as the reason in the first effect.
2. Second Embodiment In this embodiment, a resin fillets 4 are expanded 25 to the end of the upper surface of a solder resist 8 with
- 11 respect to the printed wiring board 2 as shown In FIG. 4.
The shape of the solder balls may be also except a barrel shape and is a cylindrical shape which is slightly thinner at the upper end of the solder balls 3 with 5 respect to the printed wiring board 2 as shown in FIG. 4.
In the first embodiment, a printed wiring board 2 Its made of glass epoxy, however, the material is not limited to glass epoxy, and a ceramic board, a glass ceramic board, a flexible board, a thin film board and 10 others can be also applied. For the solder balls 3, eutectic solder composed of Sn and Pb is normally used, however, the solder balls 3 is not limited to the above solder and solder including tin (Sn) or lead (Pb) and Pb free solder can be also applied. In the second 15 embodiment, the same effect as the effect in the first embodiment is also acquired.
3. Third Embodiment In this embodiment, a solder resist 8 covers the end of an electrode 7 as shown in FIG. 5 and the shape of 20 the electrode 7 is determined based upon the shape of the opening of the solder resist 8. A resin fillet 4 is formed on the solder resist 8. in this case, the same effect as the effect in the first embodiment is also acquired. 25 It is clear that the shape chat the side of the
- 12 semiconductor package i is slightly thinner of the solder ball 3 shown in the second embodiment can be applied to the first and third embodiments.
In the third embodiment, a printed wiring board 2 5 is made of glass epoxy, however, the material is not limited to glass epoxy, and a ceramic board, a glass ceramic board, a flexible board, a thin film hoard and others can be also applied. For the solder ball 3, eutectic solder composed of Sn and PL Is normally used, lo however, the solder ball is not limited to the above solder and solder including Sn or Pb and Pb-free solder can be also applied.
Further, the resin fillet 4 is also not limited to rosin and epoxy resin or a reactant of epoxy resin may be 15 also a major component For an example of the resin fillet 4 composed of epoxy resin, a resin fillet mainly made of a reactant of mixture of bisphenol A and dicarboxylic acid can be givers is embodiment produces effect that if epoxy resin or a reactant of epoxy resin 20 is a major component, the elastic modulus of the resin fillet 4 itself s lower than that in the first embodiment, the resin fillet has flexibility, even it stress is applied to the resin fillet, a crack is hardly made in the resin fillet and as a result, resistance to 25 s tress is further enhanced.
- 13 . Fourth Ernbodimerlt In the f ourth eTrI>odiment, clearance between a semiconductor package l and a printed wiring board 2 is filled with underfiling resin 9 as shown in FIG. 6. The 5 fourth embodiment produces effect that as stress applied to a solder ball 3 can be further more reduced/ compared with the case in the first embodiment, resistance to stress is further enhanced. It is clear that in the fourth embodiment, the shape of the solder ball and the 10 resin fillet 4 respectively shown in Figs. 2 to 4 in the first embodiment can be also applied.
s. F i f th Err;bodi men t In this em}odimenc, the whole clearance between a semiconductor package 1 and a printed wiring board 2 is 15 not filled with underfiling resin 9 but only the end of the semiconductor package 1 is fixed by underfiling resin 9 as shown in FIG. 7. The fifth embodiment produces ef Sect that stress applied to a solder ball 3 can be further reduced, compared with the case in the f rst 20 errbodirnent, resistance to stress is further enhanced and method of manufacturing solder connect assembly is also simpler than that in the fourth embodiment.
It is clear that in the f i f th embodiment, the shape of the solder ball 3 and the resin fillet 4 respectively 25 shown in Figs. 2 to in the first embodiment can be also
applied. It is clear treat the present invention is not limited to the above embodiments and the above embodiments can be suitably changed within a range of the 5 technical idea of the present invention. The number, the position, the shape and others of the above members are not limited to those in the above embodiments, and the number, the position, the shape and others suitable for embodying the present invention can be selected. In each 10 drawing, the same reference number is allocated to Lyle same component.
The invention may be embodied in other specific forms without depar ting from the spirit or essential characteristics thereof. The present invention 15 embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description and all changes
which come within the meaning and range of equivalency of 20 the claims are therefore intended to be embraced therein.
Claims (30)
1. A solder connect assembly comprising: a printed wiring board; an electrode formed on said printed wiring board; a semiconductor package; a pad formed on said semiconductor package; a resist formed on said printed wiring board and having an opening of said resist around said electrode; a solder ball disposed between said electrode and said pad; and, a resin fillet formed in said opening and in a vicinity of a connecting part between said solder ball and said electrode.
2. The solder connect assembly as claimed in claim 1, wherein said resin fillet is formed between said solder ball and said resist.
3. The solder connect assembly as claimed in claim 2, wherein said resin fillet is directly formed on said printed wiring board.
4. The solder connect assembly as claimed in claim 1, wherein an end of said electrode is covered with
- 16 said resist, a shape of said electrode being thereby determined.
5. The solder connect assembly as claimed in claim 4, wherein said resin fillet is formed on said resist, without directly connecting said printed wiring board.
6. The solder connect assembly as claimed in claim 1, further comprising an underfiling resin, wherein space between said semiconductor package and said printed wiring board is filled with the underflllug resin so as to cover said fillet resin.
7. The solder connect assembly as claimed in claim 1, further comprising an underfiling resin for covering a side of said semiconductor package to connect said semiconductor package and said printed wiring board.
8. The solder connect assembly as claimed in any one of claims 1 to 7, wherein said resin fillet is made of resin a main component of which is rosin.
9. The solder connect assembly as claimed in any one of claims 1 to 7, wherein said resin fillet is made of resin a main component of which is a reactant of rosin.
10. The solder connect assembly as claimed in any one of claims 1 to 7, wherein said resin fillet is made of resin a main component of which is epoxy resin.
The solder connect assembly as claimed in any one of claims l to 7, wherein said resin fillet is made of resin a main component of which is a reactant of epoxy resin.
12. The solder connect assembly as claimed in any one of claims 1 to 7, wherein a main component of said resin fillet ls resin included in cream solder.
13. The solder connect assembly as claimed in any one of claims 1 to 7, wherein said resin fillet is slightly expanded on a side of said solder ball.
14. The solder connect assembly as claimed in any one of claims 1 to 7, wherein said solder ball is barrel-
shaped.
15. A solder connect assembly substantially as herein described with reference to and as shown in Figures 2 to 7 of the accompanying drawings.
16. A solder connect assembly comprising:
a printed wiring board; a semiconductor package; a solder ball disposed between said printed wiring board and said semiconductor package, for connecting said printed wiring board and said semiconductor package; and, a resin fillet formed in the vicinity of said -
printed wiring board and each said solder ball for dispersing stress applied to the vicinity of said printed wiring board and each said solder ball; wherein a part of a surface of said solder ball is exposed without being covered by said resin fillet.
17. The solder connect assembly as claimed in claim 16, wherein said resin fillet is made of resin a main component of which is rosin.
18. The solder connect assembly as claimed in claim 16, wherein said resin fillet is made of resin a main component of which is a reactant of rosin.
19. The solder connect assembly as claimed in claim 16, wherein said resin fillet is made of resin a main component of which is epoxy resin.
20. The solder connect assembly as claimed in claim 16, wherein said resin fillet is made of resin, a
main component of which is a reactant of epoxy resin.
21. The solder connect assembly as claimed in claim 16, wherein a main component of said resin fillet is resin included in cream solder.
22. The solder connect assembly as claimed in claim 16, wherein said resin fillet is slightly expanded on a side of said solder ball.
23. A method of connecting a semiconductor package and a printed wlrlng board, the method comprising: supplying cream solder on an electrode formed on the printed wiring board, wherein the cream solder includes resin; mounting the semiconductor package on the printed wiring board; heating and melting the cream solder; and, cooling and solidifying the cream solder, thereby a solder ball is formed between the semiconductor package and the printed wiring board, and the resin included in the cream solder coheres in the vicinity of a connection between the solder ball and the printed circuit board to form a resin fillet.
24. The method as claimed in claim 23, further
- 20 comprising the step of melting the solder ball for removing the semiconductor package from the printed wiring board after the resin fillet has been formed.
25. The method as claimed tin claim 23, further comprising the step of supplying an underfiling resin between the semiconductor package and the printed wiring -
board so as to cover the resin fillet.
26. The method as claimed in claim 25, further comprising the step of melting the solder ball for removing the semiconductor package from Ehe printed wiring board after the resin fillet has been formed and before the underfiling resin is supplied so as to cover the resin fillet.
27. The method as claimed in claim 23, wherein the resin fillet is made of resin a main component of which is rosin.
28. The method as claimed in claim 23, wherein the resin fillet is made of resin a main component of which is -
a reactant of rosin.
29. The method as claimed in claim 23, wherein the resin fillet is made of resin a main component of which is
- 21 epoxy resin.
30. The method as claimed in claim 23, wherein the resin fillet is made of resin a main component of which is a reactant of epoxy resin.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10365547A JP3019851B1 (en) | 1998-12-22 | 1998-12-22 | Semiconductor device mounting structure |
GB9930350A GB2345191A (en) | 1998-12-22 | 1999-12-22 | Mounting semiconductor packages on substrates |
Publications (2)
Publication Number | Publication Date |
---|---|
GB0318434D0 GB0318434D0 (en) | 2003-09-10 |
GB2389460A true GB2389460A (en) | 2003-12-10 |
Family
ID=29551469
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB0318434A Withdrawn GB2389460A (en) | 1998-12-22 | 1999-12-22 | Mounting semiconductor packages on substrates |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2389460A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7927997B2 (en) * | 2005-03-15 | 2011-04-19 | Panasonic Corporation | Flip-chip mounting method and bump formation method |
US8283246B2 (en) | 2005-04-06 | 2012-10-09 | Panasonic Corporation | Flip chip mounting method and bump forming method |
US8297488B2 (en) * | 2006-03-28 | 2012-10-30 | Panasonic Corporation | Bump forming method using self-assembling resin and a wall surface |
US10074625B2 (en) | 2015-09-20 | 2018-09-11 | Qualcomm Incorporated | Wafer level package (WLP) ball support using cavity structure |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0189791A2 (en) * | 1985-01-28 | 1986-08-06 | International Business Machines Corporation | Solder interconnection structure for joining semiconductor devices to substrates, and process for making |
US4871921A (en) * | 1988-08-09 | 1989-10-03 | Honeywell Inc. | Detector array assembly having bonding means joining first and second surfaces except where detectors are disposed |
US5060844A (en) * | 1990-07-18 | 1991-10-29 | International Business Machines Corporation | Interconnection structure and test method |
US5641113A (en) * | 1994-06-30 | 1997-06-24 | Oki Electronic Industry Co., Ltd. | Method for fabricating an electronic device having solder joints |
US5666270A (en) * | 1993-10-18 | 1997-09-09 | Fujitsu Limited | Bump electrode, semiconductor integrated circuit device using the same, multi-chip module having the semiconductor integrated circuit devices and method for producing semicondutcor device having the bump electrode |
EP0831525A2 (en) * | 1996-09-20 | 1998-03-25 | Nec Corporation | Method for forming protruding electrode |
US5847456A (en) * | 1996-02-28 | 1998-12-08 | Nec Corporation | Semiconductor device |
-
1999
- 1999-12-22 GB GB0318434A patent/GB2389460A/en not_active Withdrawn
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0189791A2 (en) * | 1985-01-28 | 1986-08-06 | International Business Machines Corporation | Solder interconnection structure for joining semiconductor devices to substrates, and process for making |
US4871921A (en) * | 1988-08-09 | 1989-10-03 | Honeywell Inc. | Detector array assembly having bonding means joining first and second surfaces except where detectors are disposed |
US5060844A (en) * | 1990-07-18 | 1991-10-29 | International Business Machines Corporation | Interconnection structure and test method |
US5666270A (en) * | 1993-10-18 | 1997-09-09 | Fujitsu Limited | Bump electrode, semiconductor integrated circuit device using the same, multi-chip module having the semiconductor integrated circuit devices and method for producing semicondutcor device having the bump electrode |
US5641113A (en) * | 1994-06-30 | 1997-06-24 | Oki Electronic Industry Co., Ltd. | Method for fabricating an electronic device having solder joints |
US5847456A (en) * | 1996-02-28 | 1998-12-08 | Nec Corporation | Semiconductor device |
EP0831525A2 (en) * | 1996-09-20 | 1998-03-25 | Nec Corporation | Method for forming protruding electrode |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7927997B2 (en) * | 2005-03-15 | 2011-04-19 | Panasonic Corporation | Flip-chip mounting method and bump formation method |
US8691683B2 (en) | 2005-03-15 | 2014-04-08 | Panasonic Corporation | Flip-chip mounting method and bump formation method |
US8283246B2 (en) | 2005-04-06 | 2012-10-09 | Panasonic Corporation | Flip chip mounting method and bump forming method |
US8297488B2 (en) * | 2006-03-28 | 2012-10-30 | Panasonic Corporation | Bump forming method using self-assembling resin and a wall surface |
US10074625B2 (en) | 2015-09-20 | 2018-09-11 | Qualcomm Incorporated | Wafer level package (WLP) ball support using cavity structure |
Also Published As
Publication number | Publication date |
---|---|
GB0318434D0 (en) | 2003-09-10 |
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