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GB2343973B - Data processing device for scheduling conditional operation instructions in a program sequence - Google Patents

Data processing device for scheduling conditional operation instructions in a program sequence

Info

Publication number
GB2343973B
GB2343973B GB0003270A GB0003270A GB2343973B GB 2343973 B GB2343973 B GB 2343973B GB 0003270 A GB0003270 A GB 0003270A GB 0003270 A GB0003270 A GB 0003270A GB 2343973 B GB2343973 B GB 2343973B
Authority
GB
United Kingdom
Prior art keywords
scheduling
data processing
processing device
operation instructions
program sequence
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0003270A
Other versions
GB0003270D0 (en
GB2343973A (en
Inventor
Toyohiko Yoshida
Hideyuki Fujii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP02715898A external-priority patent/JP3881763B2/en
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of GB0003270D0 publication Critical patent/GB0003270D0/en
Publication of GB2343973A publication Critical patent/GB2343973A/en
Application granted granted Critical
Publication of GB2343973B publication Critical patent/GB2343973B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30058—Conditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30072—Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/323—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for indirect branch instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
GB0003270A 1998-02-09 1998-09-04 Data processing device for scheduling conditional operation instructions in a program sequence Expired - Fee Related GB2343973B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP02715898A JP3881763B2 (en) 1998-02-09 1998-02-09 Data processing device
GB9819363A GB2334118B (en) 1998-02-09 1998-09-04 Data processing device

Publications (3)

Publication Number Publication Date
GB0003270D0 GB0003270D0 (en) 2000-04-05
GB2343973A GB2343973A (en) 2000-05-24
GB2343973B true GB2343973B (en) 2000-07-12

Family

ID=26314330

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0003270A Expired - Fee Related GB2343973B (en) 1998-02-09 1998-09-04 Data processing device for scheduling conditional operation instructions in a program sequence

Country Status (1)

Country Link
GB (1) GB2343973B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2002329475A1 (en) * 2001-10-12 2003-04-28 Pts Corporation Late resolving instructions

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2069733A (en) * 1980-02-11 1981-08-26 Western Electric Co Conditional instruction execution in a pipelined processor
EP0476628A2 (en) * 1990-09-18 1992-03-25 Nec Corporation Pipelined data processing system capable of processing delayed branch instruction

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2069733A (en) * 1980-02-11 1981-08-26 Western Electric Co Conditional instruction execution in a pipelined processor
EP0476628A2 (en) * 1990-09-18 1992-03-25 Nec Corporation Pipelined data processing system capable of processing delayed branch instruction

Also Published As

Publication number Publication date
GB0003270D0 (en) 2000-04-05
GB2343973A (en) 2000-05-24

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20130904