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GB2239661A - Semiconductor devices provided with two metallic films - Google Patents

Semiconductor devices provided with two metallic films Download PDF

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Publication number
GB2239661A
GB2239661A GB9013037A GB9013037A GB2239661A GB 2239661 A GB2239661 A GB 2239661A GB 9013037 A GB9013037 A GB 9013037A GB 9013037 A GB9013037 A GB 9013037A GB 2239661 A GB2239661 A GB 2239661A
Authority
GB
United Kingdom
Prior art keywords
deposition
film
chemical vapour
carried out
vapour deposition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB9013037A
Other versions
GB9013037D0 (en
Inventor
Euisong Kim
Kwangock Goh
Seonhu Park
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of GB9013037D0 publication Critical patent/GB9013037D0/en
Publication of GB2239661A publication Critical patent/GB2239661A/en
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H01L21/28562Selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

A method of manufacturing a semiconductor device comprises the steps of providing a semiconductor substrate with a junction layer; providing upon said substrate an insulating layer with a contact hole through the insulating layer and over said junction layer; depositing a first metallic film in said contact hole by chemical vapour deposition; and depositing a second metallic film upon said first metallic film by chemical vapour deposition. In a specific embodiment, illustrated in Fig 3, a first tungsten film (41) is deposited on a substrate (1) using chemical vapour deposition at a low temperature of less than about 250 DEG C, and a second tungsten film (42) is deposited using chemical vapour deposition at a high temperature greater than about 350 DEG C. The deposition rate of tungsten can be doubled, as well as the leakage current characteristics of the overall tungsten films being maintained consistently low, thereby improving the reliability and productivity of semiconductor devices. <IMAGE>

Description

CS IS 1 A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE The present
invention relates to a method of manufacturing a semiconductor device.
As a result of the trend of increasing miniaturisation of a semiconductor devices, problems are encountered during metallization and in order to overcome these it has been proposed to form a tungsten film in only a contact hole portion using selective chemical vapour deposition.
Figure 1 is a sectional view showing a tungsten film formed using selective chemical vapour deposition according to a conventional technique.
As shown in Figure 1, an impurity is doped into a semiconductor substrate 1 to form a junction layer 2; then an insulating layer 3 is provided thereupon; and then a contact hole is formed using a photo-etching process. After the formation of the contact hole, a tungsten film 4 is selectively formed only in the contact hole portion using selective chemical vapour deposition.
if the tungsten film 4 is deposited at a low temperature of about 2500C, the deposition rate for the tungsten film is very low, but the leakage current is inhibited, as shown in Figure 2A. However, if the tungsten film 4 is deposited at a high temperature of about 4500C, the deposition rate for the tungsten film is high, but the leakage current characteristics are poor, as shown in Figure 2B.
According to the present invention, there is provided a method of manufacturing a semiconductor 0 device, comprising the steps of: providing a semiconductor substrate with a junction layer; providing upon said substrate an insulating layer with a contact hole through the insulating layer and over said junction layer; depositing a first metallic film in said contact hole by chemical vapour deposition; and depositing a second metallic film upon said first metallic film by chemical vapour deposition.
Preferably, the deposition of said first metallic film is carried out at a first temperature (for example less than about 250OC) and the deposition of said second metallic film is carried out a second temperature (for example greater than abut 350OC) which is higher than said first temperature.
The deposition of said first film and the deposition of said second film could be carried Out in a single chamber.
Alternatively, the deposition of said first film could be carried out in a first chamber, the deposition of said second film being carried out in a second chamber without intermediate exposure to the atmosphere.
The present invention will now be described, by way of example, with reference to the accompanying drawings, in which:
Figure 1 is a sectional view of a semiconductor device formed using a conventional chemical vapour deposition process; U Figures 2A and 2B show the leakage current characteristics of a tungsten film formed using a conventional chemical vapour deposition process, Figure 2A showing the leakage current characteristics of tungsten films formed at a low temperature and Figure 2B showing the leakage current characteristics of tungsten films formed at a high temperature; Figure 3 is a sectional view of a semiconductor device formed using an example of a method according to the present invention; and Figure 4 shows the leakage current characteristics of tungsten films formed using an example of a method according to the present invention.
Referring to Figure 3, in which items which correspond with items in Figure 1 are given the same reference numerals as in Figure 1, the junction layer 2 is provided within substrate 1 and the insulating layer 3 is provided in a thick form upon the junction layer 2, as in Figure 1. Then, for the sake of forming a metallization on the junction layer 2. the insulating layer 3 is etched using a photo-etching process, thereby forming a contact hole over the junction layer 2.
To apply tungsten only in the contact hole. a first tungsten film 41 is deposited to a thickness of 0 1000A by chemical vapour deposition at a low temperature of less than about 2500C. This primary deposition of tungsten at a low temperature is to prevent an increase in leakage current. In depositing this tungsten film, 2.5 standard cubic centimetres per minute (SCCM) of SiH4 gas. 4.2 SCCM of WF6 gas, 175 SCCM of H2 gas and 5 SCCM of argon gas are passed, and M' 1 a pressure of 120 mTorr (16.0 Pa) is applied, the deposition being carried out for 26 seconds.
During such chemical vapour deposition, wafers on which the tungsten is to be deposited are advanced one by one, and those wafers are heated using an infra-red lamp.
Then, upon the f irst tungsten f ilm 41 f ormed in the manner described above, a second tungsten film 42 is deposited by chemical vapour deposition at a high temperature greater than about 3500C. The chemical vapour deposition conditions for the second tungsten film 42 are the same as those for the first tungsten film 41 except that the deposition is carried out at a high temperature greater than about 3500C and the depositing time period is determined by the thickness of the tungsten film to be deposited.
The steps of depositing the tungsten films 41, 42 may be carried out one after the other for each device in a single chamber; or for each device. the tungsten film 41 may be deposited in a first chamber at a low temperature using chemical vapour deposition, the tungsten film 42 being deposited in another chamber using chemical vapour deposition at a high temperature, without intermediate exposure to the atmosphere.
As a result of depositing the tungsten using, first, chemical vapour deposition at a low temperature and then chemical vapour deposition at a high temperature, the deposition rate for the tungsten can be doubled, as well as the leakage current characteristics of the overall tungsten films being maintained consistently low, as shown in Figure 4,' 1 thereby improving the reliability and productivity of semiconductor devices.
i Y

Claims (9)

1. A method of manufacturing a semiconductor device, comprising the steps of: providing a semiconductor substrate with a junction layer; providing upon said substrate an insulating layer with a contact hole through the insulating layer and over said junction layer; depositing a first metallic film in said contact hole by chemical vapour deposition; and depositing a second metallic film upon said first metallic film by chemical vapour deposition.
2. A method as claimed in claim 1, wherein said insulating layer is formed on said substrate and thereafter said contact hole is formed through said insulating layer.
3. A method as claimed in claim 1 or 2, wherein the deposition of said first metallic film is carried out at a first temperature and the deposition of said second metallic film is carried out at a second temperature which is higher than said first temperature.
4. A method as claimed in claim 3, wherein said first temperature is less than about 2500C.
5. A method as claimed in claim 3 or 4, wherein said second temperature is greater than about 3500C.
6. A method as claimed in any preceding claim, wherein the deposition of said first film and the deposition of said second film are carried out in a single chamber.
A 1
7. A method as claimed in any of claims 1 to 5, wherein the deposition of said first film is carried out in a f irst chamber and the deposition of said second film is carried out in a second chamber without 5 intermediate exposure to the atmosphere.
8. A method as claimed in any preceding claim, wherein said metallic films comprise tungsten films.
9. A method of manufacturing a semiconductor device, substantially as herein described with reference to 10 Figures 3 and 4 of the accompanying drawings.
Published 1991 at The Patent Officr.Statc House, 66/71 High Holborn. London WCIR47P. Furthercoples maybe obtained from Sales Branch. Unit 6. Nine Mile Point. Cwrnfelinfach. Cross Keys, Newport. NPI 7HZ. Printed by Multiplex techniques ltd. St Mary Cray, Kent
GB9013037A 1989-11-22 1990-06-12 Semiconductor devices provided with two metallic films Withdrawn GB2239661A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890016957A KR930000309B1 (en) 1989-11-22 1989-11-22 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
GB9013037D0 GB9013037D0 (en) 1990-08-01
GB2239661A true GB2239661A (en) 1991-07-10

Family

ID=19291917

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9013037A Withdrawn GB2239661A (en) 1989-11-22 1990-06-12 Semiconductor devices provided with two metallic films

Country Status (4)

Country Link
JP (1) JPH03169010A (en)
KR (1) KR930000309B1 (en)
DE (1) DE4018801A1 (en)
GB (1) GB2239661A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2273816A (en) * 1992-12-17 1994-06-29 Samsung Electronics Co Ltd Method for forming a contact plug of a semiconductor device
US5587339A (en) * 1992-09-11 1996-12-24 Sgs-Thomson Microelectronics Ltd. Method of forming contacts in vias formed over interconnect layers
US5874360A (en) * 1992-09-11 1999-02-23 Sgs-Thomson Microelectronics Limited Manufacture of semiconductor devices

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5489552A (en) * 1994-12-30 1996-02-06 At&T Corp. Multiple layer tungsten deposition process

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2208119A (en) * 1987-06-01 1989-03-01 Gen Electric Method and structure for achieving low contact resistance to aluminium and its alloys
EP0310108A2 (en) * 1987-10-02 1989-04-05 Kabushiki Kaisha Toshiba Interconnection structure of a semiconductor device and method of manufacturing the same
EP0319214A1 (en) * 1987-12-04 1989-06-07 AT&T Corp. Method for making semiconductor integrated circuits using selective tungsten deposition
US4849260A (en) * 1986-06-30 1989-07-18 Nihon Sinku Gijutsu Kabushiki Kaisha Method for selectively depositing metal on a substrate

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63149378A (en) * 1986-12-12 1988-06-22 Fujitsu Ltd Vapor growth method
JPS63153273A (en) * 1986-12-16 1988-06-25 Matsushita Electric Ind Co Ltd Method for selective deposition of thin metallic film
EP0305143B1 (en) * 1987-08-24 1993-12-08 Fujitsu Limited Method of selectively forming a conductor layer

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4849260A (en) * 1986-06-30 1989-07-18 Nihon Sinku Gijutsu Kabushiki Kaisha Method for selectively depositing metal on a substrate
GB2208119A (en) * 1987-06-01 1989-03-01 Gen Electric Method and structure for achieving low contact resistance to aluminium and its alloys
EP0310108A2 (en) * 1987-10-02 1989-04-05 Kabushiki Kaisha Toshiba Interconnection structure of a semiconductor device and method of manufacturing the same
EP0319214A1 (en) * 1987-12-04 1989-06-07 AT&T Corp. Method for making semiconductor integrated circuits using selective tungsten deposition

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5587339A (en) * 1992-09-11 1996-12-24 Sgs-Thomson Microelectronics Ltd. Method of forming contacts in vias formed over interconnect layers
US5874360A (en) * 1992-09-11 1999-02-23 Sgs-Thomson Microelectronics Limited Manufacture of semiconductor devices
GB2273816A (en) * 1992-12-17 1994-06-29 Samsung Electronics Co Ltd Method for forming a contact plug of a semiconductor device
GB2273816B (en) * 1992-12-17 1996-10-23 Samsung Electronics Co Ltd Method for forming a contact plug of a semiconductor device

Also Published As

Publication number Publication date
KR930000309B1 (en) 1993-01-15
JPH03169010A (en) 1991-07-22
KR910010625A (en) 1991-06-29
DE4018801A1 (en) 1991-05-23
GB9013037D0 (en) 1990-08-01

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