GB2238926A - Video multiplexer for surveillance installation - Google Patents

Abstract

A video circuit for use with TV surveillance systems in which the outputs from several TV cameras 1-4 are frame sequentially multiplexed 5, encoded 7 in PAL format and recorded 10, so that on playback, or in real time, any one camera output may be selected at 9 for viewing at any one time on a single monitor 11. Frame store 12 is necessary only if recorder 10 lacks a still facility. An identification signal is placed on one line of one signal during field blanking. <IMAGE>

Description

VIDEO MULTIPLEXER This invention relates to video recording and monitoring systems and has application in the field of TV camera surveillance. In conventional TV surveillance installations, for example, the outputs from each of several cameras are fed to video monitors or recorders for observation or recording, each camera requiring a dedicated monitor or recorder. Such installations can therefore be quite costly in terms of essential equipment. This invention seeks to cut down the requirement for a multiplicity of monitors or recorders for multi-camera installations by enabling the outputs of several cameras to be processed in a manner which enables selection for viewing or recording of any given camera output on one monitor or recorder only.

The invention therefore consists of an electrical circuit comprising: a multiplexer for sequentially multiplexing a plurality of video channels, in which each channel consists of red, green and blue signals; means for generating an ident signal relating to one of said channels; and an encoder for converting said sequentially multiplexed channels into PAL system format for recording on a PAL system video recorder.

The video channels could be generated by TV cameras or any other video source comprising red, green and blue signals. Preferably four channels are employed. By sequentially multiplexing these four channels at a frame rate of 25 Hz, a recording standard of just over six frames per second for each channel can be achieved. In order to identify which channel is being multiplexed at any time, the ident signal is inserted during the video period of one line of one channel.

The choice of line and channel is arbitrary but preferably the line chosen should be one occurring during field blanking; eg lines 6 to 22 in a 625-line PAL system. This ident signal can be recovered during playback (using the video recorder) in order to synchronise demultiplexing circuitry.

The PAL encoder and each generator of the video channels (eg TV cameras) are genlocked to a stable composite sync source (as is normal practice). To enable the separate red, green and blue signals to be recorded in colour, the multiplexer output is applied to the PAL encoder under the control of a circuit which generates an accurate colour sub-carrier with the necessary horizontal scan/frequency relationship. The output of the PAL encoder (which is applied to the video recorder) is thus the sequentially multiplexed video channels in a PAL format.

Any PAL video recorder with a playback slow motion or still facility can be used to examine any particular field of video without the requirement for a demultiplexing circuit.

For continuous display, the invention also provides, optionally, a demultiplexing circuit. This enables monitoring of any one channel, by generating a strobe signal for a frame store in synchronism with the ident pulse. In operation the frame store has its input connected to the output of the video recorder and its output connected to a video monitor.

The demultiplexing circuit can be adapted for monitoring any one channel at a given time by manual switching between channels or, by incorporating additional frame stores (and monitors), all channels can be viewed simultaneously. Because the video channels appearing on the output of the demultiplexing circuit are stored in a memory (ie the frame store), there exists the possibility of allowing video information to be frozen during periods of tape drop-out or lost signal.

The slower video rate of approximately six frames per second (in the four-channel case) compared with the real time update of twenty five is not likely to be a disadvantage for most applications.

More than four channels could be accommodated by the invention but this, naturally, leads to further loss of video information.

The invention offers the benefit of an economical and flexible recording system which can easily be adapted to any genlockable multi-channel video system. It could also be used as a stand-alone system for remote use via a single video channel.

An embodiment of the invention will now be described, by way of example only, with reference to the drawings of which: Fig 1 is a block diagram of a video multiplexing and demultiplexing circuit in accordance with the invention; and Figs 2 to 6 are respectively circuit diagrams of a multiplexer, a sync generator, a multiplexer address and ident generator board, a PAL encoder and a channel selector which comprise the constituents of Fig 1.

Fig 1 shows outputs from four video channels 1 to 4 connected to a multiplexer 5. The multiplexer 5 sequentially multiplexes the incoming red, green and blue signals from each video channel under the control of a multiplexer address and ident generator board 6. The resulting multiplexed signals are converted to a single composite PAL signal by a PAL encoder 7. A colour subsarrier for the PAL encoder 7 and a composite sync output for genlocking the video channels 1 to 4 are produced by a sync generator 8. The multiplexer address and ident generator board 6 inserts an ident signal on line 14 of video channel 1. This signal is required to synchronise demultiplexing circuitry comprising a channel selector 9. The afore-mentioned composite PAL signal is recorded on a video recorder 10 and played back on a video monitor 11 via a frame store 12.One of any of the four channels is selected for viewing by means of the channel selector 9.

The operation of the invention will now be described in more detail with reference to Figs 2 to 6.

In Fig 2 the four video channels 1 to 4 of Fig 1 are generated by four TV cameras 13a to 13d. The outputs from the cameras comprise red, green and blue signals with composite sync included on the green channels. The red signals from each camera are fed into a first parallel in/serial out multiplexer 14, the green signals into a second similar multiplexer 15 and the blue signals into a third, similar multiplexer 16. (Each multiplexer is of type MAX 454 CPD, for example). Hence, multiplexed red, green and blue signals for cameras 13a to 13d in sequence appear on pins 14 of each of the multiplexers 14,15 and 16.

The cameras are genlocked to one another and to a stable synchronisation source by a signal on line 17 from a universal sync generator 18 (See Fig 3). (This generator is of type SA 1043, for example). A sync signal appearing on pin 26 of the generator 18 is inverted by an inverter 19 and set to 0.4V amplitude by a variable resistor R1. The signal appearing on line 20 is then fed into four buffers (not shown) and thence to the cameras 13a to 13d. The buffers which are of type MAX 452 CPA, for example are used to drive the conventional 75Q cable system employed by the cameras. Fig 3 also shows a sub-carrier coupler 21 which functions in conjunction with the universal sync generator 18 in accordance with the manufacturer's instructions.The sub-carrier coupler 21 which is of type SA 1044 for example generates a 4.43 MHz colour subcarrier (on pin 5) for the PAL encoder 7.

The green signal from the camera 13a is applied to pin 2 of a sync separator 22 (see Fig 4). The sync separator 22 is of type LM 1881 for example. This is used to generate an ident pulse on line 14 on the green signal of the first video channel ie the output of camera 13a. The sync separator 22 generates a sync signal on pin 1 and an odd/even signal on pin 7. These signals are used to generate a multiplexer address which appears on pins 9 and 12 of a counter 23 (type TI 74 LS 193 for example), and also, in conjunction with two counters 24 and 25 (of type TI 74 LS 193 and TI 74 LS 93 respectively) to generate an output on pin 9 of the counter 25. This output is gated and inverted and applied to a dual monostable multivibrator 26 (of type TI 74 its 123) during said line fourteen which produces a positive-going pulse on pin 5 which is used as the ident signal. The position of the ident signal along line fourteen and its width may be adjusted by choosing appropriate values of the external capacitors on pins 6, 7, 14 and 15. In the example of Fig 4, the ident signal appears on the centre of the line and has a width of approximately one third of a line. The ident signal resets the counter 23 and is also used to address a multiplexer 27 which is shown in Fig 5.

Figure 5 also shows a PAL encoder 28 and a sync separator 29.

The sync separator 29 supplies the composite sync signal required by the PAL encoder 28 and generates said signal from the multiplexed green channel signal which appears on pin 14 of the multiplexer 14 output (see Fig 2). This green channel signal along with the red and blue multiplexed signals from multiplexers 15 and 16 respectively are fed into the PAL encoder 28. The 4.43 MHz colour sub-carrier from the sub-carrier coupler 21 (see Fig 3) is applied to pin 17 of the PAL encoder 28. An 8.2V internally regulated supply on pin 16 of the PAL encoder 28 is used for the adjustment of the burst gate set by variable resistor R2 in accordance with the manufacturers instructions.

This regulated supply is also used to supply power to the sync separator 29 on pin 8.

The PAL encoder (which is type MC 1377P for example) encodes the incoming multiplexed green, red and blue signals from the four channels into a PAL format and applies this to an input of the multiplexer 27. (Said multiplexer is of type MAX 454 for example).

The multiplexer 27 is connected so that during the occurrence of the ident signal, the output of the multiplexer 27 (on pin 14) is a DC voltage set by a variable resistor R3. At all other times the PAL encoder video signal appears on pin 14. This signal forms the input to the video recorder 10 (See Fig 1). The output of the recorder 10 (on playback) is then fed into circuitry comprising the channel selector 9 shown in greater detail in Fig 6.

In Fig 6 a counter 30 counts to line fourteen. The counter 30 (which is type TI 74 LS 193 for example) is locked by a signal from a sync separator 31 driven by the PAL video signal. A switch 32 (type CD 4066 for example) opens on line fourteen of each video frame under the control of the counter 30 and the ident signal present on the PAL encoded input appears on pin 2. (This signal is fed to a comparator 33 (type LM 311 for example) which compares the level of the signal with that on a variable resistor R4. Its action is to reset a counter 34 if it is in the incorrect count state. The counter 34 (which is type TI 74 IS 93 for example) generates an address for a multiplexer 35 (type TI 74 LS 151). The counter 34 is driven by the sync separator 31 and reset by the comparator 33 so that the address supplied to the multiplexer 35 is correctly synchronised. The address counts continuously through from 0 to 3 and the output of the multiplexer 35 appearing on pin 6 will depend on the setting of a four-position switch 36. The signal on pin 6 therefore is a train of pulses (or strobe) which trigger the latch of the frame store 12 (see Fig 1). The PAL video signal is applied to the frame store 12 via a buffer 37. Thus the strobe signal which is synchronised with PAL video signal comprising the multiplexed four video channels enables storage and subsequently viewing, of one channel at a time.

For simultaneous monitoring of all four channels, four multiplexers driven by the same address instead of the one (designated 35) and four frame stores and monitors are employed.

Claims (5)

1. An electrical circuit comprising: a multiplexer for sequentially multiplexing a plurality of video channels, in which each channel consists of red, green and blue signals; means for generating an ident signal relating to one of said channels; and an encoder for converting said sequentially multiplexed channels into PAL system format for recording on a PAL system video recorder.

2. An electrical circuit as claimed in claim 1 in which four video channels are employed, said four channels being sequentially multiplexed at a frame rate of 25 Hz.

3. An electrical circuit as claimed in claim 1 or claim 2 in which the ident signal is placed onto one line of one channel during field blanking.

4. An electrical circuit as claimed in any preceding claim further comprising a demultiplexer, for enabling monitoring of any one channel, which generates a strobe signal for a frame store in synchronism with the ident pulse, whereby in use said frame store has its input connected to the output of the video recorder and its output connected to a video monitor.

5. An electrical circuit as claimed in claim 1 and as described with reference to the drawings.