GB2251994B - Pulse signal generators - Google Patents
Pulse signal generatorsInfo
- Publication number
- GB2251994B GB2251994B GB9126210A GB9126210A GB2251994B GB 2251994 B GB2251994 B GB 2251994B GB 9126210 A GB9126210 A GB 9126210A GB 9126210 A GB9126210 A GB 9126210A GB 2251994 B GB2251994 B GB 2251994B
- Authority
- GB
- United Kingdom
- Prior art keywords
- pulse signal
- signal generators
- generators
- pulse
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/131—Digitally controlled
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/00078—Fixed delay
- H03K2005/00097—Avoiding variations of delay using feedback, e.g. controlled by a PLL
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/0015—Layout of the delay element
- H03K2005/00163—Layout of the delay element using bipolar transistors
- H03K2005/00176—Layout of the delay element using bipolar transistors using differential stages
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/0015—Layout of the delay element
- H03K2005/00163—Layout of the delay element using bipolar transistors
- H03K2005/00182—Layout of the delay element using bipolar transistors using constant current sources
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/0015—Layout of the delay element
- H03K2005/00228—Layout of the delay element having complementary input and output signals
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9412110A GB2277843B (en) | 1990-12-10 | 1991-12-10 | Cascode circuits |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP40977090A JP3158282B2 (en) | 1990-12-10 | 1990-12-10 | Pulse signal generation circuit |
JP3023953A JPH04239812A (en) | 1991-01-23 | 1991-01-23 | Pulse signal generating circuit |
JP02395291A JP3303302B2 (en) | 1991-01-23 | 1991-01-23 | Pulse signal generation circuit |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9126210D0 GB9126210D0 (en) | 1992-02-12 |
GB2251994A GB2251994A (en) | 1992-07-22 |
GB2251994B true GB2251994B (en) | 1995-02-15 |
Family
ID=27284448
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9126210A Expired - Fee Related GB2251994B (en) | 1990-12-10 | 1991-12-10 | Pulse signal generators |
Country Status (4)
Country | Link |
---|---|
US (1) | US5191234A (en) |
KR (1) | KR0153244B1 (en) |
DE (1) | DE4140564C2 (en) |
GB (1) | GB2251994B (en) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5327021A (en) * | 1991-06-10 | 1994-07-05 | Shinko Electric Ind., Co., Ltd. | Waveform synthesizing circuit |
JP3326619B2 (en) * | 1992-01-08 | 2002-09-24 | ソニー株式会社 | PWM circuit |
US5438303A (en) * | 1992-07-14 | 1995-08-01 | Sony Corporation | Pulse with modulation apparatus with plural independably controllable variable delay devices |
US5306971A (en) * | 1992-07-23 | 1994-04-26 | Proxim, Inc. | Binary controlled digital tapped delay line |
US5374860A (en) * | 1993-01-15 | 1994-12-20 | National Semiconductor Corporation | Multi-tap digital delay line |
US5434523A (en) * | 1994-04-05 | 1995-07-18 | Motorola, Inc. | Circuit and method for adjusting a pulse width of a signal |
US5537068A (en) * | 1994-09-06 | 1996-07-16 | Intel Corporation | Differential delay line clock generator |
US5828250A (en) * | 1994-09-06 | 1998-10-27 | Intel Corporation | Differential delay line clock generator with feedback phase control |
JPH08306773A (en) * | 1995-04-28 | 1996-11-22 | Sharp Corp | Semiconductor device |
TW340262B (en) | 1996-08-13 | 1998-09-11 | Fujitsu Ltd | Semiconductor device, system consisting of semiconductor devices and digital delay circuit |
US6285197B2 (en) * | 1998-07-31 | 2001-09-04 | Philips Electronics North America Corporation | System and method for generating a jittered test signal |
US6166821A (en) * | 1998-10-02 | 2000-12-26 | Electronics For Imaging, Inc. | Self calibrating pulse width modulator for use in electrostatic printing applications |
DE10036863C2 (en) * | 2000-07-28 | 2002-09-19 | Texas Instruments Deutschland | Driver circuit for delivering an adjustable output signal current |
EP1721371A4 (en) * | 2004-03-05 | 2014-12-03 | Finisar Corp | A laser driver circuit for reducing electromagnetic interference |
JP2006129180A (en) * | 2004-10-29 | 2006-05-18 | Elpida Memory Inc | Clock delay circuit |
US7474129B2 (en) * | 2005-04-25 | 2009-01-06 | Analog Devices, Inc. | Dual mode comparator |
US8513980B2 (en) * | 2011-10-25 | 2013-08-20 | Texas Instruments Incorporated | Reduced offset comparator |
JP6107100B2 (en) * | 2012-12-10 | 2017-04-05 | 富士通株式会社 | Synthesis circuit and driving device using the same |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2045561A (en) * | 1979-03-13 | 1980-10-29 | Int Computers Ltd | Variable delay circuits |
EP0118166A1 (en) * | 1983-02-07 | 1984-09-12 | Tektronix, Inc. | High frequency differential amplifier with adjustable damping factor |
EP0292641A2 (en) * | 1987-05-27 | 1988-11-30 | Kabushiki Kaisha Toshiba | Output buffer of MOS semiconductor integrated circuit |
US4797586A (en) * | 1987-11-25 | 1989-01-10 | Tektronix, Inc. | Controllable delay circuit |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3634772A (en) * | 1971-01-05 | 1972-01-11 | Us Air Force | Digital band-pass detector |
JPS592410A (en) * | 1982-06-28 | 1984-01-09 | Sony Corp | Current amplifier |
US4468628A (en) * | 1983-01-17 | 1984-08-28 | Tektronix, Inc. | Differential amplifier with high common-mode rejection |
US4801827A (en) * | 1987-11-02 | 1989-01-31 | Tektronix, Inc. | Adjustable delay element for digital systems |
EP0600852B1 (en) * | 1988-11-21 | 1999-03-24 | Nippon Telegraph And Telephone Corporation | Logic circuit arrangements |
-
1991
- 1991-12-09 DE DE4140564A patent/DE4140564C2/en not_active Expired - Fee Related
- 1991-12-09 US US07/803,992 patent/US5191234A/en not_active Expired - Lifetime
- 1991-12-10 KR KR1019910022509A patent/KR0153244B1/en not_active IP Right Cessation
- 1991-12-10 GB GB9126210A patent/GB2251994B/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2045561A (en) * | 1979-03-13 | 1980-10-29 | Int Computers Ltd | Variable delay circuits |
EP0118166A1 (en) * | 1983-02-07 | 1984-09-12 | Tektronix, Inc. | High frequency differential amplifier with adjustable damping factor |
EP0292641A2 (en) * | 1987-05-27 | 1988-11-30 | Kabushiki Kaisha Toshiba | Output buffer of MOS semiconductor integrated circuit |
US4797586A (en) * | 1987-11-25 | 1989-01-10 | Tektronix, Inc. | Controllable delay circuit |
Also Published As
Publication number | Publication date |
---|---|
KR0153244B1 (en) | 1998-12-15 |
GB2251994A (en) | 1992-07-22 |
DE4140564C2 (en) | 2000-06-15 |
KR920013909A (en) | 1992-07-30 |
US5191234A (en) | 1993-03-02 |
GB9126210D0 (en) | 1992-02-12 |
DE4140564A1 (en) | 1992-06-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |