GB2183679A - A method of depositing an epitaxial silicon layer - Google Patents
A method of depositing an epitaxial silicon layer Download PDFInfo
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- GB2183679A GB2183679A GB8530053A GB8530053A GB2183679A GB 2183679 A GB2183679 A GB 2183679A GB 8530053 A GB8530053 A GB 8530053A GB 8530053 A GB8530053 A GB 8530053A GB 2183679 A GB2183679 A GB 2183679A
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Classifications
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/06—Silicon
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/10—Heating of the reaction chamber or the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Materials Engineering (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
The deposition of an epitaxial silicon layer onto a monocrystalline silicon substrate from a silicon carrier gas may be effected by decomposing the silicon carrier gas on the substrate during a high temperature heat pulse. Removal of oxide from the substrate before deposition is effected on heating the substrate to over 1000 DEG C at the start of the heat pulse 41 in the presence of the silicon carrier gas. Deposition is effected while the substrate is maintained at a high temperature 42 and the deposition is terminated by allowing the substrate temperature to fall to a temperature below the minimum at which epitaxial deposition occurs. A radiantly heated reactor is used to obtain high rates of temperature rise and fall, for example 20 DEG C to 1150 DEG C in 12 seconds 41. Thin undoped layers may be grown on highly doped substrates with small transition depth D, for example, a 0.43 mu m epilayer on a substrate having an arsenic concentration of 2.4x10<25>m<-3>, has D = 62nm. Such a method is particularly useful in the production of VLSI devices. <IMAGE>
Description
SPECIFICATION
A method of depositing an epitaxial silicon layer
The present invention relates to a method of depositing an epitaxial silicon layer on a surface of a monocrystalline silicon substrate by chemical vapour deposition in a radiantly heated reaction chamber.
A method of deposition is known which includes the steps of chemically cleaning the substrate, placing the substrate on a support in the reaction chamber, purging the reaction chamber, cleaning the substrate within the reaction chamber and depositing the epitaxial silicon layer from a stream of silicon carrier gas.
A particularform of such a known method involving the application of a heat pulse to the substrate is described in the paper "Limited Reaction
Processing: Silicon Epitaxy" byj.F. Gibbons, C.M.
Gronetand K.E. Williams in Applied Physics Letters,
Volume 47, No.7,1 October 1985. In this known method a heavily doped (100) or(1 11) silicon substrate is chemically cleaned using a process such as described in the RCA Review 31, 187 (1970). The substrate was then mounted on quartz pins and placed in a reaction chamberwhich could be heated by two banks of six air cooled 1.2kW tungsten lamps.
Substrate heating and cooling rates between 200 and 1000"C per second could be achieved in the reactor.
The substrate was cleaned in the reaction chamber by being heated in hydrogen to 1120"Cfor10-30 seconds and then etched in 1% hydrochloric acid gas in hydrogen for 10-30 seconds. It was reported that a minimum etching time of 20 seconds was required to remove carbon and oxygen from the substrate surface.
The reaction chamberwasthen purged several times beforethesilicon carrier gas (SiH2Cl2) and diluent gas (H2) were introduced into the reaction chamber and allowed to stabilise over several minutes at a total pressure between 133 and 2594Pa with the mole-percentage of SiH2Cl2 between 0.77 and 21.4. The deposition of an undoped silicon epitaxial layer was then effected by radiantly heating the substrate to a desired deposition temperature.
According to the present invention there is provided a method of depositing an epitaxial silicon layeron asurfaceofa monocrystallinesilicon substrate by chemical vapour deposition in a radiantly heated reaction chamber, the method including the steps of (a) chemically cleaning the substrate, (b) placing the substrate on a support in the reaction chamber, (c) purging the reaction chamber, (d) cleaning the substratewithin the reaction chamber, and (e) depositing the epitaxial silicon layerfrom a stream of silicon carrier gas during the application of a heat pulse to the substrate, characterised in that, by means ofthe heat pulse the temperature of the substrate is raised to a temperature between 1000 C and 1250 C, maintained at a temperature between 1 000"C and 1250"C, and then allowed to fall to a temperature below a minimum temperature at which deposition occurs from the stream of silicon carrier gas, in that the stream of silicon carrier gas is introduced into the reaction chamber before the cleaning step (d), in thet the cleaning step (d) is effected in the presence ofthe silicon carrier gas during the application ofthe heat pulse, and in that the deposition step (e) is also effected during the application of the heat pulse.
In a method in accordance with the invention the cleaning step is effected during the step of applying the heat pulse while the silicon carrier gas stream is present in the reaction chamber. This removes the need for a separate cleaning step within the reaction chamberas isfound in the known method in which the substrate is heated to 11 20"C in hydrogen and then an etchant gas, for example hydrochloric acid gas, is introduced into the reaction chamber to react with and etch away any oxide present on the substrate surface. The minimum time the substrate is held at 11 20"C is 30 seconds to ensure the removal of carbon and oxygen from the substrate surface.
After this separate cleaning step in the known method the etchant gas must be removed and the system is purged to prevent contamination of the clean substrate surface before the silicon carrier gas is introduced to start the deposition. The possibility of contamination is removed in the method in accordance with the invention as the cleaning step is effected with the silicon carrier gas present, and the cleaning step and the deposition step are consecutive and may slightly overlap during the step of applying the heat pulse. In the known method the separate cleaning step waseffected at a substrate temperature of 11 200C and the deposition was effected at a temperature between 920 and 980 C.
Thus in the known method the substrate is exposed to a temperature of 1120for between 30 and 60 seconds, in addition to the time at the deposition temperature between 920 and 980 C.
In a method in accordance with the invention, the reaction ofthe silicon carrier gas is dependent on the temperature ofthe substrate afterthe silicon carrier gas stream is introduced. By means of the known chemical cleaning step, performed before loading the substrate into the reaction chamber, a thin oxide layer which is substantially free of contaminant species, in particularcarbon and metals, can be established on the surface of the substrate. As the substrate temperature rises at the beginning of heat pulse, amorphous and then polycrystalline silicon may be deposited, but these and the oxide layer are removed when the substrate temperature becomes sufficiently high to cause sublimation of the oxide from the surface, disrupting any amorphous or polycrystalline deposition present. The increasing temperature of the substrate may promote a reaction between any deposited amorphous or polycrystalline silicon and silicon dioxide present on the substrate surface, leading totheformation of silicon monoxide which sublimes at about 1 0000C.
Thus the step of cleaning the substrate within the reaction chamber is effected during the step of applying the heat pulse and may be effected during the part of the heat pulse In which the substrate temperature is raised to a temperature between 1 000"C and 1 250"C. As soon as the substrate surface is sufficiently clean deposition of the epitaxial layer proceeds while the substrate temperature is maintained between 1000 C and 1250"C. Deposition continues while the substrate temperature falls towardsthe end ofthe heat pulse and stops when the substrate temperature falls below a minimum temperature at which deposition occurs from the silicon carrier gas. The beginning and end of the epitaxial deposition may therefore be monitored by measuring the substrate temperature.
A method in accordance with the invention allows the silicon carrier gas stream to be introduced into the reaction chamber under reaction chamber conditions in which the decomposition of the gas does not occur. The gas stream can therefore be established and stabilised so that deposition is effected underthe required gas stream conditions.
This prevents there being any deposition during gas stream conditions which are notthose required for the required deposition.
Atthe beginning ofthe step of applying the heat pulse thetemperature of the substrate may be raised to the temperature between 1000 C and 1 250"C in less than about 20 seconds.
Towards the end of the step of applying the heat pulse the temperature of the substrate may fall from the temperature between 1000 C and 1250 C to a temperature below the minimum at which deposition is effected in less than about 10 seconds.
This rate oftemperature fall ensures that there is an abrupt cut offto the deposition step as the rate of deposition falls by a factor ofapproximatelyten for each 1 000Cfal1 in substrate temperature. The deposition of the majority of the layer may therefore be effected with the substrate at the temperature between 1 000"C and 1 2500C, with the advantage that rapid deposition occursatsuchatemperature.
The method in accordance with the invention thus only requires the substrate to be maintained at the temperature of 1000 Cto 1 2500C during the step of applying the heat pulse, as during this heat pulse both the step of cleaning the substrate and the step of depositing the layer are effected. The rapid rates of substrate temperature changes ensure that the substrate is at this high temperature for a length of time which is substantially equal to the time required to effect the epitaxial deposition. The epitaxial layer maythus be deposited at the advantageously high rate offered by deposition at high temperature, but the deleterious effect of the high temperature on the substrate and layer is minimised by maintaining the substrate atthattemperature only during the heat pulse.
The substrate may be preheated within the reaction chamber before the step of applying the heat pulse, preferably to a temperature belowthe minimum temperature at which epitaxial deposition occurs so thatthe time taken to raise the substrate to the temperature between 1000 C and 12500C is reduced.
The substrate may be preheated by the radiant heat source used to heatthe substrate to the temperature between 1000 C and 1250 C, so that only one heat source is needed to preheatthe substrate and applythe heat pulse. This is particularly convenient in a manufacturing environment.
The silicon carrier gas may be either silane or trichlorsilane with which gases the minimum temperature atwhich epitaxial deposition occurs is approximately either 500 C or 750# respectively.
It may be advantageous in the method in accordance with the invention to effect epitaxial deposition from siline for layers of, for example, 1 micrometre or more thickness because it has a greater deposition rate than trichlorsilane at a temperature between 1000 C and 1250 C, thus minimising the time the substrateis maintained at this temperature. Conversely it may be advantageous to effect epitaxial deposition from trichiorsilaneforlayers of less than,for example,1 oflessthan,forexample, 1 micrometre thickness as it has a lower deposition rate and a higher minimum epitaxial deposition temperature than silane allowing more accurate control of epitaxial layer thickness.
Embodiments ofthe method of depositing an epitaxial silicon layer in accordance with the invention will now be described, including two non-limiting Examples, with reference to the drawings, in which:
Figure 1 shows schematically in cross section an epitaxial silicon layer on a surface of a monocrystalline silicon substrate, Figure2shows schematically the substrate temperature ( C) vs time (S) profile of the heat pulse used in a method in accordance with an embodiment ofthe invention described in Example 1,
Figure3is a secondary ion mass spectroscopy (SIMS) depth profile of part of a silicon substrate and an epitaxial layer deposited thereon by a method in accordance with an embodimentofthe invention described in Example 1,
Figure 4 shows schematically the substrate temperatu re ("C) vs time (S) profile of the heat pulse used in a method in accordance with an embodiment of the invention described in Example 2, and Figure 5 is a SIMS depth profile of part of a silicon substrate and an epitaxial layer deposited thereon by a method in accordance with an embodimentofthe invention described in Example 2.
In Figure 1 a part 10 of a monocrystallinesilicon substrate has on a surface 9 an epitaxial silicon layer 11 grown by a method in accordance with the invention. The method in accordance with the invention allows growth ofthe epitaxial layerto be made in a manner in which the resulting invasion of any dopant species present in the substrate 10 into the layer 11 is minimised. The extent of invasion is characterised byatransition depth D,which is defined as the depth of expitaxial layer required for the invading dopantspecies concentration to decay to a value two orders of magnitude below the concentration of dopant species in the substrate or from 1025m -3 to 1023m-3 iftheconcentration of dopant species in the substrate is greater than 1 025m -#.
Example 1
A 0.05m diameter arsenic doped monocrystalline silicon substrate with an arsenic concentration of 2.0 x 1025As m-3waschemicailycleaned using a process as described in the RCA Review 31,187 (1970)then placed on a support in a chemical vapour deposition reaction chamber. The back and edges of the substrate were not coated in thermally grown oxide to reduce autodoping. The support was a body of silicon carbide coated graphite which had previously been coated with polysilicon. The reaction chamber was then purged with nitrogen and the pressure in the chamber was reduced to the base pressure of 0.25 Pa.After backfilling and purging the reaction chamber with hydrogen, the pressure in the reaction chamberwas again reduced to the base pressure of 0.25Pa and the substrate was heated by radiant heaters to 400 C. A stream of silane ataflowrateof4cm3lmin wasthen introduced into the reaction chamberandthe reaction chamber pressure was allowed to stabilise at 6Pa.
When the reaction chamber pressure had stabilsed a heat pulse was applied to the substrate; the substrate temperature vs. time profile of that heat pulse is as shown in Figure 2. The substrate temperature is preheated at400 Cand is then raised in the heat pulse from 400into 1100 C,21, in 8.5 seconds, is maintained at that temperature 22 for 70 seconds and is then allowed to fall, 23, to ambient.
Thesubstratetemperaturefallstoaminimum temperature,24, at which epitaxial deposition is effected from silane, approximately 500 C, in 11 seconds.
The steps of cleaning the substrate and depositing the epitaxial layer are effected during the application ofthe heat pulse with the stream of silane present in the reaction chamberthus ensuring that deposition takes place on the clean substrate without having to store the cleaned substrate in the reaction chamber before deposition commences.
The layer deposited as described in this Example had a thickness of 0.76 micrometres deposited in a total heat pulse time of 92 seconds including 70 seconds at 1100 C.
An electron channelling pattern analysis ofthe layer showed itto be epitaxial with the substrate and a secondary ion mass spectroscopic (SiMS) depth profile of the epitaxial layer and underlying substrate wasmadetodeterminethearsenicdopant concentration profile across the epitaxial layersubstrate surface interface as shown in Figure 3. The abscissa 31 of Figure 3 represents depth from the surface ofthe epitaxial layer measured in micrometres, the ordinate 32 represents the concentration of arsenic atoms on a logarithmic scale in atoms per cubic metre. Son the abscissa represents the position of the surface of the epitaxial layer, I represents the position of the interface between the epitaxial layer and the substrate surface forthe0.76micrometrethicknessepitaxial layer.
Curve 33 represents the arsenic concentration; the isotope of arsenic used in the SIMS profile has an atomic weight M equal to 75. The transition depth D, between invading dopant concentrations of 1025m-3 and 1023m-3 in the epitaxial layer, is 55 nanometres.
Thus a layer deposited by a method in accordance with the invention as described in this Example is epitaxial, exhibits a transition depth D of 7.2% of the measured thickness of the layer and has a carbon and oxygen concentration in the deposited layer which is below the detection limit of between 1020
and 1021 m-3OftheSIMS profile.
Example2
A 0.05m diameter arsenic doped monocrystalline silicon substrate with an arsenic concentration of 2.4 x 1025 As m-3 was chemically cleaned using a
process as described in the RCA Review31,187 (1970)then placed on a support in a chemical vapour deposition reaction chamber. The back and edges of the substrate were not coated with thermally grown oxide to reduce autodoping. The support was a body of silicon carbide coated graphite which had previously been coated with polysilicon. The reaction chamberwas then purged with nitrogen and the pressure in the chamberwas reduced to the base pressure of 0.25 Pa.After backfilling and purging the reaction chamber with hydrogen the pressure in the reaction chamberwas reduced and a stream of trichlorsilane at a mass flow rate of 0.22gm/min was introduced into the reaction chamber and the reaction chamber pressure was allowed to stabilise at 7.6x1 03Pa, whereupon a heat pulse was applied to the substrate by radiant heating. The substrate temperature vstime profile of that heat pulse is shown in Figure 4. The substrate temperature is raised 41 from ambient to 11 50'C in 12 seconds, maintained 42 atthattemperature for 60 seconds afterwhich the substratetemperatureis allowed to fall 43 to ambient.The substrate temperature falls to a minimum temperature at which epitaxial deposition is effected from trichlorsilane, 44, approximately 750 C, in 5 seconds, after which thetrichlorsilane stream was shut off.
The time taken for the substrate temperature to fall below the minimum temperature for any deposition is such that substantially the whole thickness of the epitaxial layer is deposited while the substrate is maintained at 1150do.
The steps of cleaning the substrate and depositing the layer are effected during the heat pulse in the stream oftrichlorsilane in the reaction chamber. The decomposition products of trichlorsilane include hydrochloric acid gas which may assist in cleaning the substrate.
The layer deposited as described in this example had a thickness of 0.43 jim, deposited in a total heat pulse time of 79.5 seconds, including 60 seconds at 1150 C.
An electron channelling pattern analysis ofthe layer showed itto be epitaxial with the substrate and a secondary ion mass spectroscopic (SIMS) depth profile ofthe epitaxial layer and underlying substrate was made to determine the arsenic dopant concentration profile across the epitaxial layersubstrate surface interface as shown in Figure 5. The abscissa 51 of Figure 5 represents depth from the surface ofthe epitaxial layer measured in micrometres, the ordinate 52 represents the concentration of arsenic atoms on a logarithmic scale in atoms per cubic metre. Son the abscissa represents the position of the surface of the epitaxial layer, I represents the position of the interface between the epitaxial layer and the substrate surface for the 0.43 micrometre thickness epitaxial layer.
Curve 53 representsthe arsenicconcentration; the isotope of arsenic used in the SIMS profile has an atomic weight M equal to 75. The transition depth D, between invading dopantconcentrations of 1025m-3 and 1023m-3 in the epitaxial layer, is 62 nanometres which compares favourably with the values reported in the prior art. Thus a layer deposited by a method in accordance with the invention as described in this
Example is epitaxial, exhibits a transition depth D of 14% ofthe measured thickness ofthe layer and has a carbon and oxygen concentration in the deposited layerwhich is below the detection limit of between 1020 and 1021 m-3 of the SIMS depth profile.
Further experiments to deposit a silicon epitaxial layer by the decomposition oftrichlorsilane on a surface of a monocrystalline silicon substrate have been made by a method in accordance with the invention. In these experiments layers having thicknesses as low as 0.23 micrometreswere deposited under conditions identical to those of
Example 2with the exception that the length oftime the substrate was maintained at 11 500C was varied in accordance with the thickness of the layerto be deposited. A 0.23 micrometre layerwas deposited with the substrate maintained at 1 150"C for35 seconds. SIMS analysis of these layers indicated that the transition depth D between the substrate and the layer was dependent on the thickness of the layer and hence on the length of time the substrate was
maintained at 11 50#C. Forthe 0.23 micrometre layer, the transition depth, D, was found to be 30 nanometres.
The method in accordance with the invention is not to be considered limited to the deposition of
undoped epitaxial layers on doped substrates as shown in the Figures and described in the Examples.
A method in accordance with the invention may be
used forthe deposition of doped expitaxial layers by the introduction into the reaction chamber of an
appropriate dopant carrier gas.
Claims (9)
1. A method of depositing an epitaxial silicon
layer on a surface of a monocrystalline silicon substrate by chemical vapour deposition in a
radiantly heated reaction chamber, the method
including the steps of (a) chemically cleaning the substrate, (b) placing the substrate on a support in the reaction chamber, (c) purging the reaction
chamber, (d) cleaning the substrate within the
reaction chamber, and (e) depositing the epitaxial silicon layerfrom a stream of silicon carrier gas
during an application of a heat pulse to the substrate,
characterised in that, by means of the heat pulse the temperature ofthe substrate is raised to a temperature between 1 0000C and 1 250"C, maintained at a temperature between 1 0000C and 1 250#C, and then allowed to fall to atemperature below a minimum temperature at which deposition
occurs from the stream of silicon carrier gas, in that
the stream of silicon carrier gas is introduced into the
reaction chamber before the cleaning step (d), and in
thatthe cleaning step (d) is effected in the presence
ofthe silicon carrier gas during the application ofthe heat pulse and in that the deposition step (e) is also effected during the application ofthe heat pulse.
2. A method as claimed in Claim 1, in which the temperature of the substrate is raised to the temperature between 1000 C and 1250 C in less than about 20 seconds.
3. A method as claimed in Claim 1 or Claim 2, in which thetemperature of the substrate falls from the temperature between 10000C and 12500Cto a temperature below the minimum temperature at which deposition is effected in less than about 10 seconds.
4. A method as claimed in any one of the preceding claims, in which the silicon carrier gas is silane and the minimum temperature atwhich expitaxial deposition is effected is approximately 500 C.
5. A method as claimed in any one of Claims 1 to 3, in which the silicon carrier gas is trichlorsilane and the minimum temperature at which epitaxial deposition is effected is approxi mately 750"C.
6. A method as claimed in any one of the preceding claims, in which the substrate is preheated within the reaction chamber an elevated temperature before the step of applying the heat pulse.
7. A method as claimed in any one of the preceding claims, in which the substrate is preheated to a temperature below the minimum temperature at which epitaxial deposition is effected from the silicon carrier gas before the heat pulse is applied to the substrate.
8. A method as claimed in Claim 8, in which the substrate is preheated by the radiant heat source used to heat the substrate to the temperature between 1000'Cand 1250 C.
9. A method of depositing an epitaxial silicon layer substantially as herein described with reference to Figure 1,to Example 1 and Figures 2 and 3, and to Example 2 and Figures 4 and 5.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB8530053A GB2183679A (en) | 1985-12-06 | 1985-12-06 | A method of depositing an epitaxial silicon layer |
| EP19860201493 EP0214690B1 (en) | 1985-09-06 | 1986-09-01 | A method of manufacturing a semiconductor device |
| DE8686201493T DE3684539D1 (en) | 1985-09-06 | 1986-09-01 | MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE. |
| US06/904,090 US5011789A (en) | 1985-09-06 | 1986-09-04 | Method of manufacturing a semiconductor device |
| JP61208086A JPH0736387B2 (en) | 1985-09-06 | 1986-09-05 | Semiconductor device manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB8530053A GB2183679A (en) | 1985-12-06 | 1985-12-06 | A method of depositing an epitaxial silicon layer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| GB8530053D0 GB8530053D0 (en) | 1986-01-15 |
| GB2183679A true GB2183679A (en) | 1987-06-10 |
Family
ID=10589335
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB8530053A Withdrawn GB2183679A (en) | 1985-09-06 | 1985-12-06 | A method of depositing an epitaxial silicon layer |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2183679A (en) |
-
1985
- 1985-12-06 GB GB8530053A patent/GB2183679A/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| GB8530053D0 (en) | 1986-01-15 |
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| WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |