GB2064252A - Bidirectional pulse generator - Google Patents

Abstract

A bidirectional pulse generator for driving a video disc stylus deflector. In one embodiment, an integrator, (15) responsive to a deflection pulse, and having its input connected to a polarity selectable current source (20), generates a ramped output signal. Upon termination of the deflection pulse, a feedback loop (19) is closed around the integrator to rapidly reset the output potential of the integrator to one of two pre-pulse output voltages. A direction control (32) selects the current source polarity and controls the pre-pulse output voltage and thereby the relative polarity of the output pulse. Alternatively, (fig. 4/5) first and second diodes are respectively connected between the inverting and non-inverting input terminals and a point of bilevel potential for selectively conditioning one or the other of the diodes to conduct, thereby establishing the quiescent output potential of the amplifier and concurrently shunting the deflection waveform from one or the other of the amplifier input terminals. The pulse output can thereby be reversed in polarity and be varied in amplitude, in order to shift the pickup in either direction by varying distances. <IMAGE>

Description

SPECIFICATION Bidirectional pulse generator This invention relates to pulse generators and, in particular, to generator circuitry for producing bidirectional pulses. Bidirectional pulse generators of the type described herein have been found useful for driving a video disc stylus deflector transducer.

Certain video disc player systems employ a track following signal pickup stylus for recovering prerecorded information from information-bearing tracks disposed on a record disc. The stylus is secured to a stylus arm which is compliantly mounted in an arm carriage assembly for translating the stylus/stylus arm radially across the disc in synchronism with the rate of advance of the information due to rotation of the disc. Radial motion of the stylus across the disc is normally maintained at a uniform rate. However, either to correct for an anomolous stylus "skip" (forward or backward) or to produce special effects, (such as stop motion, slow motion, fast forward motion, etc.) it is desirable to have the ability to induce a relatively precise stylus translation upon user or system command, toward the inner or outer record disc extremity.This ability is afforded by stylus deflector or skipper transducers.

The stylus deflector is incorporated with the carriage and stylus arm to correct for anomalous radial stylus movement (inward or outward) or to produce special effects such as stop motion, slow motion, record preview, etc.

A typical deflector transducer comprises a permanent magnet secured to the stylus arm disposed between two electromagnetic coils secured to the carriage assembly. Energizing the coils produces a magnetic field therebetween to induce a relatively precise translation of the permanent magnet and thereby a radial translation of the stylus/stylus arm. See for example U.K. Patent Specification No.

2034506.

To operate such transducers a variable pulse amplitude signal is desirably coupled thereto with the capability to reverse the signal polarity to effect controlled stylus translations of varying distances in either direction relative to the present position of the stylus.

The present invention is embodied in circuitry suitable for producing energizing pulses for the deflector coils capable of providing stylus translations or deflections of varying distance in both the inward and outward radial direction.

In accordance with an embodiment of the invention, a programmable bidirectional pulse generator is subject to control from a deflection pulse of variable width and a direction signal. In response to the amplitude of a bilevel direction signal, the pulse generator assumes one of two quiescent pre-pulse amplitudes.

When the next subsequent output pulse is required to be a negative-going pulse the pre-pulse output potential of the generator is pre-conditioned to be near its relatively positive supply potential.

Conversely, if the subsequent output pulse is required to be a positive-going pulse the pre-pulse output potential is pre-conditioned near the relatively negative supply potential. Transitions between the two pre-pulse output potentials is controlled by the state of the aforementioned direction signal. Transitions between pre-pulse output levels are isolated from the transducer by virtue of the pulse generator being capacitively coupled to the transducer.

Responsive to a deflection pulse a charge integrator has its input connected to a polarity selectable current source. The charge integrator generates a ramped potential output signal having an amplitude proportional to the deflection pulse duration or width, and a slope determined by the current polarity. At the termination of the deflection pulse a feedback loop is closed around the charge integrator. The feedback loop is responsive to the direction-signal to rapidly reset or establish the prepulse output amplitude of the integrator. The ramped output signal from the integrator is applied to energize the stylus deflector.

In accordance with a further embodiment, a waveform generator, responsive to a first control signal, generates a signal having a prescribed waveshape, the amplitude of which being proportional to the duration of the first control signal. Signal from the waveform generator is selectively applied to either the inverting or non-inverting input terminal of a differential amplifier depending upon the desired polarity of a drive signal. The amplifier input terminal signal selection is controlled by a second control signal which concurrently establishes the quiescent bias potentials of the amplifier input terminals and thereby the amplifier output quiescent potential.For example, if a negative-going drive pulse is desired the second control signal conditions the amplifier non-inverting input terminal potential bias at a relatively high potential and conditions the inverting input terminal to receive signal from the waveform generator. The amplifier quiescent output potential assumes a relatively high potential responsive to such bias and upon the occurrence of a first control signal pulse the signal applied by the waveform generator to the inverting input terminal is amplified and inverted at the amplifier output. The amplifier output potential goes through a negative excursion from the relatively high quiescent potential tending toward the relatively low supply potential.Conversely, if a positive going output drive signal is desired, the second control signal conditions the bias at the non-inverting input terminal relatively low (and thereby the amplifier output quiescent potential low) and conditions the non-inverting input terminal to receive signal from the waveform generator. In this case the output drive signal excursion is positive going, from the relatively low quiescent output potential toward the relatively high supply potential.

In the drawings: FIGURE 1 is a block diagram of a bidirectional pulse generator embodying the present invention; FIGURE 2 is a time-voltage waveform diagram for the FIGURE 1 circuit; and FIGURE 3 is a circuit schematic of a particular bidirectional pulse generator embodying the present invention.

FIGURES 4 and 5 are circuit schematic diagrams of bidirectional pulse generators embodying the present invention; and FIGURE 6 is a time versus voltage waveform diagram relating the output potential of the FIGURE 5 circuit to the applied control voltages.

In FIGURE 1 a programmable bidirectional pulse generator 100 is shown coupled via capacitor 11 to drive electromagnetic transducer deflector coil 10. The output signal at terminal 25 is generated by circuit 15 integrating a constant current from source 20 applied to its input terminal 29. The amplitude of the output signal is related to the duration that current is applied to circuit 1 5 and the relative polarity of the output signal is related to the polarity of the current from source 20.

The bidirectional aspect of the signal coupled to the transducer is provided as follows. In the absence of a deflection pulse, feedback is provided around the illtegrating circuit 1 5, which establishes the DC or baseline output potential at one of two levels respectively nearer the positive supply potential if a negative going output pulse is anticipated or relatively nearer the negative supply potential if a positive going output pulse is anticipated. The particular baseline potential is determined by a "direction" pulse applied to terminal 32 which controls both the feedback potential and the polarity of current source 20. Upon reception of a "deflection" pulse applied to terminal 30 the integrating circuit 15 causes the output potential at terminal 25 to slew or ramp from the established baseline and tending toward the opposite supply potential.

The output pulses induced by the deflection pulses have sufficiently fast transitions to be coupled by capacitor 11 to transducer 10. On the other hand, the baseline transitions caused by the direction signals are maintained sufficiently slow to prevent their being coupled to the transducer 10 if the amplitude of the baseline potential change is sufficient to energize the transducer.

The FIGURE 1 circuit will be described more particularly in conjunction with the waveforms of FIGURE 2. Waveform (a) is the stylus deflection command or signal having variable pulse width for determining the amplitude of the pulse generator 100 output pulse and consequently the degree of stylus deflection. Waveform (a) is applied to the control terminal 30 of switch 1 7 which completes the feedback, loop around integrator 15 when it is in the "low" state, and opens switch 17 when it is in the "high" state. Waveform (b) is determinative of the polarity of the pulse generator 100 output pulse by selecting the polarity of current source 20 and the output potential of feedback amplifier 18. With waveform (b) in the "low" and "high" states respectively, source 20 sinks and sources current from the node 29.

At time to switch 17 opens, conditioning integrator 1 5 to receive the totality of the current from source 20. A constant current is extracted from node 29 conditioning integrator 15 to generate a positive going output signal (waveform (c)) which approximates a linear ramped signal having a prescribed slope or slew rate. The amplitude of the output signal is dependent on the period of the waveform (a) pulse, being greater for a wide pulse (t2) than for a more narrow pulse (t,). On the negative going edge, at t, of the waveform (a) pulse, switch 1 7 closes applying a first reset potential on terminal 29 conditioning the integrator 15 to rapidly reinitialize its output potentia! to its pre-pulse amplitude.

The waveform (c) pulse (t0-t1) is coupled via capacitor 1 1 to energize the stylus deflection coil 10.

Stylus deflection appears to commence on the fast or trailing edge of the output pulse. The waveform per se, i.e., the ramp on the leading edge, is incident to the method chosen for programming the output amplitude.

The closing of switch 1 7 on the trailing edge of the deflection pulse completes a feedback loop inclusive of amplifier 18, potential divider 16 and impedance 19. The output impedance of amplifier 18 is low relative to the output impedance of source 20 and the input impedance of integrator 1 5, consequently the output signal from amplifier 18 completely overrides the current of source 20.The output potential of amplifier 1 8 is proportional to the differential sum of the pulse generator output potential at terminal 25 and the direction pulse potential (waveform (b)) applied to terminal 32, that is: V28 ~ V25#1 (1 ( - +fi2)~2V32 (1) where V25, V28 and V32 are respectively the potentials at terminal 25, node 28 and terminal 32, P, is the proportion of potential V25 applied to amplifier 18 input terminal 26, and p2 is the feedback gain factor of the amplifier 18. The potential V32 obtains two distinct amplitudes, e.g., zero and 5 volts. Thus the potential V28 obtains one of two substantially constant amplitudes when the feedback loop is closed.

The two output potential amplitudes V28 of amplifier 18 are arranged to condition the output potential V25 of the integrator 15 to have sufficient dynamic range to accommodate the impending deflection pulse. If a positive going deflection pulse is desired the pre-pulse potential V25 is arranged to be at the more negative, V-25, of the two potentials. Conversely, if a negative going deflection pulse is anticipated the pre-pulse potential V25 is arranged to be at the more positive, V+2s, of the two potentials.

Consider that the maximum and minimum realizable potentials at terminal 25 due to supply potentials available are Vmax and Vmjn respectively. Consider also that the integrator output was consistently reset to one-half the difference Vmax minus Vmin. Under these conditions the maximum positive or negative going deflection pulses are constrained to one-half the supply potential.

Alternatively, the availability of two selectable reset amplitudes V+25 and V-25 conditions the pulse generator for a positive going output potential excursion of (Vmax~V-2s) and a negative going output potential excursion of (V+2s~Vmin). Note that in the limit if V+25 and V-25 respectively equal Vmax and Vmin then both the positive and the negative going output excursions swing the full supply potentials.In practice V+25 and V-25 are respectively lesser and greater than Vm8x and Vein. The values of V+25 and V-25 are chosen so that the difference V+25 and minus V-25 is a minimum to reduce system disturbances upon changing from one reset level V+25(V-25) to the other V-25(V+25) and to reduce the time required for such change.

A change in the direction pulse (waveform (b)) at t3 initiates a change in the reset or baseline level V25 of (waveform (c)). the rate of change potential between the levels V+25 and V-25 is conditioned by the rate of change of the potential at node 28. The frequency response at node 28 depends upon the time constant of the impedance network 19. Generally, if the potential excursion (V+25-V-25) is less than the threshold value required to induce a stylus deflection by transducer coil 10, the rate of change of potential between the two reset levels is inconsequential.Alternatively, if the potential difference (V+25-V-25) exceeds the threshold value, then the rate of change or slew rate concomitant with the reset amplitude change must be chosen sufficiently long that the signal is ineffectively coupled via capacitor 11 to transducer 10.

The waveform (d) illustrates the signal applied to the transducer 10 by capacitor 11. The deflection pulses can be seen to follow relatively symmetrical excursions in both the positive and negative going directions about a zero reference potential.

The FIGURE 3 bidirectional pulse generator is a particular embodiment of the generalized FIGURE 1 circuit. Differential amplifier 42 configured with capacitive feedback 40 between its output connection 41 and inverting input connection 44 is a conventional integrating circuit. Constant current applied to connection 44 produces a substantially linear potential ramp at output connection 41. For amplifier 42 having high gain, connection 44 may be assumed to be at AC ground and at a DC potential substantially equal to the reference voltage applied by the battery 43 to the non-inverting input connection.Forward current into connection 44 is supplied from terminal 32 and equal to (V32#VD#V43)/(R4,+R45) where V32, VD and V43 are respectively the potentials at terminal 32, the forward pn potential drop across the diode 46 and the potential of battery 43 and R47 and R45 are respectively the resistances of resistors 47 and 45. Similarly, the reverse current into connection 44 is equal to (V32~VD~V43)/(R49+R45) where R49 is the resistance of resistor 49. Diodes 46 and 48 have been included to establish differing forward and reverse impedance levels and thereby differing forward and reverse current levels to produce differing forward and reverse output pulse amplitudes for equal width deflection pulses.

With switch means 50 closed under the control of the deflection signal applied to terminal 30, negative-feedback is applied around integrating amplifier 42. It can be shown that the feedback conditions the non-pulse output amplitude V41 at connection 41 to be: R59 R54 R59 V41 ~ (V43 + V32) (( + 1)/( + 1)), (2) R57 R55 R57 where V41, V43 and V32 are the-potentials at connection 41, reference 43 and terminal 32 respectively and R54, R55, R57 and R59 are the respective resistances of resistor 54, 55, 57 and 59.

Choosing R59 equal to R57 equation (2) reduces to V41 ~ (V43 + V32) (1 + R54/R55) (3) and it is seen that the two reset or non-pulse potentials are readily established by selection of the reference potential V43 and the ratio of R54:R55.

The capacitor 58 connected between the output and inverting input terminals of amplifier 52 conditions amplifier 52 to integrate abrupt potential c#hanges applied to its input connections and thereby establishes the rate of potential change between reset levels. Switch 50 may be implemented with any conventional electronic or electromechanical switch means having a low series impedance relative to resistors 45, 47 and 49.

In FIGURE 4 a transducer 62, e.g. an electromagnetic coil, piezoelectric crystal, etc. is coupled via capacitor 63 to the output connection 61 of the bidirectional pulse generator 64. Capacitor 63 serves the purpose of isolating the DC potential at connection 61 from the transducer 62 so that positive-going signals and negative-going signals with prescribed minimum frequency components are coupled to the transducer having an average DC potential about reference potential 60.

The pulse generator 64 is responsive to two control signals, a deflection pulse applied to terminal 65 and a direction signal applied to terminal 66. In normal operation, transitions of the two control signals do not occur simultaneously but rather the state of the direction signal is established with the pulse generator response thereto completed before the occurrence of a deflection pulse.

In the FIGURE 4 circuit, a differential amplifier 67 has a non-inverting input connection 68 connected to the output terminal 69 of waveform generator 70 by a resistor R4 and connected to reference potential 60 by resistor R5. An inverting input connection 71 of the differential amplifier 67 is connected to waveform generator 70 by the serially connected resistors R2 and R3 and is connected to the output connection 61 by feedback resistor R1. A first diode D1 connects the intersection of resistors R2 and R3 to the direction signal buffer circuit 72 and a second diode D2 connects the non-inverting input connection 68 of amplifier 67 to circuit 72. The output impedance of both the waveform generator 70 and the direction signal buffer circuit 72 are relatively low compared to the resistances of R3 and R4.

In operation, the direction signal applied to terminal 66 is one of two levels, high or low. These levels are buffered by circuit 72 to produce a signal which is applied to the interconnection 73 of diodes D1 and D2. In the presence of a relatively high potential at connection 73, diode D2 is conditioned to conduct thereby imposing the relatively high potential at connection 73 on the non-inverting input connection 68 (less a forward diode drop). Concurrently diode Dl is reverse biased or cut off effectively eliminating it from the circuit.In the absence of a deflection pulse, terminal 69 is substantially at reference potential, configuring the circuit as a non-inverting amplifier with a relatively high DC potential signal at its input, and exhibiting a DC gain at its output terminal 61 of (1 + R1/(R2 + R3)) producing a relatively high output potential where Ri, R2 and R3 are the respective resistance values of the corresponding resistors.

Application of a deflection pulse to terminal 65 conditions the waveform generator 70 to output a positive-going pulse of prescribed amplitude and waveshape to terminal 69, which pulse is coupled by resistors R2 and R3 to the inverting input connection 71 of amplifier 67. The pulse applied to terminal 69 is precluded from modulating the non-inverting input connection 68 by the clamping action of forward-biased diode D2. The amplifier 67 inverts the sense of the pulse applied to its inverting input.

The pulse is propagated through the amplifier appearing at the output connection 61 inverted and modified by the gain factor R1/(R2 + R3). The output pulse at connection 61 commences at the relative high DC level established by the direction signal and tends toward the opposite or relatively low supply potential.

On the other hand, if a low direction potential is applied to terminal 66, a relatively low potential appears on interconnection 73, which potential is insufficient to condition diode D2 to conduct. The potential at connection 68 is pulled near reference potential, e.g., ground, by the conduction path provided by resistor R5.

The potential offset of the amplifier is arranged so that under these circumstances the output potential, though relatively low, when translated back by the resistors R1 and R2 is sufficient to condition diode D1 to conduct. Now upon the occurrence of a deflection pulse, such pulse is precluded from modulating the inverting input connection 71 by the clamping action of diode D1, but is coupled to the non-inverting input connection 68 by resistor R4. The pulse is propagated to the output noninverted, and modified by the gain factor (1 + R1/R2). The output pulse at connection 61 commences at the relatively low DC potential established by the low direction signal and goes through an excursion tending toward the positive or relatively high supply potential.

In FIGURE 2, amplifier 80 driving complementary transistor emitter followers Q1 and Q2, forms a composite differential amplifier 81 with negative feedback provided by resistor R10. The output signal at connection 82 from amplifier 81 is coupled via capacitor C2 to a transducer 83. A direction signal buffer circuit 84, comprising transistor Q4 and resistors R14 and R18,IS responsive to a bilevel direction signal applied to terminal 85 to generate a potential for selectively conditioning diodes D1 and D2 to conduct. A low potential signal applied to terminal 85 conditions Q4 to be non-conducting so that the potential at interconnection 86 is determined by the ratio R14/(R14 + R18) times the value of the supply potential V.Under these conditions, the potential at interconnection 86 is relatively high where R14 and R1 8 are the respective resistance values of the corresponding resistors. On the other hand a high signal applied to terminal 85 conditions transistor Q4 to conduct essentially clamping interconnection 86 to ground potential, i.e., a relatively low potential. The dynamic impedance looking into the buffer circuit 84 from interconnection 86 is the saturation resistance of Q4 when conducting, or the impedance of the parallel connection of resistors R18 and R14, i.e. R18 Ri R14/(R18 + R14), the latter impedance being substantially smaller than the resistance of resistor R 13. As in the circuit of FIGURE 4, application of DC potentials to the interconnection of the diodes selectively establishes the DC bias of the amplifier and determines which of the inverting and non-inverting amplifier input terminals receives signal applied by waveform generator 87.

Waveform generator 87 comprises transistor Q3, resistors R17, R18 and capacitor C1. The resistance of R19 is small compared to the resistance of R17 and is included to improve the fall time at terminal 88 and to limit dissipation in transistor Q3 when it conducts initially to discharge capacitor C1.

The potential at input terminal 89 is normally sufficiently high to condition transistor Q3 to be conducting in saturation, thereby grounding terminal 88. The potential at connection 90 discharges through resistor R19 to a value V1 equal to R1 9/(R1 7 + R19) times V supply. The occurrence of a deflection pulse at terminal 48 turns transistor Q3 off, terminal 88 becomes a relatively high impedance point thereby allowing connection 90 to charge toward V supply through resistor R17 with a time constant T = R17CI. Such charging produces a fairly linear positive going ramp potential signal for a relatively large portion of the potential excursion from potential V1 to V supply.The potential V90 at connection 90 is approximated by: V90 = V supply (1 -- exp(--t/R 17CI)) (1) where R17 and Cl are the respective resistance and capacitance values of the corresponding devices and from which it can be seen that the longer the duration of time t the larger the amplitude of potential V90. The time t corresponds to the duration of the deflection pulse, i.e., the time Q3 is non-conducting.

The potential V90 is coupled via resistor R1 9 to the terminal 88 from which it is applied to the non-inverting terminal 91 or inverting terminal 92 of amplifier 80 depending on which diode is conducting.

The resistors R16 and RI 5 form a potential divider to bias connection 91 slightly positive for diode D2 non-conducting. This potential is chosen such that when amplified by amplifier 81 and fed back to connection 93 via resistors R10 and R1 lit conditions diode D1 to conduct. Thus for connection 91 at a relatively low potential, diode Dl is forward biased and clamps the input signal to the inverting signal terminal 92 at a DC potential Referring to FIGURE 6, waveform 6(a) corresponds to the deflection pulse applied to terminal 89, and waveform 6(b) is the potential produced at terminal 88. At time To, transistor Q3 is conducting and terminal 88 is clamped to ground.At time T1 the deflection pulses goes negative turning off transistor Q3 and allowing connection 90 and thereby terminal 88 to charge toward the positive supply potential, the longer the charging time the higher the resulting potential, as demonstrated by the broken lines in the figure. Finally, at time T2 the deflection pulse terminates, transistor Q3 again conducts and terminal 82 is clamped to ground. The potential at terminal 88 is applied to the amplifier non-inverting input terminal 91 with a positive-going signal appearing at output connection 82 (waveform 6(d)) which is coupled by capacitor C2 to transducer 83 (waveform 6(e)).

Waveform 6(c) represents the direction signal applied to terminal 85. At time To the direction signal is high, transistor Q4 conducts and node 86 is low with the consequence of biasing the output at connection 82 low. Between times T4 and T5 the direction pulse is going through a transition from high toward low, turning Q4 off, and biasing connection 91 relatively high, etc. From waveform 6(d) it is seen that the subsequent deflection signal at node 88 is inverted (time T6-T7). The transition (T4-T5) of the direction signal is relatively long compared with the signal transition (T5-T7) to prevent the DC potential transition at connection 82 from being coupled in sufficient amplitude by capacitor C2 to energize the transducer 83.

Table 1 is a list of device values for a particular realization of the FIGURE 5 circuit.

Table 1

Resistor Resistance R10 100 K Ohm R11 15ohm R12 51 KOhm R13 330 K Ohm R14 10K Ohm R15 110K Ohm R16 1.3MOhm R17 15 ohm R18 12KOhm R19 1 KOhm Capacitor Capacitance C1 0.1 M Farad DiodeDl,D2 IN914 Transistors Q3, Q4 MPSA1 7 Transistor Q1 MPSU01 ~ Motorola transistors Transistor Q2 MPSU51 Amplifier 80 CA324

Claims (14)

1. A bidirectional pulse generator for driving a record playback stylus deflection transducer comprising first means responsive to a deflection signal and a direction signal for generating a pulsed output signal of prescribed amplitude and polarity at an output terminal; and further means responsive to said direction signal in the absence of said deflection signal for selectively establishing the quiescent potential at said output terminal at one of a first and a second potential amplitudes, said pulsed output signal swinging through an excursion commencing at said one of said first and second potential amplitudes, tending toward the other of said first and second potential amplitudes then returning to the initial one of said first and second potential amplitudes.

2. The bidirectional pulse generator according to Claim 1, comprising: integrator means having an input terminal, an output terminal from which a drive pulse is available, said integrator means generating a signal at its output terminal approximating the integral over-time of a signal applied to its input terminal; feedback means responsive to the signal from the integrator output terminal and a stylus direction pulse for generating one of a first and second reset conditions; switch means responsive to a stylus deflection pulse for selectively connecting said feedback means between the integrator input and output terminals; and a current source responsive to the stylus direction pulse for selectively applying current of a first or second polarity to the integrator means input terminal.

3. The bidirectional pulse generator set forth in Claim 2 wherein the feedback means comprises: an amplifier having an inverting input, a non-inverting input and an output terminal; a divider network connected for applying a portion of the integrator means output signal to the amplifier non-inverting input terminal; a resistor having a first terminal connected for receiving said stylus direction signal and a second terminal connected to the amplifier inverting input terminal; a parallel connected resistor-capacitor network connected between the amplifier output and inverting input terminals for establishing the gain of said amplifier and the maximum rate of transition of the reset signal.

4. The bidirectional pulse generator as set forth in Claim 2 or 3 wherein the current source comprises: a first terminal for application of the direction pulse; first and second resistors each having a first end connected to said first terminal and having respective second ends; a first unidirectional conduction device having a first end connected to the second end of said first resistor and having a second end; a second unidirectional conduction device having a first end connected to the second end of said second resistor and having a second end, said first and second unidirectional devices being poles to conduct antiparallel with each other; and means for connecting the second ends of said first and second unidirectional conduction devices to the input terminal of said integrator means.

5. The bidirectional pulse generator set forth in claims 2 or 3 wherein the current source comprises a resistor having a first end arranged for receiving said direction signal and having a second end connected to the input terminal of the integrator means.

6. The bidirectional pulse generator set forth in Claims 2 or 3 wherein the integrator means comprises: an amplifier having an output terminal, a non-inverting input terminal, and an inverting input terminal corresponding to the integrator input terminal; a reference potential applied to the non-inverting input terminal; and a capacitor having first and second plates respectively connected to the amplifier output and inverting input terminals.

7. The bidirectional pulse generator set forth in Claim 1, comprising: a signal integrating circuit having an input terminal and an output terminal at which drive signal is available; a potential divider having an input terminal connected to the integrating circuit output terminal and having an output terminal; an amplifier having a non-inverting input terminal connected to the output terminal of the potential divider, having an inverting input terminal connected for receiving a first control signal, and having an output terminal; feedback means connected between the inverting input terminal and the output terminal of the amplifier for establishing both the gain factor and response time of the amplifier output signal, the response time of the amplifier being substantially longer than the response time of the integrating circuit;; switch means responsive to a second control signal for selectively connecting the amplifier output terminal to the integrating circuit input terminal; and a bidirectional current source responsive to the first control signal for selectively applying first and second current amplitudes to the integrating circuit input terminal; whereby the polarity and the magnitude of the drive signal is controlled in response to the first and second control signals respectively.

8. The bidirectional pulse generator according to Claim 1, comprising: a waveform generator having an output terminal, said generator being responsive to a first control signal for generating an output signal having an amplitude proportional to the duration of said control signal; amplifier means for conditioning said output signal to drive the stylus transducer; and means for selectively establishing the quiescent output potential of said amplifier at one of a relatively high and a relatively low potential; means for selectively establishing the mode of the amplifier between one of an inverting and noninverting mode.

9. The bidirectional pulse generator set forth in claim 8 wherein the waveform generator comprises; a capacitor having a first plate connected to reference potential and having a second plate; a current source for supplying current to the second plate of said capacitor; and switch means responsive to said control signal for selectively shunting said current from said capacitor and clamping the potential thereat at a prescribed amplitude.

10. The bidirectional pulse generator set forth in claim 8 wherein the amplifier means comprises: a differential amplifier having an inverting and a non-inverting signal input terminal and an output terminal; and respective means connecting the differential amplifier inverting input terminal and non-inverting input terminal to the output terminal of the waveform generator.

11. The bidirectional pulse generator set forth in claim 10 wherein the means for selectively establishing the quiescent output potential of said amplifier at one of a relatively high and a relatively low potential comprises; means for selectively biasing the non-inverting input terminal at relatively high and relatively low quiescent potentials.

12. The bidirectional pulse generator set forth in claim 10 wherein the means for selectively establishing the mode of the amplifier between one of an inverting and non-inverting mode comprises: means for shunting the waveform generator signal from the amplifier non-inverting input terminal concurrent with the non-inverting input terminal being biased at said relatively high potential, and from the inverting input terminal concurrent with the non-inverting input terminal being biased at said relatively low potential.

13. The bidirectional pulse generator according to Claim 8, comprising: a waveform generator responsive to a first control signal for generating an output signal of prescribed amplitude, said generator having an output terminal; amplifier means having inverting and non-inverting input terminals and an output terminal; a first resistor connected between the waveform generator output terminal and the amplifier noninverting input terminal; a second resistor connected between the amplifier non-inverting input terminal and a point of relatively low reference potential; third and fourth resistors having respective first ends connected to the waveform generator output terminal and the amplifier inverting input terminal respectively, and having respective second ends connected to a first node;; a fifth resistor connected between the amplifier inverting input and output terminals, said fifth and fourth resistors determining the non-inverting gain factor of the amplifier and said fifth, fourth and third resistors establishing the inverting gain factor of the amplifier; a first unidirectional conduction device having a first end connected to said first node and having a second end connected to a second node; a second unidirectional conduction device having a first end connected to said second node and a second end connected to the amplifier non-inverting input terminal; ; means for selectively applying first and second potentials to said second node whereby one of said first and second unidirectional conduction devices is conditioned to conduct in the presence of one of said first and second potentials and the other of said first and second unidirectional conduction devices is conditioned to conduct upon application of the other of said first and second potentials; and capacitive means connected to the amplifier output terminal for coupling amplifier output signal to a utilization means.

14. A bidirectional pulse generator substantially as hereinbefore described with reference to Figures 1 or 3 or 4 or 5.