GB1415824A - Addressing system - Google Patents

Abstract

1415824 Selective signalling INTERNATIONAL STANDARD ELECTRIC CORP 14 Feb 1974 6756/74 Heading G4H An addressing system in a master station provides the addresses of a plurality of outstations and, from a counter, the addresses of groups of devices thereat, stored values being used to delimit the counting. As disclosed, a given group of devices at a given outstation is addressed by loading a shift register with a start bit, the outstation address from a counter, the group address from the first-mentioned counter, and mode and check bits. A typical outstation contains a first set of groups of devices requiring continuous monitoring, and a second set of groups of devices which change condition only infrequently. The addressing system, in a first mode, addresses each group of the first set in turn, in each outstation in turn, and for each group a message is sent to a shift register in the master station from the outstation, consisting of a start bit, an indicator bit, device condition bits and check bits. If the indicator bit indicates that any device in the second set of groups in the substation has changed state, the system completes addressing of the first set in this outstation, then addresses the groups of the second set in this outstation in turn, in a second mode, before returning to the first mode to address the next outstation. The outstation counter, via a decoder, selects a row of a diode-matrix memory, the row specifying the number of groups in the first set, and the address of the first group of the second set, at the respective outstation. In the first mode, for a given outstation, the number of groups in the first set is loaded into a comparator and compared with the group counter which is incremented by the start bit in each message from outstations, equality resetting the group counter and incrementing the outstation counter (assuming the second mode is not entered). In the second mode, the address of the first group of the second set is loaded into the group counter which is incremented by the start bit in each message from the outstation, until capacity is reached when the group counter is reset and the outstation counter is incremented to return to the first mode. In a modification, the comparator is used in the second mode as in the first, but the group counter counting down from capacity (until equality with the memory is reached) in the second mode.