GB1485638A - Amplifier - Google Patents
AmplifierInfo
- Publication number
- GB1485638A GB1485638A GB5327374A GB5327374A GB1485638A GB 1485638 A GB1485638 A GB 1485638A GB 5327374 A GB5327374 A GB 5327374A GB 5327374 A GB5327374 A GB 5327374A GB 1485638 A GB1485638 A GB 1485638A
- Authority
- GB
- United Kingdom
- Prior art keywords
- transistor
- voltage
- output
- feedback
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/02—Shaping pulses by amplifying
- H03K5/023—Shaping pulses by amplifying using field effect transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Static Random-Access Memory (AREA)
- Amplifiers (AREA)
Abstract
1485638 Amplifier INTERNATIONAL BUSINESS MACHINES CORP 10 Dec 1974 [20 Dec 1973] 53273/74 Heading H3T An amplifier comprises a constant current sink 14, a constant voltage source V interconnected by a pair of parallel circuit branches 10, 12 with each branch comprising a transistor 32, 44 connected between the voltage source and an output terminal with a capacitor 36, 48 connected between the control electrode of the transistor and the output and a second transistor 20, 22 connected between the output and the current sink, precharging means 38, 50 to simultaneously precharge the capacitors 36, 38 and means to apply differential input voltage to the control electrodes 56, 58 of the second transistor whereby, after the capacitors have been precharged, an amplitude differential voltage is produced across the output. The transistors and the precharging means may be FETs the last having in operation clock pulses #, and a constant voltage V1 applied to it. Each circuit branch can have a feedback, preferably A.C., path from the outputs to the control electrode of the second transistor, such as a capacitor 24 and an additional FET 66, to whose control electrode 68 a bias voltage, V REF , may be applied. A voltage providing means #3 is arranged to apply voltage to the additional transistor in a first period and zero volts in a second period. As shown the feedback is in the positive sense and when #3 is at ground the FET's 66 and 76 are set by the feedback. The amplifier may receive its differential inputs from memory cells 106, 116 and bit lines 58, 64 and means may be coupled to the circuit to restore the differential input signals into the memory cells during the second period.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US426845A US3886468A (en) | 1973-12-20 | 1973-12-20 | High gain amplifier |
| US428591A US3882326A (en) | 1973-12-26 | 1973-12-26 | Differential amplifier for sensing small signals |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1485638A true GB1485638A (en) | 1977-09-14 |
Family
ID=27027200
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB5327374A Expired GB1485638A (en) | 1973-12-20 | 1974-12-10 | Amplifier |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB1485638A (en) |
-
1974
- 1974-12-10 GB GB5327374A patent/GB1485638A/en not_active Expired
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed | ||
| PCNP | Patent ceased through non-payment of renewal fee |